1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
|
/* *****************************************************************************
* The MIT License
*
* Copyright (c) 2010 Perry Hung.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
* ****************************************************************************/
/**
* @file nvic.c
*
* @brief Nested interrupt controller routines
*/
#include "libmaple.h"
#include "nvic.h"
#include "systick.h"
void nvic_set_vector_table(uint32 addr, uint32 offset) {
__write(SCB_VTOR, (uint32)addr | (offset & 0x1FFFFF80));
}
/**
* @brief turn on interrupt number n
* @param n interrupt number
*/
void nvic_irq_enable(uint32 n) {
uint32 *iser = &((uint32*)NVIC_ISER0)[(n/32)];
__write(iser, BIT(n % 32));
}
/**
* @brief turn off interrupt number n
* @param n interrupt number
*/
void nvic_irq_disable(uint32 n) {
uint32 *icer = &((uint32*)NVIC_ICER0)[(n/32)];
__write(icer, BIT(n % 32));
}
void nvic_irq_disable_all(void) {
short n;
for(n=0; n<65; n++) {
nvic_irq_disable(n);
}
}
/**
* @brief Initialice the NVIC at address addr
* @param addr Address to set the vector table at
*/
void nvic_init(void) {
#ifdef VECT_TAB_FLASH
nvic_set_vector_table(USER_ADDR_ROM, 0x0);
#elif defined VECT_TAB_RAM
nvic_set_vector_table(USER_ADDR_RAM, 0x0);
#elif defined VECT_TAB_BASE
nvic_set_vector_table(((uint32)0x08000000), 0x0);
#else
#error "You must set a base address for the vector table!"
#endif
}
|
