From 5d07a44ad304f088ba2bb680c1842d0a0705b7c6 Mon Sep 17 00:00:00 2001 From: bryan newbold Date: Wed, 7 May 2014 17:08:40 -0400 Subject: stm32f401c_discovery: add support for GPIO port E (up to 80 GPIO) Also fix comments/indexing for other GPIO ports. Signed-off-by: bryan newbold --- wirish/boards/stm32f401c_discovery/board.cpp | 115 ++++++++++++--------- .../stm32f401c_discovery/include/board/board.h | 3 +- 2 files changed, 69 insertions(+), 49 deletions(-) (limited to 'wirish') diff --git a/wirish/boards/stm32f401c_discovery/board.cpp b/wirish/boards/stm32f401c_discovery/board.cpp index da9ecf1..fcbda7b 100644 --- a/wirish/boards/stm32f401c_discovery/board.cpp +++ b/wirish/boards/stm32f401c_discovery/board.cpp @@ -64,6 +64,8 @@ void boardInit(void) { // - Timer channel (1 to 4, for PWM), or 0 if none // - ADC device, or NULL if none // - ADC channel, or ADCx if none +// +// XXX: This table is definately not complete for the STM32F401C!! extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { PMAP_ROW(GPIOA, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ PMAP_ROW(GPIOA, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ @@ -82,56 +84,73 @@ extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { PMAP_ROW(GPIOA, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ PMAP_ROW(GPIOA, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ - PMAP_ROW(GPIOB, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ - PMAP_ROW(GPIOB, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ - PMAP_ROW(GPIOB, 2, NULL, 0, NULL, ADCx), /* D2/PA2 */ - PMAP_ROW(GPIOB, 3, NULL, 0, NULL, ADCx), /* D3/PA3 */ - PMAP_ROW(GPIOB, 4, NULL, 0, NULL, ADCx), /* D4/PA4 */ - PMAP_ROW(GPIOB, 5, NULL, 0, NULL, ADCx), /* D5/PA5 */ - PMAP_ROW(GPIOB, 6, NULL, 0, NULL, ADCx), /* D6/PA6 */ - PMAP_ROW(GPIOB, 7, NULL, 0, NULL, ADCx), /* D7/PA7 */ - PMAP_ROW(GPIOB, 8, NULL, 0, NULL, ADCx), /* D8/PA8 */ - PMAP_ROW(GPIOB, 9, NULL, 0, NULL, ADCx), /* D9/PA9 */ - PMAP_ROW(GPIOB, 10, NULL, 0, NULL, ADCx), /* D10/PA10 */ - PMAP_ROW(GPIOB, 11, NULL, 0, NULL, ADCx), /* D11/PA11 */ - PMAP_ROW(GPIOB, 12, NULL, 0, NULL, ADCx), /* D12/PA12 */ - PMAP_ROW(GPIOB, 13, NULL, 0, NULL, ADCx), /* D13/PA13 */ - PMAP_ROW(GPIOB, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ - PMAP_ROW(GPIOB, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ + PMAP_ROW(GPIOB, 0, NULL, 0, NULL, ADCx), /* D16/PB0 */ + PMAP_ROW(GPIOB, 1, NULL, 0, NULL, ADCx), /* D17/PB1 */ + PMAP_ROW(GPIOB, 2, NULL, 0, NULL, ADCx), /* D18/PB2 */ + PMAP_ROW(GPIOB, 3, NULL, 0, NULL, ADCx), /* D19/PB3 */ + PMAP_ROW(GPIOB, 4, NULL, 0, NULL, ADCx), /* D20/PB4 */ + PMAP_ROW(GPIOB, 5, NULL, 0, NULL, ADCx), /* D21/PB5 */ + PMAP_ROW(GPIOB, 6, NULL, 0, NULL, ADCx), /* D22/PB6 */ + PMAP_ROW(GPIOB, 7, NULL, 0, NULL, ADCx), /* D23/PB7 */ + PMAP_ROW(GPIOB, 8, NULL, 0, NULL, ADCx), /* D24/PB8 */ + PMAP_ROW(GPIOB, 9, NULL, 0, NULL, ADCx), /* D25/PB9 */ + PMAP_ROW(GPIOB, 10, NULL, 0, NULL, ADCx), /* D26/PB10 */ + PMAP_ROW(GPIOB, 11, NULL, 0, NULL, ADCx), /* D27/PB11 */ + PMAP_ROW(GPIOB, 12, NULL, 0, NULL, ADCx), /* D28/PB12 */ + PMAP_ROW(GPIOB, 13, NULL, 0, NULL, ADCx), /* D29/PB13 */ + PMAP_ROW(GPIOB, 14, NULL, 0, NULL, ADCx), /* D30/PB14 */ + PMAP_ROW(GPIOB, 15, NULL, 0, NULL, ADCx), /* D31/PB15 */ + + PMAP_ROW(GPIOC, 0, NULL, 0, NULL, ADCx), /* D32/PC0 */ + PMAP_ROW(GPIOC, 1, NULL, 0, NULL, ADCx), /* D33/PC1 */ + PMAP_ROW(GPIOC, 2, NULL, 0, NULL, ADCx), /* D34/PC2 */ + PMAP_ROW(GPIOC, 3, NULL, 0, NULL, ADCx), /* D35/PC3 */ + PMAP_ROW(GPIOC, 4, NULL, 0, NULL, ADCx), /* D36/PC4 */ + PMAP_ROW(GPIOC, 5, NULL, 0, NULL, ADCx), /* D37/PC5 */ + PMAP_ROW(GPIOC, 6, NULL, 0, NULL, ADCx), /* D38/PC6 */ + PMAP_ROW(GPIOC, 7, NULL, 0, NULL, ADCx), /* D39/PC7 */ + PMAP_ROW(GPIOC, 8, NULL, 0, NULL, ADCx), /* D40/PC8 */ + PMAP_ROW(GPIOC, 9, NULL, 0, NULL, ADCx), /* D41/PC9 */ + PMAP_ROW(GPIOC, 10, NULL, 0, NULL, ADCx), /* D42/PC10 */ + PMAP_ROW(GPIOC, 11, NULL, 0, NULL, ADCx), /* D43/PC11 */ + PMAP_ROW(GPIOC, 12, NULL, 0, NULL, ADCx), /* D44/PC12 */ + PMAP_ROW(GPIOC, 13, NULL, 0, NULL, ADCx), /* D45/PC13 */ + PMAP_ROW(GPIOC, 14, NULL, 0, NULL, ADCx), /* D46/PC14 */ + PMAP_ROW(GPIOC, 15, NULL, 0, NULL, ADCx), /* D47/PC15 */ - PMAP_ROW(GPIOC, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ - PMAP_ROW(GPIOC, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ - PMAP_ROW(GPIOC, 2, NULL, 0, NULL, ADCx), /* D2/PA2 */ - PMAP_ROW(GPIOC, 3, NULL, 0, NULL, ADCx), /* D3/PA3 */ - PMAP_ROW(GPIOC, 4, NULL, 0, NULL, ADCx), /* D4/PA4 */ - PMAP_ROW(GPIOC, 5, NULL, 0, NULL, ADCx), /* D5/PA5 */ - PMAP_ROW(GPIOC, 6, NULL, 0, NULL, ADCx), /* D6/PA6 */ - PMAP_ROW(GPIOC, 7, NULL, 0, NULL, ADCx), /* D7/PA7 */ - PMAP_ROW(GPIOC, 8, NULL, 0, NULL, ADCx), /* D8/PA8 */ - PMAP_ROW(GPIOC, 9, NULL, 0, NULL, ADCx), /* D9/PA9 */ - PMAP_ROW(GPIOC, 10, NULL, 0, NULL, ADCx), /* D10/PA10 */ - PMAP_ROW(GPIOC, 11, NULL, 0, NULL, ADCx), /* D11/PA11 */ - PMAP_ROW(GPIOC, 12, NULL, 0, NULL, ADCx), /* D12/PA12 */ - PMAP_ROW(GPIOC, 13, NULL, 0, NULL, ADCx), /* D13/PA13 */ - PMAP_ROW(GPIOC, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ - PMAP_ROW(GPIOC, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ + PMAP_ROW(GPIOD, 0, NULL, 0, NULL, ADCx), /* D48/PD0 */ + PMAP_ROW(GPIOD, 1, NULL, 0, NULL, ADCx), /* D49/PD1 */ + PMAP_ROW(GPIOD, 2, NULL, 0, NULL, ADCx), /* D50/PD2 */ + PMAP_ROW(GPIOD, 3, NULL, 0, NULL, ADCx), /* D51/PD3 */ + PMAP_ROW(GPIOD, 4, NULL, 0, NULL, ADCx), /* D52/PD4 */ + PMAP_ROW(GPIOD, 5, NULL, 0, NULL, ADCx), /* D53/PD5 */ + PMAP_ROW(GPIOD, 6, NULL, 0, NULL, ADCx), /* D54/PD6 */ + PMAP_ROW(GPIOD, 7, NULL, 0, NULL, ADCx), /* D55/PD7 */ + PMAP_ROW(GPIOD, 8, NULL, 0, NULL, ADCx), /* D56/PD8 */ + PMAP_ROW(GPIOD, 9, NULL, 0, NULL, ADCx), /* D57/PD9 */ + PMAP_ROW(GPIOD, 10, NULL, 0, NULL, ADCx), /* D58/PD10 */ + PMAP_ROW(GPIOD, 11, NULL, 0, NULL, ADCx), /* D59/PD11 */ + PMAP_ROW(GPIOD, 12, NULL, 0, NULL, ADCx), /* D60/PD12 */ + PMAP_ROW(GPIOD, 13, NULL, 0, NULL, ADCx), /* D61/PD13 */ + PMAP_ROW(GPIOD, 14, NULL, 0, NULL, ADCx), /* D62/PD14 */ + PMAP_ROW(GPIOD, 15, NULL, 0, NULL, ADCx), /* D63/PD15 */ - PMAP_ROW(GPIOD, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ - PMAP_ROW(GPIOD, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ - PMAP_ROW(GPIOD, 2, NULL, 0, NULL, ADCx), /* D2/PA2 */ - PMAP_ROW(GPIOD, 3, NULL, 0, NULL, ADCx), /* D3/PA3 */ - PMAP_ROW(GPIOD, 4, NULL, 0, NULL, ADCx), /* D4/PA4 */ - PMAP_ROW(GPIOD, 5, NULL, 0, NULL, ADCx), /* D5/PA5 */ - PMAP_ROW(GPIOD, 6, NULL, 0, NULL, ADCx), /* D6/PA6 */ - PMAP_ROW(GPIOD, 7, NULL, 0, NULL, ADCx), /* D7/PA7 */ - PMAP_ROW(GPIOD, 8, NULL, 0, NULL, ADCx), /* D8/PA8 */ - PMAP_ROW(GPIOD, 9, NULL, 0, NULL, ADCx), /* D9/PA9 */ - PMAP_ROW(GPIOD, 10, NULL, 0, NULL, ADCx), /* D10/PA10 */ - PMAP_ROW(GPIOD, 11, NULL, 0, NULL, ADCx), /* D11/PA11 */ - PMAP_ROW(GPIOD, 12, NULL, 0, NULL, ADCx), /* D12/PA12 */ - PMAP_ROW(GPIOD, 13, NULL, 0, NULL, ADCx), /* D13/PA13 */ - PMAP_ROW(GPIOD, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ - PMAP_ROW(GPIOD, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ + PMAP_ROW(GPIOE, 0, NULL, 0, NULL, ADCx), /* D64/PE0 */ + PMAP_ROW(GPIOE, 1, NULL, 0, NULL, ADCx), /* D65/PE1 */ + PMAP_ROW(GPIOE, 2, NULL, 0, NULL, ADCx), /* D66/PE2 */ + PMAP_ROW(GPIOE, 3, NULL, 0, NULL, ADCx), /* D67/PE3 */ + PMAP_ROW(GPIOE, 4, NULL, 0, NULL, ADCx), /* D68/PE4 */ + PMAP_ROW(GPIOE, 5, NULL, 0, NULL, ADCx), /* D69/PE5 */ + PMAP_ROW(GPIOE, 6, NULL, 0, NULL, ADCx), /* D70/PE6 */ + PMAP_ROW(GPIOE, 7, NULL, 0, NULL, ADCx), /* D71/PE7 */ + PMAP_ROW(GPIOE, 8, NULL, 0, NULL, ADCx), /* D72/PE8 */ + PMAP_ROW(GPIOE, 9, NULL, 0, NULL, ADCx), /* D73/PE9 */ + PMAP_ROW(GPIOE, 10, NULL, 0, NULL, ADCx), /* D74/PE10 */ + PMAP_ROW(GPIOE, 11, NULL, 0, NULL, ADCx), /* D75/PE11 */ + PMAP_ROW(GPIOE, 12, NULL, 0, NULL, ADCx), /* D76/PE12 */ + PMAP_ROW(GPIOE, 13, NULL, 0, NULL, ADCx), /* D77/PE13 */ + PMAP_ROW(GPIOE, 14, NULL, 0, NULL, ADCx), /* D78/PE14 */ + PMAP_ROW(GPIOE, 15, NULL, 0, NULL, ADCx), /* D79/PE15 */ }; // Array of pins you can use for pwmWrite(). Keep it in Flash because diff --git a/wirish/boards/stm32f401c_discovery/include/board/board.h b/wirish/boards/stm32f401c_discovery/include/board/board.h index f10ef0a..0a4c830 100644 --- a/wirish/boards/stm32f401c_discovery/include/board/board.h +++ b/wirish/boards/stm32f401c_discovery/include/board/board.h @@ -67,7 +67,7 @@ /* Total number of GPIO pins that are broken out to headers and * intended for use. This includes pins like the LED, button, and * debug port (JTAG/SWD) pins. */ -#define BOARD_NR_GPIO_PINS 64 +#define BOARD_NR_GPIO_PINS 80 /* Number of pins capable of PWM output. */ #define BOARD_NR_PWM_PINS 5 @@ -100,6 +100,7 @@ enum { PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, + PE0, PE1, PE2, PE3, PE4, PE5, PE6, PE7, PE8, PE9, PE10, PE11, PE12, PE13, PE14, PE15, }; #endif -- cgit v1.2.3