From 2bb8c3fbe39ad12bc4669d499228961ad25e0ace Mon Sep 17 00:00:00 2001 From: Perry Hung Date: Wed, 4 Aug 2010 04:17:16 -0400 Subject: Basic flash peripheral management api for board bringup --- wirish/wirish.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'wirish/wirish.c') diff --git a/wirish/wirish.c b/wirish/wirish.c index e21f792..e166455 100644 --- a/wirish/wirish.c +++ b/wirish/wirish.c @@ -32,9 +32,15 @@ #include "gpio.h" #include "nvic.h" #include "usb.h" +#include "flash.h" void init(void) { + /* make sure the flash is ready before spinning the high speed clock up */ + flash_enable_prefetch(); + flash_set_latency(FLASH_WAIT_STATE_2); + rcc_init(); + nvic_init(); systick_init(); gpio_init(); -- cgit v1.2.3 From 57df5396fe83d0bb7aa55a9f4cd3a9eb2e4a6116 Mon Sep 17 00:00:00 2001 From: Perry Hung Date: Wed, 4 Aug 2010 04:29:02 -0400 Subject: New reset and clock control api --- libmaple/adc.c | 6 +- libmaple/gpio.c | 10 +-- libmaple/rcc.c | 235 +++++++++++++++++++++++++++++++++++------------------- libmaple/rcc.h | 193 +++++++++++++++++++++----------------------- libmaple/timers.c | 8 +- libmaple/usart.c | 6 +- wirish/wirish.c | 17 +++- 7 files changed, 273 insertions(+), 202 deletions(-) (limited to 'wirish/wirish.c') diff --git a/libmaple/adc.c b/libmaple/adc.c index 317a5ff..021758c 100644 --- a/libmaple/adc.c +++ b/libmaple/adc.c @@ -63,9 +63,9 @@ * At 55.5 cycles/sample, the external input impedance < 50kOhms*/ void adc_init(void) { - rcc_set_adc_prescaler(PCLK2_DIV_2); - rcc_enable_clk_adc1(); - rcc_reset_adc1(); + rcc_set_prescaler(RCC_PRESCALER_ADC, RCC_ADCPRE_PCLK_DIV_6); + rcc_clk_enable(RCC_ADC1); + rcc_reset_dev(RCC_ADC1); ADC_CR1 = 0; ADC_CR2 = CR2_EXTSEL_SWSTART | CR2_EXTTRIG; // Software triggers conversions diff --git a/libmaple/gpio.c b/libmaple/gpio.c index 9334c1e..3e05bd0 100644 --- a/libmaple/gpio.c +++ b/libmaple/gpio.c @@ -33,11 +33,11 @@ #include "gpio.h" void gpio_init(void) { - rcc_enable_clk_gpioa(); - rcc_enable_clk_gpiob(); - rcc_enable_clk_gpioc(); - rcc_enable_clk_gpiod(); - rcc_enable_clk_afio(); + rcc_clk_enable(RCC_GPIOA); + rcc_clk_enable(RCC_GPIOB); + rcc_clk_enable(RCC_GPIOC); + rcc_clk_enable(RCC_GPIOD); + rcc_clk_enable(RCC_AFIO); } void gpio_set_mode(GPIO_Port* port, uint8 gpio_pin, GPIOPinMode mode) { diff --git a/libmaple/rcc.c b/libmaple/rcc.c index bb423b9..4f13b0d 100644 --- a/libmaple/rcc.c +++ b/libmaple/rcc.c @@ -23,107 +23,176 @@ * ****************************************************************************/ /** - * @file rcc.c - * - * @brief Implements pretty much only the basic clock setup on the maple, - * exposes a handful of clock enable/disable and peripheral reset commands. + * @brief Implements pretty much only the basic clock setup on the stm32, + * clock enable/disable and peripheral reset commands. */ #include "libmaple.h" #include "flash.h" #include "rcc.h" -static void set_ahb_prescaler(uint32 divider) { - uint32 cfgr = __read(RCC_CFGR); - - cfgr &= ~HPRE; - - switch (divider) { - case SYSCLK_DIV_1: - cfgr |= SYSCLK_DIV_1; - break; - default: - ASSERT(0); - } +/* registers */ +#define RCC_BASE 0x40021000 +#define RCC_CR (RCC_BASE + 0x0) +#define RCC_CFGR (RCC_BASE + 0x4) +#define RCC_CIR (RCC_BASE + 0x8) +#define RCC_APB2RSTR (RCC_BASE + 0xC) +#define RCC_APB1RSTR (RCC_BASE + 0x10) +#define RCC_AHBENR (RCC_BASE + 0x14) +#define RCC_APB2ENR (RCC_BASE + 0x18) +#define RCC_APB1ENR (RCC_BASE + 0x1C) +#define RCC_BDCR (RCC_BASE + 0x20) +#define RCC_CSR (RCC_BASE + 0x24) +#define RCC_AHBSTR (RCC_BASE + 0x28) +#define RCC_CFGR2 (RCC_BASE + 0x2C) + +#define RCC_CFGR_USBPRE (0x1 << 22) +#define RCC_CFGR_ADCPRE (0x3 << 14) +#define RCC_CFGR_PPRE1 (0x7 << 8) +#define RCC_CFGR_PPRE2 (0x7 << 11) +#define RCC_CFGR_HPRE (0xF << 4) +#define RCC_CFGR_PLLSRC (0x1 << 16) + +#define RCC_CFGR_SWS (0x3 << 2) +#define RCC_CFGR_SWS_PLL (0x2 << 2) +#define RCC_CFGR_SWS_HSE (0x1 << 2) + +#define RCC_CFGR_SW (0x3 << 0) +#define RCC_CFGR_SW_PLL (0x2 << 0) +#define RCC_CFGR_SW_HSE (0x1 << 0) + +/* CR status bits */ +#define RCC_CR_HSEON (0x1 << 16) +#define RCC_CR_HSERDY (0x1 << 17) +#define RCC_CR_PLLON (0x1 << 24) +#define RCC_CR_PLLRDY (0x1 << 25) + +#define RCC_WRITE_CFGR(val) __write(RCC_CFGR, val) +#define RCC_READ_CFGR() __read(RCC_CFGR) + +#define RCC_WRITE_CR(val) __write(RCC_CR, val) +#define RCC_READ_CR() __read(RCC_CR) + +enum { + APB1, + APB2, + AHB +}; + +struct rcc_dev_info { + const uint8 clk_domain; + const uint8 line_num; +}; + +/* device descriptor tables */ +static const struct rcc_dev_info rcc_dev_table[] = { + [RCC_GPIOA] = { .clk_domain = APB2, .line_num = 2 }, + [RCC_GPIOB] = { .clk_domain = APB2, .line_num = 3 }, + [RCC_GPIOC] = { .clk_domain = APB2, .line_num = 4 }, + [RCC_GPIOD] = { .clk_domain = APB2, .line_num = 5 }, + [RCC_AFIO] = { .clk_domain = APB2, .line_num = 0 }, + [RCC_ADC1] = { .clk_domain = APB2, .line_num = 9 }, + [RCC_USART1] = { .clk_domain = APB2, .line_num = 14 }, + [RCC_USART2] = { .clk_domain = APB1, .line_num = 17 }, + [RCC_USART3] = { .clk_domain = APB1, .line_num = 18 }, + [RCC_TIMER1] = { .clk_domain = APB2, .line_num = 11 }, + [RCC_TIMER2] = { .clk_domain = APB1, .line_num = 0 }, + [RCC_TIMER3] = { .clk_domain = APB1, .line_num = 1 }, + [RCC_TIMER4] = { .clk_domain = APB1, .line_num = 2 }, +}; - __write(RCC_CFGR, cfgr); +/** + * @brief Initialize the clock control system. Initializes the system + * clock source to use the PLL driven by an external oscillator + * @param sysclk_src system clock source, must be PLL + * @param pll_src pll clock source, must be HSE + * @param pll_mul pll multiplier + */ +void rcc_clk_init(uint32 sysclk_src, uint32 pll_src, uint32 pll_mul) { + /* Assume that we're going to clock the chip off the PLL, fed by + * the HSE */ + ASSERT(sysclk_src == RCC_CLKSRC_PLL && + pll_src == RCC_PLLSRC_HSE); + + uint32 cfgr = 0; + uint32 cr = RCC_READ_CR(); + + cfgr = (pll_src | pll_mul); + RCC_WRITE_CFGR(cfgr); + + /* Turn on the HSE */ + cr |= RCC_CR_HSEON; + RCC_WRITE_CR(cr); + while (!(RCC_READ_CR() & RCC_CR_HSERDY)) + ; + + /* Now the PLL */ + cr |= RCC_CR_PLLON; + RCC_WRITE_CR(cr); + while (!(RCC_READ_CR() & RCC_CR_PLLRDY)) + ; + + /* Finally, let's switch over to the PLL */ + cfgr &= ~RCC_CFGR_SW; + cfgr |= RCC_CFGR_SW_PLL; + RCC_WRITE_CFGR(cfgr); + while ((RCC_READ_CFGR() & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) + ; } -static void set_apb1_prescaler(uint32 divider) { - uint32 cfgr = __read(RCC_CFGR); - cfgr &= ~PPRE1; - switch (divider) { - case HCLK_DIV_2: - cfgr |= HCLK_DIV_2; - break; - default: - ASSERT(0); - } - - __write(RCC_CFGR, cfgr); -} - -static void set_apb2_prescaler(uint32 divider) { - uint32 cfgr = __read(RCC_CFGR); - - cfgr &= ~PPRE2; +/** + * @brief Turn on the clock line on a device + * @param dev_num device to turn on + */ +void rcc_clk_enable(uint32 dev_num) { + static const uint32 enable_regs[] = { + [APB1] = RCC_APB1ENR, + [APB2] = RCC_APB2ENR, + [AHB] = RCC_AHBENR, + }; - switch (divider) { - case HCLK_DIV_1: - cfgr |= HCLK_DIV_1; - break; - default: - ASSERT(0); - } + uint8 clk_domain = rcc_dev_table[dev_num].clk_domain; - __write(RCC_CFGR, cfgr); + __set_bits(enable_regs[clk_domain], BIT(rcc_dev_table[dev_num].line_num)); } -/* FIXME: magic numbers */ -static void pll_init(void) { - uint32 cfgr; - cfgr = __read(RCC_CFGR); - cfgr &= (~PLLMUL | PLL_INPUT_CLK_HSE); - - /* pll multiplier 9, input clock hse */ - __write(RCC_CFGR, cfgr | PLL_MUL_9 | PLL_INPUT_CLK_HSE); - - /* enable pll */ - __set_bits(RCC_CR, PLLON); - while(!__get_bits(RCC_CR, PLLRDY)) { - asm volatile("nop"); - } - - /* select pll for system clock source */ - cfgr = __read(RCC_CFGR); - cfgr &= ~RCC_CFGR_SW; - __write(RCC_CFGR, cfgr | RCC_CFGR_SW_PLL); - - while (__get_bits(RCC_CFGR, 0x00000008) != 0x8) { - asm volatile("nop"); - } +/** + * @brief Set the divider on a device prescaler + * @param prescaler prescaler to set + * @param divider prescaler divider + */ +void rcc_set_prescaler(uint32 prescaler, uint32 divider) { + static const uint32 masks[] = { + [RCC_PRESCALER_AHB] = RCC_CFGR_HPRE, + [RCC_PRESCALER_APB1] = RCC_CFGR_PPRE1, + [RCC_PRESCALER_APB2] = RCC_CFGR_PPRE2, + [RCC_PRESCALER_USB] = RCC_CFGR_USBPRE, + [RCC_PRESCALER_ADC] = RCC_CFGR_ADCPRE, + }; + + uint32 cfgr = RCC_READ_CFGR(); + + cfgr &= ~masks[prescaler]; + cfgr |= divider; + RCC_WRITE_CFGR(cfgr); } -static void hse_init(void) { - __set_bits(RCC_CR, HSEON); - while (!HSERDY) { - asm volatile("nop"); - } -} -void rcc_init(void) { - hse_init(); - set_ahb_prescaler(SYSCLK_DIV_1); - set_apb1_prescaler(HCLK_DIV_2); - set_apb2_prescaler(HCLK_DIV_1); - pll_init(); -} +/** + * @brief reset a device + * @param dev_num device to reset + */ +void rcc_reset_dev(uint32 dev_num) { + static const uint32 reset_regs[] = { + [APB1] = RCC_APB1RSTR, + [APB2] = RCC_APB2RSTR, + }; + + uint8 clk_domain = rcc_dev_table[dev_num].clk_domain; -void rcc_set_adc_prescaler(uint32 divider) { - uint32 cfgr = __read(RCC_CFGR); - cfgr &= ~ADCPRE; - __write(RCC_CFGR, cfgr | PCLK2_DIV_2); + __set_bits(reset_regs[clk_domain], BIT(rcc_dev_table[dev_num].line_num)); + __clear_bits(reset_regs[clk_domain], BIT(rcc_dev_table[dev_num].line_num)); } diff --git a/libmaple/rcc.h b/libmaple/rcc.h index cb3c543..1bc63e6 100644 --- a/libmaple/rcc.h +++ b/libmaple/rcc.h @@ -23,112 +23,103 @@ * ****************************************************************************/ /** - * @file rcc.h - * - * @brief + * @brief reset and clock control definitions and prototypes */ #ifndef _RCC_H_ #define _RCC_H_ -#define RCC_BASE 0x40021000 -#define RCC_CR (RCC_BASE + 0x0) -#define RCC_CFGR (RCC_BASE + 0x4) -#define RCC_CIR (RCC_BASE + 0x8) -#define RCC_APB2RSTR (RCC_BASE + 0xC) -#define RCC_APB1RSTR (RCC_BASE + 0x10) -#define RCC_AHBENR (RCC_BASE + 0x14) -#define RCC_APB2ENR (RCC_BASE + 0x18) -#define RCC_APB1ENR (RCC_BASE + 0x1C) -#define RCC_BDCR (RCC_BASE + 0x20) -#define RCC_CSR (RCC_BASE + 0x24) -#define RCC_AHBSTR (RCC_BASE + 0x28) -#define RCC_CFGR2 (RCC_BASE + 0x2C)) - -#define HSEON BIT(16) -#define HSERDY *(volatile uint32*)(BITBAND_PERI(RCC_CR + 2, 0)) - -#define ADCPRE 0x0000C000 -#define HPRE 0x000000F0 -#define PPRE2 0x00003800 // apb2 high speed prescaler -#define PPRE1 0x00000700 // apb1 low-speed prescaler - -#define PLLMUL 0x002C0000 -#define PLL_MUL_9 0x001C0000 -#define PLLSRC BIT(16) -#define SYSCLK_DIV_1 (0x0 << 4) -#define HCLK_DIV_1 0 -#define HCLK_DIV_2 0x00000400 -#define PCLK2_DIV_2 0x00008000 - -#define PLLRDY BIT(25) -#define PLLON BIT(24) -#define PLL_INPUT_CLK_HSE BIT(16) - -#define RCC_CFGR_SW 0x00000003 -#define RCC_CFGR_SW_PLL 0x00000002 - -/* APB2 reset bits */ -#define RCC_APB2RSTR_USART1RST BIT(14) -#define RCC_APB2RSTR_SPI1RST BIT(12) -#define RCC_APB2RSTR_TIM1RST BIT(11) -#define RCC_APB2RSTR_ADC2RST BIT(10) -#define RCC_APB2RSTR_ADC1RST BIT(9) -#define RCC_APB2RSTR_IOERST BIT(6) -#define RCC_APB2RSTR_IODRST BIT(5) -#define RCC_APB2RSTR_IOCRST BIT(4) -#define RCC_APB2RSTR_IOBRST BIT(3) -#define RCC_APB2RSTR_IOARST BIT(2) -#define RCC_APB2RSTR_AFIORST BIT(0) - -/* APB2 peripheral clock enable bits */ -#define RCC_APB2ENR_USART1EN BIT(14) -#define RCC_APB2ENR_SPI1EN BIT(12) -#define RCC_APB2ENR_TIM1EN BIT(11) -#define RCC_APB2ENR_ADC2EN BIT(10) -#define RCC_APB2ENR_ADC1EN BIT(9) -#define RCC_APB2ENR_IOEEN BIT(6) -#define RCC_APB2ENR_IODEN BIT(5) -#define RCC_APB2ENR_IOCEN BIT(4) -#define RCC_APB2ENR_IOBEN BIT(3) -#define RCC_APB2ENR_IOAEN BIT(2) -#define RCC_APB2ENR_AFIOEN BIT(0) - -/* APB1 peripheral clock enable bits */ -#define RCC_APB1ENR_TIM2EN BIT(0) -#define RCC_APB1ENR_TIM3EN BIT(1) -#define RCC_APB1ENR_TIM4EN BIT(2) -#define RCC_APB1ENR_USART2EN BIT(17) -#define RCC_APB1ENR_USART3EN BIT(18) -#define RCC_APB1ENR_SPI2EN BIT(14) - -#define rcc_enable_clk_spi1() __set_bits(RCC_APB2ENR, RCC_APB2ENR_SPI1EN) -#define rcc_enable_clk_spi2() __set_bits(RCC_APB1ENR, RCC_APB1ENR_SPI2EN) - -#define rcc_enable_clk_timer1() __set_bits(RCC_APB2ENR, RCC_APB2ENR_TIM1EN) -#define rcc_enable_clk_timer2() __set_bits(RCC_APB1ENR, RCC_APB1ENR_TIM2EN) -#define rcc_enable_clk_timer3() __set_bits(RCC_APB1ENR, RCC_APB1ENR_TIM3EN) -#define rcc_enable_clk_timer4() __set_bits(RCC_APB1ENR, RCC_APB1ENR_TIM4EN) - -#define rcc_enable_clk_gpioa() __set_bits(RCC_APB2ENR, RCC_APB2ENR_IOAEN) -#define rcc_enable_clk_gpiob() __set_bits(RCC_APB2ENR, RCC_APB2ENR_IOBEN) -#define rcc_enable_clk_gpioc() __set_bits(RCC_APB2ENR, RCC_APB2ENR_IOCEN) -#define rcc_enable_clk_gpiod() __set_bits(RCC_APB2ENR, RCC_APB2ENR_IODEN) -#define rcc_enable_clk_afio() __set_bits(RCC_APB2ENR, RCC_APB2ENR_AFIOEN) - -#define rcc_enable_clk_usart1() __set_bits(RCC_APB2ENR, RCC_APB2ENR_USART1EN) -#define rcc_enable_clk_usart2() __set_bits(RCC_APB1ENR, RCC_APB1ENR_USART2EN) -#define rcc_enable_clk_usart3() __set_bits(RCC_APB1ENR, RCC_APB1ENR_USART3EN) - -#define rcc_enable_clk_adc1() __set_bits(RCC_APB2ENR, RCC_APB2ENR_ADC1EN) - -#define rcc_reset_adc1() { __set_bits(RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST); \ - __clear_bits(RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST); \ - } - - -void rcc_init(void); -void rcc_set_adc_prescaler(uint32 divider); +/* sysclk source */ +#define RCC_CLKSRC_HSI (0x0) +#define RCC_CLKSRC_HSE (0x1) +#define RCC_CLKSRC_PLL (0x2) + +/* pll entry clock source */ +#define RCC_PLLSRC_HSE (0x1 << 16) +#define RCC_PLLSRC_HSI_DIV_2 (0x0 << 16) + +/* adc prescaler dividers */ +#define RCC_ADCPRE_PCLK_DIV_2 (0x0 << 14) +#define RCC_ADCPRE_PCLK_DIV_4 (0x1 << 14) +#define RCC_ADCPRE_PCLK_DIV_6 (0x2 << 14) +#define RCC_ADCPRE_PCLK_DIV_8 (0x3 << 14) + +/* apb1 prescaler dividers */ +#define RCC_APB1_HCLK_DIV_1 (0x0 << 8) +#define RCC_APB1_HCLK_DIV_2 (0x4 << 8) +#define RCC_APB1_HCLK_DIV_4 (0x5 << 8) +#define RCC_APB1_HCLK_DIV_8 (0x6 << 8) +#define RCC_APB1_HCLK_DIV_16 (0x7 << 8) + +/* apb2 prescaler dividers */ +#define RCC_APB2_HCLK_DIV_1 (0x0 << 11) +#define RCC_APB2_HCLK_DIV_2 (0x4 << 11) +#define RCC_APB2_HCLK_DIV_4 (0x5 << 11) +#define RCC_APB2_HCLK_DIV_8 (0x6 << 11) +#define RCC_APB2_HCLK_DIV_16 (0x7 << 11) + +/* ahb prescaler dividers */ +#define RCC_AHB_SYSCLK_DIV_1 (0x0 << 4) +#define RCC_AHB_SYSCLK_DIV_2 (0x8 << 4) +#define RCC_AHB_SYSCLK_DIV_4 (0x9 << 4) +#define RCC_AHB_SYSCLK_DIV_8 (0xA << 4) +#define RCC_AHB_SYSCLK_DIV_16 (0xB << 4) +#define RCC_AHB_SYSCLK_DIV_32 (0xC << 4) +#define RCC_AHB_SYSCLK_DIV_64 (0xD << 4) +#define RCC_AHB_SYSCLK_DIV_128 (0xD << 4) +#define RCC_AHB_SYSCLK_DIV_256 (0xE << 4) +#define RCC_AHB_SYSCLK_DIV_512 (0xF << 4) + +/* pll multipliers */ +#define RCC_PLLMUL_2 (0x0 << 18) +#define RCC_PLLMUL_3 (0x1 << 18) +#define RCC_PLLMUL_4 (0x2 << 18) +#define RCC_PLLMUL_5 (0x3 << 18) +#define RCC_PLLMUL_6 (0x4 << 18) +#define RCC_PLLMUL_7 (0x5 << 18) +#define RCC_PLLMUL_8 (0x6 << 18) +#define RCC_PLLMUL_9 (0x7 << 18) +#define RCC_PLLMUL_10 (0x8 << 18) +#define RCC_PLLMUL_11 (0x9 << 18) +#define RCC_PLLMUL_12 (0xA << 18) +#define RCC_PLLMUL_13 (0xB << 18) +#define RCC_PLLMUL_14 (0xC << 18) +#define RCC_PLLMUL_15 (0xD << 18) +#define RCC_PLLMUL_16 (0xE << 18) + +/* device numbers */ +enum { + RCC_GPIOA, + RCC_GPIOB, + RCC_GPIOC, + RCC_GPIOD, + RCC_AFIO, + RCC_ADC1, + RCC_USART1, + RCC_USART2, + RCC_USART3, + RCC_USART4, + RCC_USART5, + RCC_TIMER1, + RCC_TIMER2, + RCC_TIMER3, + RCC_TIMER4, +}; + +/* prescalers */ +enum { + RCC_PRESCALER_AHB, + RCC_PRESCALER_APB1, + RCC_PRESCALER_APB2, + RCC_PRESCALER_USB, + RCC_PRESCALER_ADC +}; + + +void rcc_clk_init(uint32 sysclk_src, uint32 pll_src, uint32 pll_mul); +void rcc_clk_enable(uint32 dev); +void rcc_reset_dev(uint32 dev); +void rcc_set_prescaler(uint32 prescaler, uint32 divider); #endif diff --git a/libmaple/timers.c b/libmaple/timers.c index da85680..a3890d4 100644 --- a/libmaple/timers.c +++ b/libmaple/timers.c @@ -94,20 +94,20 @@ void timer_init(uint8 timer_num, uint16 prescale) { switch(timer_num) { case 1: timer = (Timer*)TIMER1_BASE; - rcc_enable_clk_timer1(); + rcc_clk_enable(RCC_TIMER1); is_advanced = 1; break; case 2: timer = (Timer*)TIMER2_BASE; - rcc_enable_clk_timer2(); + rcc_clk_enable(RCC_TIMER2); break; case 3: timer = (Timer*)TIMER3_BASE; - rcc_enable_clk_timer3(); + rcc_clk_enable(RCC_TIMER3); break; case 4: timer = (Timer*)TIMER4_BASE; - rcc_enable_clk_timer4(); + rcc_clk_enable(RCC_TIMER4); break; } diff --git a/libmaple/usart.c b/libmaple/usart.c index 282fc5d..2a587f3 100644 --- a/libmaple/usart.c +++ b/libmaple/usart.c @@ -128,21 +128,21 @@ void usart_init(uint8 usart_num, uint32 baud) { port = (usart_port*)USART1_BASE; ring_buf = &ring_buf1; clk_speed = USART1_CLK; - rcc_enable_clk_usart1(); + rcc_clk_enable(RCC_USART1); REG_SET(NVIC_ISER1, BIT(5)); break; case 2: port = (usart_port*)USART2_BASE; ring_buf = &ring_buf2; clk_speed = USART2_CLK; - rcc_enable_clk_usart2(); + rcc_clk_enable(RCC_USART2); REG_SET(NVIC_ISER1, BIT(6)); break; case 3: port = (usart_port*)USART3_BASE; ring_buf = &ring_buf3; clk_speed = USART3_CLK; - rcc_enable_clk_usart3(); + rcc_clk_enable(RCC_USART3); REG_SET(NVIC_ISER1, BIT(7)); break; default: diff --git a/wirish/wirish.c b/wirish/wirish.c index e166455..1938ec9 100644 --- a/wirish/wirish.c +++ b/wirish/wirish.c @@ -23,15 +23,22 @@ * ****************************************************************************/ /** - * @brief Maple board bring up + * @brief generic maple board bring up: + * + * By default, we bring up all maple boards running on the stm32 to 72mhz, + * clocked off the PLL, driven by the 8MHz external crystal. + * + * AHB and APB2 are clocked at 72MHz + * APB1 is clocked at 36MHz + * */ #include "wirish.h" -#include "rcc.h" #include "systick.h" #include "gpio.h" #include "nvic.h" #include "usb.h" +#include "rcc.h" #include "flash.h" void init(void) { @@ -39,7 +46,11 @@ void init(void) { flash_enable_prefetch(); flash_set_latency(FLASH_WAIT_STATE_2); - rcc_init(); + /* initialize clocks */ + rcc_clk_init(RCC_CLKSRC_PLL, RCC_PLLSRC_HSE, RCC_PLLMUL_9); + rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1); + rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2); + rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1); nvic_init(); systick_init(); -- cgit v1.2.3 From d2494611156c4ba477a1bbd1b07ba0cfc14b29e4 Mon Sep 17 00:00:00 2001 From: Perry Hung Date: Wed, 4 Aug 2010 08:52:30 -0400 Subject: Cleaned up wirish/time, some interrupt handling refactoring: Fixed millis(), it was just wrong, before. Added micros(), not extensively tested. New implementation of delayMicroseconds(). Should be more consistent now. Added a handful of nvic routines to enable/disable interrupts. Cleaned up systick --- libmaple/nvic.c | 26 ++++---------------------- libmaple/nvic.h | 21 +++++++++++++-------- libmaple/systick.c | 18 ++++++++++-------- libmaple/systick.h | 25 +++++++++---------------- libmaple/timers.c | 9 +++++---- libmaple/usart.c | 2 +- libmaple/util.h | 2 -- wirish/time.c | 53 ++++++++++++++--------------------------------------- wirish/time.h | 50 +++++++++++++++++++++++++++++--------------------- wirish/wirish.c | 2 +- 10 files changed, 86 insertions(+), 122 deletions(-) (limited to 'wirish/wirish.c') diff --git a/libmaple/nvic.c b/libmaple/nvic.c index d8745a4..56b9940 100644 --- a/libmaple/nvic.c +++ b/libmaple/nvic.c @@ -32,16 +32,6 @@ #include "nvic.h" #include "systick.h" -void nvic_disable_interrupts(void) { - /* Turn off all interrupts */ - REG_SET(NVIC_ICER0, 0xFFFFFFFF); - REG_SET(NVIC_ICER1, 0xFFFFFFFF); - - /* Turn off systick exception */ - REG_CLEAR_BIT(SYSTICK_CSR, 0); -} - - void nvic_set_vector_table(uint32 addr, uint32 offset) { __write(SCB_VTOR, (uint32)addr | (offset & 0x1FFFFF80)); } @@ -49,13 +39,9 @@ void nvic_set_vector_table(uint32 addr, uint32 offset) { /** * @brief turn on interrupt number n - * @param[in] n interrupt number + * @param n interrupt number */ -void nvic_enable_interrupt(uint32 n) { - if (n >= NVIC_NR_INTERRUPTS) { - return; - } - +void nvic_irq_enable(uint32 n) { if (n < 32) { REG_SET_BIT(NVIC_ISER0, n); } else { @@ -65,13 +51,9 @@ void nvic_enable_interrupt(uint32 n) { /** * @brief turn off interrupt number n - * @param[in] n interrupt number + * @param n interrupt number */ -void nvic_disable_interrupt(uint32 n) { - if (n >= NVIC_NR_INTERRUPTS) { - return; - } - +void nvic_irq_disable(uint32 n) { if (n < 32) { REG_SET_BIT(NVIC_ICER0, n); } else { diff --git a/libmaple/nvic.h b/libmaple/nvic.h index 6cad48d..d256610 100644 --- a/libmaple/nvic.h +++ b/libmaple/nvic.h @@ -52,8 +52,6 @@ #define NVIC_VectTab_RAM ((u32)0x20000000) #define NVIC_VectTab_FLASH ((u32)0x08000000) -#define NVIC_NR_INTERRUPTS 60 - /* Where to put code */ #define USER_ADDR_ROM 0x08005000 #define USER_ADDR_RAM 0x20000C00 @@ -63,15 +61,22 @@ extern "C"{ #endif enum { - NVIC_USART1 = 37, - NVIC_USART2 = 38, - NVIC_USART3 = 39, + NVIC_TIMER1 = 27, + NVIC_TIMER2 = 28, + NVIC_TIMER3 = 29, + NVIC_TIMER4 = 30, + NVIC_USART1 = 37, + NVIC_USART2 = 38, + NVIC_USART3 = 39, }; + +#define nvic_globalirq_enable() asm volatile("cpsid i") +#define nvic_globalirq_disable() asm volatile("cpsie i") + void nvic_init(void); -void nvic_disable_interrupts(void); -void nvic_enable_interrupt(uint32 device); -void nvic_disable_interrupt(uint32 device); +void nvic_irq_enable(uint32 device); +void nvic_irq_disable(uint32 device); #ifdef __cplusplus } diff --git a/libmaple/systick.c b/libmaple/systick.c index a333528..8b0d92a 100644 --- a/libmaple/systick.c +++ b/libmaple/systick.c @@ -31,23 +31,25 @@ #include "libmaple.h" #include "systick.h" -#define MILLIS_INC 1 +#define SYSTICK_RELOAD 0xE000E014 // Reload value register +#define SYSTICK_CNT 0xE000E018 // Current value register +#define SYSTICK_CALIB 0xE000E01C // Calibration value register + +#define SYSTICK_SRC_HCLK BIT(2) // Use core clock +#define SYSTICK_TICKINT BIT(1) // Interrupt on systick countdown +#define SYSTICK_ENABLE BIT(0) // Turn on the counter volatile uint32 systick_timer_millis = 0; -void systick_init(void) { +void systick_init(uint32 reload_val) { /* Set the reload counter to tick every 1ms */ - REG_SET_MASK(SYSTICK_RELOAD, MAPLE_RELOAD_VAL); -// SYSTICK_RELOAD = MAPLE_RELOAD_VAL; + __write(SYSTICK_RELOAD, reload_val); /* Clock the system timer with the core clock * and turn it on, interrrupt every 1ms to keep track of millis()*/ - REG_SET(SYSTICK_CSR, SYSTICK_SRC_HCLK | + __write(SYSTICK_CSR, SYSTICK_SRC_HCLK | SYSTICK_ENABLE | SYSTICK_TICKINT); -// SYSTICK_CSR = SYSTICK_SRC_HCLK | -// SYSTICK_ENABLE | -// SYSTICK_TICKINT; } void SysTickHandler(void) { diff --git a/libmaple/systick.h b/libmaple/systick.h index d0a623f..57b724a 100644 --- a/libmaple/systick.h +++ b/libmaple/systick.h @@ -33,30 +33,23 @@ #include "libmaple.h" -/* To the ARM technical manual... there's nearly nothing on the systick - * timer in the stm32 manual */ +#define SYSTICK_CSR 0xE000E010 // Control and status register +#define SYSTICK_CNT 0xE000E018 // Current value register -#define SYSTICK_CSR 0xE000E010 // Control and status register -#define SYSTICK_RELOAD 0xE000E014 // Reload value register -#define SYSTICK_CNT 0xE000E018 // Current value register -#define SYSTICK_CALIB 0xE000E01C // Calibration value register - -#define SYSTICK_SRC_HCLK BIT(2) // Use core clock -#define SYSTICK_TICKINT BIT(1) // Interrupt on systick countdown -#define SYSTICK_ENABLE BIT(0) // Turn on the counter - -/* We use the systick timer to tick once - * every millisecond */ -#define MAPLE_RELOAD_VAL 72000 +#define SYSTICK_CSR_COUNTFLAG BIT(16) #ifdef __cplusplus extern "C"{ #endif -void systick_init(void); +void systick_init(uint32 reload_val); static inline uint32 systick_get_count(void) { - return (uint32)*(volatile uint32*)SYSTICK_CNT; + return __read(SYSTICK_CNT); +} + +static inline uint32 systick_check_underflow(void) { + return (__read(SYSTICK_CSR) & SYSTICK_CSR_COUNTFLAG); } #ifdef __cplusplus diff --git a/libmaple/timers.c b/libmaple/timers.c index a3890d4..6e6653c 100644 --- a/libmaple/timers.c +++ b/libmaple/timers.c @@ -30,6 +30,7 @@ #include "libmaple.h" #include "rcc.h" +#include "nvic.h" #include "timers.h" typedef struct { @@ -476,25 +477,25 @@ void timer_attach_interrupt(uint8 timer_num, uint8 compare_num, voidFuncPtr hand case 1: timer = (Timer*)TIMER1_BASE; timer1_handlers[compare_num-1] = handler; - nvic_enable_interrupt(27); + nvic_irq_enable(NVIC_TIMER1); timer->DIER |= (1 << compare_num); // 1-indexed compare nums break; case 2: timer = (Timer*)TIMER2_BASE; timer2_handlers[compare_num-1] = handler; - nvic_enable_interrupt(28); + nvic_irq_enable(NVIC_TIMER2); timer->DIER |= (1 << compare_num); // 1-indexed compare nums break; case 3: timer = (Timer*)TIMER3_BASE; timer3_handlers[compare_num-1] = handler; - nvic_enable_interrupt(29); + nvic_irq_enable(NVIC_TIMER3); timer->DIER |= (1 << compare_num); // 1-indexed compare nums break; case 4: timer = (Timer*)TIMER4_BASE; timer4_handlers[compare_num-1] = handler; - nvic_enable_interrupt(30); + nvic_irq_enable(NVIC_TIMER4); timer->DIER |= (1 << compare_num); // 1-indexed compare nums break; } diff --git a/libmaple/usart.c b/libmaple/usart.c index 53a6150..296a1fb 100644 --- a/libmaple/usart.c +++ b/libmaple/usart.c @@ -93,7 +93,7 @@ void usart_init(uint8 usart_num, uint32 baud) { port = usart_dev_table[usart_num].base; rcc_clk_enable(usart_dev_table[usart_num].rcc_dev_num); - nvic_enable_interrupt(usart_dev_table[usart_num].nvic_dev_num); + nvic_irq_enable(usart_dev_table[usart_num].nvic_dev_num); /* usart1 is mad fast */ clk_speed = (usart_num == USART1) ? 72000000UL : 36000000UL; diff --git a/libmaple/util.h b/libmaple/util.h index 8cfc60c..c336e21 100644 --- a/libmaple/util.h +++ b/libmaple/util.h @@ -48,8 +48,6 @@ #define BITBAND_PERI_BASE 0x42000000 #define BITBAND_PERI(a,b) ((BITBAND_PERI_BASE + (a-BITBAND_PERI_REF)*32 + (b*4))) // Convert PERI address -#define COUNTFLAG *((volatile unsigned char*) (BITBAND_PERI(SYSTICK_CSR,2))) - #define REG_SET(reg, val) (*(volatile uint32*)(reg) = (val)) #define REG_SET_BIT(reg, bit) (*(volatile uint32*)(reg) |= BIT(bit)) #define REG_CLEAR_BIT(reg, bit) (*(volatile uint32*)(reg) &= ~BIT(bit)) diff --git a/wirish/time.c b/wirish/time.c index 69e962c..c0fd03e 100644 --- a/wirish/time.c +++ b/wirish/time.c @@ -23,8 +23,6 @@ * ****************************************************************************/ /** - * @file time.c - * * @brief */ @@ -32,46 +30,23 @@ #include "systick.h" #include "time.h" -#define CYCLES_PER_MICROSECOND 72 -#define FUDGE 42 - -extern volatile uint32 systick_timer_millis; - -uint32 millis() { - unsigned long m; - m = systick_timer_millis; - return m; -} - void delay(unsigned long ms) { - unsigned long start = millis(); - - while (millis() - start <= ms) - ; + uint32 i; + for (i = 0; i < ms; i++) { + delayMicroseconds(1000); + } } - - -#if 1 void delayMicroseconds(uint32 us) { - uint32 target; - uint32 last, cur, count; - /* fudge factor hacky hack hack for function overhead */ - target = us * CYCLES_PER_MICROSECOND - FUDGE; - - /* Get current count */ - last = systick_get_count(); - cur = systick_get_count(); - count = last; - while ((count-cur) <= target) { - cur = systick_get_count(); - - /* check for overflow */ - if (cur > last) { - count += MAPLE_RELOAD_VAL; - } - last = cur; - } + us *= 12; + + /* fudge for function call overhead */ + us--; + asm volatile(" mov r0, %[us] \n\t" + "1: subs r0, #1 \n\t" + " bhi 1b \n\t" + : + : [us] "r" (us) + : "r0"); } -#endif diff --git a/wirish/time.h b/wirish/time.h index 9e5536b..45e82dc 100644 --- a/wirish/time.h +++ b/wirish/time.h @@ -23,8 +23,6 @@ * ****************************************************************************/ /** - * @file time.h - * * @brief */ @@ -34,32 +32,42 @@ #ifdef __cplusplus extern "C"{ #endif -/* Returns time since boot in milliseconds */ -uint32 millis(void); + +#include "nvic.h" +#include "systick.h" + +#define CYCLES_PER_MICROSECOND 72 +#define US_PER_MS 1000 +#define MAPLE_RELOAD_VAL 72000 + +extern volatile uint32 systick_timer_millis; + +/* time in milliseconds since boot */ +static inline uint32 millis(void) { + return systick_timer_millis; +} /* Time in microseconds since boot */ -uint32 micros(void); +static inline uint32 micros(void) { + uint32 ms; + uint32 cycle_cnt; + uint32 res; -/* Delay for ms milliseconds */ -void delay(unsigned long ms); + nvic_globalirq_disable(); -/* Delay for us microseconds */ -void delayMicroseconds(uint32 us); + cycle_cnt = systick_get_count(); + ms = millis(); + + nvic_globalirq_enable(); -#if 0 -static inline void delay_us(uint32 us) { - us *= 12; - asm volatile("mov r0, %[us] \n\t" - "subs r0, #2 \n\t" -"1: \n\t" - "subs r0, r0, #1 \n\t" - "bne 1b" - : - : [us] "r" (us) - : "r0", "cc"); + res = (ms * US_PER_MS) + (MAPLE_RELOAD_VAL - cycle_cnt)/CYCLES_PER_MICROSECOND; + return res; } -#endif + +void delay(unsigned long ms); +void delayMicroseconds(uint32 us); + #ifdef __cplusplus } // extern "C" #endif diff --git a/wirish/wirish.c b/wirish/wirish.c index 1938ec9..4281875 100644 --- a/wirish/wirish.c +++ b/wirish/wirish.c @@ -53,7 +53,7 @@ void init(void) { rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1); nvic_init(); - systick_init(); + systick_init(MAPLE_RELOAD_VAL); gpio_init(); adc_init(); timer_init(1, 1); -- cgit v1.2.3 From 01c38f5567bf624413d901c2b287e63cdccd03a6 Mon Sep 17 00:00:00 2001 From: bnewbold Date: Tue, 31 Aug 2010 16:28:23 -0400 Subject: Partial progress on wirish portability This version throws "defined but unused" warnings which could probably be squashed with #pragma --- libmaple/libmaple.h | 9 ++- wirish/boards.h | 154 ++++++++++++++++++++++++++++++++++++++++++++++++ wirish/ext_interrupts.c | 27 +-------- wirish/io.h | 51 ---------------- wirish/pwm.c | 4 +- wirish/wirish.c | 8 +-- wirish/wirish.h | 4 +- wirish/wirish_analog.c | 2 - wirish/wirish_digital.c | 68 +-------------------- 9 files changed, 171 insertions(+), 156 deletions(-) create mode 100644 wirish/boards.h (limited to 'wirish/wirish.c') diff --git a/libmaple/libmaple.h b/libmaple/libmaple.h index ce0d630..1fd0785 100644 --- a/libmaple/libmaple.h +++ b/libmaple/libmaple.h @@ -42,15 +42,18 @@ // Number of GPIO ports (GPIOA, GPIOB, etc), definately used #define NR_GPIO_PORTS 4 + // Total number of GPIO pins + #define NR_GPIO_PINS 39 + // Number of timer devices ports, definately used #define NR_TIMERS 4 - // Total number of GPIO pins - #define NR_MAPLE_PINS 39 - // Number of ADC pins. Not actually used? #define NR_ANALOG_PINS 29 + // Has an FSMC bus? + //#define HAS_FSMC // Maple does not + // USB Identifier numbers // Descriptor strings must be modified by hand in usb/descriptors.c for now #define VCOM_ID_VENDOR 0x1EAF diff --git a/wirish/boards.h b/wirish/boards.h new file mode 100644 index 0000000..6e24c51 --- /dev/null +++ b/wirish/boards.h @@ -0,0 +1,154 @@ +/* ***************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Bryan Newbold. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * ****************************************************************************/ + +// This file contains BOARD-specific pin mapping tables. To add a new board +// type, copy the "BOARD_maple" section below and edit it as needed, then +// update your build toolchain with a new "BOARD" type. This must match the +// seperate MCU type (which determines the ../libmaple configuration). + +#ifndef _BOARDS_H_ +#define _BOARDS_H_ + +#include "libmaple.h" +#include "gpio.h" +#include "timers.h" +#include "exti.h" + +#ifdef __cplusplus +extern "C"{ +#endif + +// Set of all possible digital pin names +enum { + D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15, D16, + D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30, D31, + D32, D33, D34, D35, D36, D37, D38, D39, + // Maple Native only: + D40, D41, D42, D43, D44, D45, D46, D47, D48, D49, D50, D51, D52, D53, D54, + D55, D56, D57, D58, D59, D60, D61, D62, D63, D64, D65, D66, D67, D68, D69, + D70, D71, D72, D73, D74, D75, D76, D77, D78, D79, D80, D81, D82, D83, D84, + D85, D86, D87, D88, D89, D90, D91, D92, D93, D94, D95, D96, D97, D98, D99, + D100, D101, D102, D103, D104, D105, D106, D107, D108, D109, D110, D111, +}; + +// Set of all possible analog pin names +enum { + ADC0, ADC1, ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, ADC10, ADC11, + ADC12, ADC13, ADC14, ADC15, ADC16, + // Maple Native only: + ADC17, ADC18, ADC19, ADC20, +}; + +#define ADC_INVALID 0xFFFFFFFF +#define TIMER_INVALID (TimerCCR)0xFFFFFFFF + +// Types used for the tables below +typedef struct PinMapping { + GPIO_Port *port; + uint32 pin; + uint32 adc; + TimerCCR timer_channel; +} PinMapping; + +typedef struct ExtiInfo { + uint8 channel; + uint8 port; +} ExtiInfo; + +// LeafLabs Maple rev3, rev4 +#ifdef BOARD_maple + + static PinMapping PIN_MAP[NR_GPIO_PINS] = { + {GPIOA_BASE, 3, ADC3, TIMER2_CH4_CCR}, // D0/PA3 + {GPIOA_BASE, 2, ADC2, TIMER2_CH3_CCR}, // D1/PA2 + {GPIOA_BASE, 0, ADC0, TIMER2_CH1_CCR}, // D2/PA0 + {GPIOA_BASE, 1, ADC1, TIMER2_CH2_CCR}, // D3/PA1 + {GPIOB_BASE, 5, ADC_INVALID, TIMER_INVALID}, // D4/PB5 + {GPIOB_BASE, 6, ADC_INVALID, TIMER4_CH1_CCR}, // D5/PB6 + {GPIOA_BASE, 8, ADC_INVALID, TIMER1_CH1_CCR}, // D6/PA8 + {GPIOA_BASE, 9, ADC_INVALID, TIMER1_CH2_CCR}, // D7/PA9 + {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR}, // D8/PA10 + {GPIOB_BASE, 7, ADC_INVALID, TIMER4_CH2_CCR}, // D9/PB7 + {GPIOA_BASE, 4, ADC4, TIMER_INVALID}, // D10/PA4 + {GPIOA_BASE, 7, ADC7, TIMER3_CH2_CCR}, // D11/PA7 + {GPIOA_BASE, 6, ADC6, TIMER3_CH1_CCR}, // D12/PA6 + {GPIOA_BASE, 5, ADC5, TIMER_INVALID}, // D13/PA5 + {GPIOB_BASE, 8, ADC_INVALID, TIMER4_CH3_CCR}, // D14/PB8 + /* Little header */ + {GPIOC_BASE, 0, ADC10, TIMER_INVALID}, // D15/PC0 + {GPIOC_BASE, 1, ADC11, TIMER_INVALID}, // D16/PC1 + {GPIOC_BASE, 2, ADC12, TIMER_INVALID}, // D17/PC2 + {GPIOC_BASE, 3, ADC13, TIMER_INVALID}, // D18/PC3 + {GPIOC_BASE, 4, ADC14, TIMER_INVALID}, // D19/PC4 + {GPIOC_BASE, 5, ADC15, TIMER_INVALID}, // D20/PC5 + /* External header */ + {GPIOC_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D21/PC13 + {GPIOC_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D22/PC14 + {GPIOC_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D23/PC15 + {GPIOB_BASE, 9, ADC_INVALID, TIMER4_CH4_CCR}, // D24/PB9 + {GPIOD_BASE, 2, ADC_INVALID, TIMER_INVALID}, // D25/PD2 + {GPIOC_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D26/PC10 + {GPIOB_BASE, 0, ADC8, TIMER3_CH3_CCR}, // D27/PB0 + {GPIOB_BASE, 1, ADC9, TIMER3_CH4_CCR}, // D28/PB1 + {GPIOB_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D29/PB10 + {GPIOB_BASE, 11, ADC_INVALID, TIMER_INVALID}, // D30/PB11 + {GPIOB_BASE, 12, ADC_INVALID, TIMER_INVALID}, // D31/PB12 + {GPIOB_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D32/PB13 + {GPIOB_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D33/PB14 + {GPIOB_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D34/PB15 + {GPIOC_BASE, 6, ADC_INVALID, TIMER_INVALID}, // D35/PC6 + {GPIOC_BASE, 7, ADC_INVALID, TIMER_INVALID}, // D36/PC7 + {GPIOC_BASE, 8, ADC_INVALID, TIMER_INVALID}, // D37/PC8 + {GPIOC_BASE, 9, ADC_INVALID, TIMER_INVALID} // D38/PC9 (BUT) + }; + + static ExtiInfo PIN_TO_EXTI_CHANNEL[NR_GPIO_PINS] = { + {EXTI3, EXTI_CONFIG_PORTA}, // D0/PA3 + {EXTI2, EXTI_CONFIG_PORTA}, // D1/PA2 + {EXTI0, EXTI_CONFIG_PORTA}, // D2/PA0 + {EXTI1, EXTI_CONFIG_PORTA}, // D3/PA1 + {EXTI5, EXTI_CONFIG_PORTB}, // D4/PB5 + {EXTI6, EXTI_CONFIG_PORTB}, // D5/PB6 + {EXTI8, EXTI_CONFIG_PORTA}, // D6/PA8 + {EXTI9, EXTI_CONFIG_PORTA}, // D7/PA9 + {EXTI10, EXTI_CONFIG_PORTA}, // D8/PA10 + {EXTI7, EXTI_CONFIG_PORTB}, // D9/PB7 + {EXTI4, EXTI_CONFIG_PORTA}, // D10/PA4 + {EXTI7, EXTI_CONFIG_PORTA}, // D11/PA7 + {EXTI6, EXTI_CONFIG_PORTA}, // D12/PA6 + {EXTI5, EXTI_CONFIG_PORTA}, // D13/PA5 + }; + +#endif + +// LeafLabs Maple Native (prototype) +//#ifdef BOARD_maple-native +//#endif + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif + diff --git a/wirish/ext_interrupts.c b/wirish/ext_interrupts.c index 1fa50fe..6ba1d05 100644 --- a/wirish/ext_interrupts.c +++ b/wirish/ext_interrupts.c @@ -32,29 +32,6 @@ #include "exti.h" #include "ext_interrupts.h" -typedef struct ExtiInfo { - uint8 channel; - uint8 port; -} ExtiInfo; - -static ExtiInfo PIN_TO_EXTI_CHANNEL[NR_MAPLE_PINS] = { - {EXTI3, EXTI_CONFIG_PORTA}, // D0/PA3 - {EXTI2, EXTI_CONFIG_PORTA}, // D1/PA2 - {EXTI0, EXTI_CONFIG_PORTA}, // D2/PA0 - {EXTI1, EXTI_CONFIG_PORTA}, // D3/PA1 - {EXTI5, EXTI_CONFIG_PORTB}, // D4/PB5 - {EXTI6, EXTI_CONFIG_PORTB}, // D5/PB6 - {EXTI8, EXTI_CONFIG_PORTA}, // D6/PA8 - {EXTI9, EXTI_CONFIG_PORTA}, // D7/PA9 - {EXTI10, EXTI_CONFIG_PORTA}, // D8/PA10 - {EXTI7, EXTI_CONFIG_PORTB}, // D9/PB7 - {EXTI4, EXTI_CONFIG_PORTA}, // D10/PA4 - {EXTI7, EXTI_CONFIG_PORTA}, // D11/PA7 - {EXTI6, EXTI_CONFIG_PORTA}, // D12/PA6 - {EXTI5, EXTI_CONFIG_PORTA}, // D13/PA5 -}; - - /** * @brief Attach an interrupt handler to be triggered on a given * transition on the pin. Runs in interrupt context @@ -68,7 +45,7 @@ static ExtiInfo PIN_TO_EXTI_CHANNEL[NR_MAPLE_PINS] = { int attachInterrupt(uint8 pin, voidFuncPtr handler, uint32 mode) { uint8 outMode; /* Parameter checking */ - if (pin >= NR_MAPLE_PINS) { + if (pin >= NR_GPIO_PINS) { return EXT_INTERRUPT_INVALID_PIN; } @@ -100,7 +77,7 @@ int attachInterrupt(uint8 pin, voidFuncPtr handler, uint32 mode) { } int detachInterrupt(uint8 pin) { - if (!(pin < NR_MAPLE_PINS)) { + if (!(pin < NR_GPIO_PINS)) { return EXT_INTERRUPT_INVALID_PIN; } diff --git a/wirish/io.h b/wirish/io.h index fff551c..e779604 100644 --- a/wirish/io.h +++ b/wirish/io.h @@ -38,48 +38,6 @@ extern "C"{ #endif -/* stash these here for now */ -#define D0 0 -#define D1 1 -#define D2 2 -#define D3 3 -#define D4 4 -#define D5 5 -#define D6 6 -#define D7 7 -#define D8 8 -#define D9 9 -#define D10 10 -#define D11 11 -#define D12 12 -#define D13 13 -#define D14 14 -#define D15 15 -#define D16 16 -#define D16 16 -#define D17 17 -#define D18 18 -#define D19 19 -#define D20 20 -#define D21 21 -#define D22 22 -#define D23 23 -#define D24 24 -#define D25 25 -#define D26 26 -#define D27 27 -#define D28 28 -#define D29 29 -#define D30 30 -#define D31 31 -#define D32 32 -#define D33 33 -#define D34 34 -#define D35 35 -#define D36 36 -#define D37 37 -#define D38 38 -#define D39 39 typedef enum WiringPinMode { OUTPUT, @@ -92,15 +50,6 @@ typedef enum WiringPinMode { PWM } WiringPinMode; -typedef struct PinMapping { - GPIO_Port *port; - uint32 pin; - uint32 adc; - TimerCCR timer_channel; -} PinMapping; - -#define ADC_INVALID 0xFFFFFFFF -#define TIMER_INVALID (TimerCCR)0xFFFFFFFF /* Set pin to mode * pinMode(pin, mode): diff --git a/wirish/pwm.c b/wirish/pwm.c index 40715b5..995e2c7 100644 --- a/wirish/pwm.c +++ b/wirish/pwm.c @@ -31,12 +31,10 @@ #include "io.h" #include "pwm.h" -extern const PinMapping PIN_MAP[NR_MAPLE_PINS]; - void pwmWrite(uint8 pin, uint16 duty_cycle) { TimerCCR ccr; - if (pin >= NR_MAPLE_PINS) { + if (pin >= NR_GPIO_PINS) { return; } diff --git a/wirish/wirish.c b/wirish/wirish.c index 4281875..d439b23 100644 --- a/wirish/wirish.c +++ b/wirish/wirish.c @@ -56,9 +56,9 @@ void init(void) { systick_init(MAPLE_RELOAD_VAL); gpio_init(); adc_init(); - timer_init(1, 1); - timer_init(2, 1); - timer_init(3, 1); - timer_init(4, 1); + short i = 1; + for(i = 1; i <= NR_TIMERS; i++) { + timer_init(i, 1); + } setupUSB(); } diff --git a/wirish/wirish.h b/wirish/wirish.h index 431e529..dd99e5c 100644 --- a/wirish/wirish.h +++ b/wirish/wirish.h @@ -32,6 +32,7 @@ #define _WIRISH_H_ #include "libmaple.h" +#include "boards.h" #include "timers.h" #include "io.h" #include "bits.h" @@ -80,8 +81,5 @@ void shiftOut(uint8 dataPin, uint8 clockPin, uint8 bitOrder, byte val); } // extern "C" #endif - - - #endif diff --git a/wirish/wirish_analog.c b/wirish/wirish_analog.c index f4c1204..2a8d662 100644 --- a/wirish/wirish_analog.c +++ b/wirish/wirish_analog.c @@ -30,8 +30,6 @@ #include "wirish.h" #include "io.h" -extern const PinMapping PIN_MAP[NR_MAPLE_PINS]; - /* Assumes that the ADC has been initialized and * that the pin is set to ANALOG_INPUT */ uint32 analogRead(uint8 pin) { diff --git a/wirish/wirish_digital.c b/wirish/wirish_digital.c index 33217b6..c93c786 100644 --- a/wirish/wirish_digital.c +++ b/wirish/wirish_digital.c @@ -29,72 +29,10 @@ #include "wirish.h" #include "io.h" -#define ADC0 0 -#define ADC1 1 -#define ADC2 2 -#define ADC3 3 -#define ADC4 4 -#define ADC5 5 -#define ADC6 6 -#define ADC7 7 -#define ADC8 8 -#define ADC9 9 -#define ADC10 10 -#define ADC11 11 -#define ADC12 12 -#define ADC13 13 -#define ADC14 14 -#define ADC15 15 -#define ADC16 16 - -const PinMapping PIN_MAP[NR_MAPLE_PINS] = { - {GPIOA_BASE, 3, ADC3, TIMER2_CH4_CCR}, // D0/PA3 - {GPIOA_BASE, 2, ADC2, TIMER2_CH3_CCR}, // D1/PA2 - {GPIOA_BASE, 0, ADC0, TIMER2_CH1_CCR}, // D2/PA0 - {GPIOA_BASE, 1, ADC1, TIMER2_CH2_CCR}, // D3/PA1 - {GPIOB_BASE, 5, ADC_INVALID, TIMER_INVALID}, // D4/PB5 - {GPIOB_BASE, 6, ADC_INVALID, TIMER4_CH1_CCR}, // D5/PB6 - {GPIOA_BASE, 8, ADC_INVALID, TIMER1_CH1_CCR}, // D6/PA8 - {GPIOA_BASE, 9, ADC_INVALID, TIMER1_CH2_CCR}, // D7/PA9 - {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR}, // D8/PA10 - {GPIOB_BASE, 7, ADC_INVALID, TIMER4_CH2_CCR}, // D9/PB7 - {GPIOA_BASE, 4, ADC4, TIMER_INVALID}, // D10/PA4 - {GPIOA_BASE, 7, ADC7, TIMER3_CH2_CCR}, // D11/PA7 - {GPIOA_BASE, 6, ADC6, TIMER3_CH1_CCR}, // D12/PA6 - {GPIOA_BASE, 5, ADC5, TIMER_INVALID}, // D13/PA5 - {GPIOB_BASE, 8, ADC_INVALID, TIMER4_CH3_CCR}, // D14/PB8 - /* Little header */ - {GPIOC_BASE, 0, ADC10, TIMER_INVALID}, // D15/PC0 - {GPIOC_BASE, 1, ADC11, TIMER_INVALID}, // D16/PC1 - {GPIOC_BASE, 2, ADC12, TIMER_INVALID}, // D17/PC2 - {GPIOC_BASE, 3, ADC13, TIMER_INVALID}, // D18/PC3 - {GPIOC_BASE, 4, ADC14, TIMER_INVALID}, // D19/PC4 - {GPIOC_BASE, 5, ADC15, TIMER_INVALID}, // D20/PC5 - /* External header */ - {GPIOC_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D21/PC13 - {GPIOC_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D22/PC14 - {GPIOC_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D23/PC15 - {GPIOB_BASE, 9, ADC_INVALID, TIMER4_CH4_CCR}, // D24/PB9 - {GPIOD_BASE, 2, ADC_INVALID, TIMER_INVALID}, // D25/PD2 - {GPIOC_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D26/PC10 - {GPIOB_BASE, 0, ADC8, TIMER3_CH3_CCR}, // D27/PB0 - {GPIOB_BASE, 1, ADC9, TIMER3_CH4_CCR}, // D28/PB1 - {GPIOB_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D29/PB10 - {GPIOB_BASE, 11, ADC_INVALID, TIMER_INVALID}, // D30/PB11 - {GPIOB_BASE, 12, ADC_INVALID, TIMER_INVALID}, // D31/PB12 - {GPIOB_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D32/PB13 - {GPIOB_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D33/PB14 - {GPIOB_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D34/PB15 - {GPIOC_BASE, 6, ADC_INVALID, TIMER_INVALID}, // D35/PC6 - {GPIOC_BASE, 7, ADC_INVALID, TIMER_INVALID}, // D36/PC7 - {GPIOC_BASE, 8, ADC_INVALID, TIMER_INVALID}, // D37/PC8 - {GPIOC_BASE, 9, ADC_INVALID, TIMER_INVALID} // D38/PC9 -}; - void pinMode(uint8 pin, WiringPinMode mode) { uint8 outputMode; - if (pin >= NR_MAPLE_PINS) + if (pin >= NR_GPIO_PINS) return; switch(mode) { @@ -130,13 +68,13 @@ void pinMode(uint8 pin, WiringPinMode mode) { uint32 digitalRead(uint8 pin) { - if (pin >= NR_MAPLE_PINS) + if (pin >= NR_GPIO_PINS) return 0; return gpio_read_bit(PIN_MAP[pin].port, PIN_MAP[pin].pin); } void digitalWrite(uint8 pin, uint8 val) { - if (pin >= NR_MAPLE_PINS) + if (pin >= NR_GPIO_PINS) return; gpio_write_bit(PIN_MAP[pin].port, PIN_MAP[pin].pin, val); -- cgit v1.2.3 From e03d58f4dab4176514924baa3a1ff430bf5819b8 Mon Sep 17 00:00:00 2001 From: bnewbold Date: Tue, 31 Aug 2010 17:17:57 -0400 Subject: Further wirish portability progress Sort of ugly changes. Compiles but untested. --- Makefile | 3 +- libmaple/gpio.h | 14 +++--- libmaple/libmaple.h | 49 +++++++++++++++++++-- libmaple/rcc.c | 1 + libmaple/rcc.h | 1 + notes/portable.txt | 33 +++++++++++++- wirish/HardwareTimer.cpp | 39 +++++++++++++++-- wirish/HardwareTimer.h | 14 ++++++ wirish/boards.h | 99 ++++++++++++++++++++++++++++++++++-------- wirish/comm/HardwareSerial.cpp | 1 + wirish/comm/HardwareSerial.h | 1 + wirish/time.c | 1 + wirish/time.h | 4 +- wirish/wirish.c | 12 +++-- wirish/wirish.h | 2 +- wirish/wirish_analog.c | 3 +- 16 files changed, 236 insertions(+), 41 deletions(-) (limited to 'wirish/wirish.c') diff --git a/Makefile b/Makefile index 862d5b1..28cd4f3 100644 --- a/Makefile +++ b/Makefile @@ -1,5 +1,6 @@ .DEFAULT_GOAL := sketch +# Valid BOARDs: maple, maple_native, ... BOARD ?= maple MEMORY_TARGET ?= flash @@ -12,7 +13,7 @@ ifeq ($(BOARD), maple) MCU := STM32F103RB PRODUCT_ID := 0003 endif -ifeq ($(BOARD), maple-native) +ifeq ($(BOARD), maple_native) MCU := STM32F103ZE PRODUCT_ID := 0003 endif diff --git a/libmaple/gpio.h b/libmaple/gpio.h index d1d0050..9099c9b 100644 --- a/libmaple/gpio.h +++ b/libmaple/gpio.h @@ -44,13 +44,13 @@ * - After reset, the alternate functions are not active and IO prts * are set to Input Floating mode */ -#define GPIOA_BASE (GPIO_Port*)0x40010800 -#define GPIOB_BASE (GPIO_Port*)0x40010C00 -#define GPIOC_BASE (GPIO_Port*)0x40011000 -#define GPIOD_BASE (GPIO_Port*)0x40011400 -#define GPIOE_BASE (GPIO_Port*)0x40011800 // High-density devices only -#define GPIOF_BASE (GPIO_Port*)0x40011C00 // High-density devices only -#define GPIOG_BASE (GPIO_Port*)0x40012000 // High-density devices only +#define GPIOA_BASE (GPIO_Port*)0x40010800 +#define GPIOB_BASE (GPIO_Port*)0x40010C00 +#define GPIOC_BASE (GPIO_Port*)0x40011000 +#define GPIOD_BASE (GPIO_Port*)0x40011400 +#define GPIOE_BASE (GPIO_Port*)0x40011800 // High-density devices only +#define GPIOF_BASE (GPIO_Port*)0x40011C00 // High-density devices only +#define GPIOG_BASE (GPIO_Port*)0x40012000 // High-density devices only #define GPIO_SPEED_50MHZ (0x3) diff --git a/libmaple/libmaple.h b/libmaple/libmaple.h index 1fd0785..a481e63 100644 --- a/libmaple/libmaple.h +++ b/libmaple/libmaple.h @@ -48,9 +48,6 @@ // Number of timer devices ports, definately used #define NR_TIMERS 4 - // Number of ADC pins. Not actually used? - #define NR_ANALOG_PINS 29 - // Has an FSMC bus? //#define HAS_FSMC // Maple does not @@ -86,6 +83,52 @@ #define BITBAND_PERI_BASE 0x42000000 #endif +#ifdef MCU_STM32F103ZE // eg, LeafLabs Maple Native + + // Number of GPIO ports (GPIOA, GPIOB, etc), definately used + #define NR_GPIO_PORTS 7 + + // Total number of GPIO pins + #define NR_GPIO_PINS 63 + + // Number of timer devices ports, definately used + #define NR_TIMERS 8 + + // Has an FSMC bus? + #define HAS_FSMC + + // USB Identifier numbers + // Descriptor strings must be modified by hand in usb/descriptors.c for now + #define VCOM_ID_VENDOR 0x1EAF + #define VCOM_ID_PRODUCT 0x0004 + #define USB_CONFIG_MAX_POWER (100 >> 1) + #define RESET_DELAY (100) + + // Where to put usercode (based on space reserved for bootloader) + #define USER_ADDR_ROM 0x08005000 + #define USER_ADDR_RAM 0x20000C00 + #define STACK_TOP 0x20000800 + + // Debug port settings (from ASSERT) + #define ERROR_LED_PORT GPIOA_BASE + #define ERROR_LED_PIN 5 + #define ERROR_USART_NUM 2 + #define ERROR_USART_BAUD 9600 + #define ERROR_TX_PIN 2 + #define ERROR_TX_PORT GPIOA_BASE + + // Just in case, most boards have at least some memory + #ifndef RAMSIZE + # define RAMSIZE (caddr_t)0x50000 + #endif + + // Bitbanded Memory sections + #define BITBAND_SRAM_REF 0x20000000 + #define BITBAND_SRAM_BASE 0x22000000 + #define BITBAND_PERI_REF 0x40000000 + #define BITBAND_PERI_BASE 0x42000000 +#endif + // Make sure MCU-specific settings were defined #ifndef NR_GPIO_PORTS #error Error: No MCU type specified. Add something like -DMCU_STM32F103RB \ diff --git a/libmaple/rcc.c b/libmaple/rcc.c index 4ac6629..848f59e 100644 --- a/libmaple/rcc.c +++ b/libmaple/rcc.c @@ -66,6 +66,7 @@ static const struct rcc_dev_info rcc_dev_table[] = { [RCC_TIMER5] = { .clk_domain = APB1, .line_num = 3 }, // High-density devices only [RCC_TIMER6] = { .clk_domain = APB1, .line_num = 4 }, // High-density devices only [RCC_TIMER7] = { .clk_domain = APB1, .line_num = 5 }, // High-density devices only + [RCC_TIMER8] = { .clk_domain = APB2, .line_num = 13 }, // High-density devices only [RCC_SPI1] = { .clk_domain = APB2, .line_num = 12 }, [RCC_SPI2] = { .clk_domain = APB1, .line_num = 14 }, }; diff --git a/libmaple/rcc.h b/libmaple/rcc.h index b369f25..3f55b4f 100644 --- a/libmaple/rcc.h +++ b/libmaple/rcc.h @@ -163,6 +163,7 @@ enum { RCC_TIMER5, // High-density devices only (Maple Native) RCC_TIMER6, // High-density devices only (Maple Native) RCC_TIMER7, // High-density devices only (Maple Native) + RCC_TIMER8, // High-density devices only (Maple Native) RCC_SPI1, RCC_SPI2, }; diff --git a/notes/portable.txt b/notes/portable.txt index a6dcb40..69952d7 100644 --- a/notes/portable.txt +++ b/notes/portable.txt @@ -38,7 +38,36 @@ Files to check by hand: # util.h # libmaple.h # usb/* -# wirish/* + +wirish/: +# bits.h +# boards.h +# cxxabi-compat.cpp +# ext_interrupts.c +# ext_interrupts.h +# HardwareTimer.cpp +# HardwareTimer.h +# io.h +# main.cxx +# Print.cpp +# Print.h +# pwm.c +# pwm.h +# rules.mk +# time.c +# time.h +# usb_serial.cpp +# usb_serial.h +# wirish_analog.c +# wirish.c +# wirish_digital.c +# wirish.h +# wirish_math.cpp +# wirish_math.h +# wirish_shift.c +# WProgram.h +- comm/ + ADC Notes: @@ -64,6 +93,8 @@ TIMER Notes: TIMER6 and TIMER7 are much less useful. There is some partial progress towards adding timer5/timer8 functionality, but not much. This should probably all be rewritten. + The wirish timer implementation should be refactored to use pin numbers. USART Notes: The USART/UART nomeclature is a little mixed up. + TODO: portability of HardwareSerial, HardwareSPI diff --git a/wirish/HardwareTimer.cpp b/wirish/HardwareTimer.cpp index 3c8e9f4..5675948 100644 --- a/wirish/HardwareTimer.cpp +++ b/wirish/HardwareTimer.cpp @@ -32,10 +32,7 @@ #include "HardwareTimer.h" HardwareTimer::HardwareTimer(uint8 timerNum) { - ASSERT(timerNum == 1 || - timerNum == 2 || - timerNum == 3 || - timerNum == 4); + ASSERT(timerNum < NR_TIMERS); this->timerNum = timerNum; // Need to remember over flow for bounds checking this->overflow = 0xFFFF; @@ -141,9 +138,43 @@ void HardwareTimer::detachCompare3Interrupt(void) { void HardwareTimer::detachCompare4Interrupt(void) { timer_detach_interrupt(this->timerNum,4); } +#if NR_TIMERS >= 8 +void HardwareTimer::setChannel5Mode(uint8 mode) { + timer_set_mode(this->timerNum,5,mode); +} +void HardwareTimer::setChannel8Mode(uint8 mode) { + timer_set_mode(this->timerNum,8,mode); +} +void HardwareTimer::setCompare5(uint16 val) { + if(val > this->overflow) + val = this->overflow; + timer_set_compare_value(this->timerNum,5,val); +} +void HardwareTimer::setCompare8(uint16 val) { + if(val > this->overflow) + val = this->overflow; + timer_set_compare_value(this->timerNum,8,val); +} +void HardwareTimer::attachCompare5Interrupt(voidFuncPtr handler) { + timer_attach_interrupt(this->timerNum,5,handler); +} +void HardwareTimer::attachCompare8Interrupt(voidFuncPtr handler) { + timer_attach_interrupt(this->timerNum,8,handler); +} +void HardwareTimer::detachCompare5Interrupt(void) { + timer_detach_interrupt(this->timerNum,5); +} +void HardwareTimer::detachCompare8Interrupt(void) { + timer_detach_interrupt(this->timerNum,8); +} +#endif HardwareTimer Timer1(1); HardwareTimer Timer2(2); HardwareTimer Timer3(3); HardwareTimer Timer4(4); +#if NR_TIMERS >= 8 +HardwareTimer Timer5(5); // High-density devices only +HardwareTimer Timer8(8); // High-density devices only +#endif diff --git a/wirish/HardwareTimer.h b/wirish/HardwareTimer.h index c79f54f..3f986e4 100644 --- a/wirish/HardwareTimer.h +++ b/wirish/HardwareTimer.h @@ -62,12 +62,26 @@ class HardwareTimer { void detachCompare2Interrupt(void); void detachCompare3Interrupt(void); void detachCompare4Interrupt(void); + #if NR_TIMERS >= 8 + void setChannel5Mode(uint8 mode); + void setChannel8Mode(uint8 mode); + void setCompare5(uint16 val); // truncates to overflow + void setCompare8(uint16 val); // truncates to overflow + void attachCompare5Interrupt(voidFuncPtr handler); + void attachCompare8Interrupt(voidFuncPtr handler); + void detachCompare5Interrupt(void); + void detachCompare8Interrupt(void); + #endif }; extern HardwareTimer Timer1; extern HardwareTimer Timer2; extern HardwareTimer Timer3; extern HardwareTimer Timer4; +#if NR_TIMERS >= 8 +extern HardwareTimer Timer5; +extern HardwareTimer Timer8; +#endif #endif diff --git a/wirish/boards.h b/wirish/boards.h index 6e24c51..035868a 100644 --- a/wirish/boards.h +++ b/wirish/boards.h @@ -39,26 +39,21 @@ extern "C"{ #endif -// Set of all possible digital pin names +// Set of all possible digital pin names; not all boards have all these enum { D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15, D16, D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30, D31, - D32, D33, D34, D35, D36, D37, D38, D39, - // Maple Native only: - D40, D41, D42, D43, D44, D45, D46, D47, D48, D49, D50, D51, D52, D53, D54, - D55, D56, D57, D58, D59, D60, D61, D62, D63, D64, D65, D66, D67, D68, D69, - D70, D71, D72, D73, D74, D75, D76, D77, D78, D79, D80, D81, D82, D83, D84, - D85, D86, D87, D88, D89, D90, D91, D92, D93, D94, D95, D96, D97, D98, D99, - D100, D101, D102, D103, D104, D105, D106, D107, D108, D109, D110, D111, -}; - -// Set of all possible analog pin names + D32, D33, D34, D35, D36, D37, D38, D39, D40, D41, D42, D43, D44, D45, D46, + D47, D48, D49, D50, D51, D52, D53, D54, D55, D56, D57, D58, D59, D60, D61, + D62, D63, D64, D65, D66, D67, D68, D69, D70, D71, D72, D73, D74, D75, D76, + D77, D78, D79, D80, D81, D82, D83, D84, D85, D86, D87, D88, D89, D90, D91, + D92, D93, D94, D95, D96, D97, D98, D99, D100, D101, D102, D103, D104, D105, + D106, D107, D108, D109, D110, D111, }; + +// Set of all possible analog pin names; not all boards have all these enum { ADC0, ADC1, ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, ADC10, ADC11, - ADC12, ADC13, ADC14, ADC15, ADC16, - // Maple Native only: - ADC17, ADC18, ADC19, ADC20, -}; + ADC12, ADC13, ADC14, ADC15, ADC16, ADC17, ADC18, ADC19, ADC20, }; #define ADC_INVALID 0xFFFFFFFF #define TIMER_INVALID (TimerCCR)0xFFFFFFFF @@ -79,6 +74,8 @@ typedef struct ExtiInfo { // LeafLabs Maple rev3, rev4 #ifdef BOARD_maple + #define CYCLES_PER_MICROSECOND 72 + static PinMapping PIN_MAP[NR_GPIO_PINS] = { {GPIOA_BASE, 3, ADC3, TIMER2_CH4_CCR}, // D0/PA3 {GPIOA_BASE, 2, ADC2, TIMER2_CH3_CCR}, // D1/PA2 @@ -143,8 +140,76 @@ typedef struct ExtiInfo { #endif // LeafLabs Maple Native (prototype) -//#ifdef BOARD_maple-native -//#endif +#ifdef BOARD_maple_native + + #define CYCLES_PER_MICROSECOND 72 + + // TODO: + static PinMapping PIN_MAP[NR_GPIO_PINS] = { + {GPIOA_BASE, 3, ADC3, TIMER2_CH4_CCR}, // D0/PA3 + {GPIOA_BASE, 2, ADC2, TIMER2_CH3_CCR}, // D1/PA2 + {GPIOA_BASE, 0, ADC0, TIMER2_CH1_CCR}, // D2/PA0 + {GPIOA_BASE, 1, ADC1, TIMER2_CH2_CCR}, // D3/PA1 + {GPIOB_BASE, 5, ADC_INVALID, TIMER_INVALID}, // D4/PB5 + {GPIOB_BASE, 6, ADC_INVALID, TIMER4_CH1_CCR}, // D5/PB6 + {GPIOA_BASE, 8, ADC_INVALID, TIMER1_CH1_CCR}, // D6/PA8 + {GPIOA_BASE, 9, ADC_INVALID, TIMER1_CH2_CCR}, // D7/PA9 + {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR}, // D8/PA10 + {GPIOB_BASE, 7, ADC_INVALID, TIMER4_CH2_CCR}, // D9/PB7 + {GPIOA_BASE, 4, ADC4, TIMER_INVALID}, // D10/PA4 + {GPIOA_BASE, 7, ADC7, TIMER3_CH2_CCR}, // D11/PA7 + {GPIOA_BASE, 6, ADC6, TIMER3_CH1_CCR}, // D12/PA6 + {GPIOA_BASE, 5, ADC5, TIMER_INVALID}, // D13/PA5 + {GPIOB_BASE, 8, ADC_INVALID, TIMER4_CH3_CCR}, // D14/PB8 + /* Little header */ + {GPIOC_BASE, 0, ADC10, TIMER_INVALID}, // D15/PC0 + {GPIOC_BASE, 1, ADC11, TIMER_INVALID}, // D16/PC1 + {GPIOC_BASE, 2, ADC12, TIMER_INVALID}, // D17/PC2 + {GPIOC_BASE, 3, ADC13, TIMER_INVALID}, // D18/PC3 + {GPIOC_BASE, 4, ADC14, TIMER_INVALID}, // D19/PC4 + {GPIOC_BASE, 5, ADC15, TIMER_INVALID}, // D20/PC5 + /* External header */ + {GPIOC_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D21/PC13 + {GPIOC_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D22/PC14 + {GPIOC_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D23/PC15 + {GPIOB_BASE, 9, ADC_INVALID, TIMER4_CH4_CCR}, // D24/PB9 + {GPIOD_BASE, 2, ADC_INVALID, TIMER_INVALID}, // D25/PD2 + {GPIOC_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D26/PC10 + {GPIOB_BASE, 0, ADC8, TIMER3_CH3_CCR}, // D27/PB0 + {GPIOB_BASE, 1, ADC9, TIMER3_CH4_CCR}, // D28/PB1 + {GPIOB_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D29/PB10 + {GPIOB_BASE, 11, ADC_INVALID, TIMER_INVALID}, // D30/PB11 + {GPIOB_BASE, 12, ADC_INVALID, TIMER_INVALID}, // D31/PB12 + {GPIOB_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D32/PB13 + {GPIOB_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D33/PB14 + {GPIOB_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D34/PB15 + {GPIOC_BASE, 6, ADC_INVALID, TIMER_INVALID}, // D35/PC6 + {GPIOC_BASE, 7, ADC_INVALID, TIMER_INVALID}, // D36/PC7 + {GPIOC_BASE, 8, ADC_INVALID, TIMER_INVALID}, // D37/PC8 + {GPIOC_BASE, 9, ADC_INVALID, TIMER_INVALID} // D38/PC9 (BUT) + }; + + static ExtiInfo PIN_TO_EXTI_CHANNEL[NR_GPIO_PINS] = { + {EXTI3, EXTI_CONFIG_PORTA}, // D0/PA3 + {EXTI2, EXTI_CONFIG_PORTA}, // D1/PA2 + {EXTI0, EXTI_CONFIG_PORTA}, // D2/PA0 + {EXTI1, EXTI_CONFIG_PORTA}, // D3/PA1 + {EXTI5, EXTI_CONFIG_PORTB}, // D4/PB5 + {EXTI6, EXTI_CONFIG_PORTB}, // D5/PB6 + {EXTI8, EXTI_CONFIG_PORTA}, // D6/PA8 + {EXTI9, EXTI_CONFIG_PORTA}, // D7/PA9 + {EXTI10, EXTI_CONFIG_PORTA}, // D8/PA10 + {EXTI7, EXTI_CONFIG_PORTB}, // D9/PB7 + {EXTI4, EXTI_CONFIG_PORTA}, // D10/PA4 + {EXTI7, EXTI_CONFIG_PORTA}, // D11/PA7 + {EXTI6, EXTI_CONFIG_PORTA}, // D12/PA6 + {EXTI5, EXTI_CONFIG_PORTA}, // D13/PA5 + }; +#endif + +#ifndef CYCLES_PER_MICROSECOND +#error Board type has not been selected correctly. +#endif #ifdef __cplusplus } // extern "C" diff --git a/wirish/comm/HardwareSerial.cpp b/wirish/comm/HardwareSerial.cpp index c1babff..6399ad5 100644 --- a/wirish/comm/HardwareSerial.cpp +++ b/wirish/comm/HardwareSerial.cpp @@ -37,6 +37,7 @@ HardwareSerial Serial1(USART1, 4500000UL, GPIOA_BASE, 9, 10, 1, 2); HardwareSerial Serial2(USART2, 2250000UL, GPIOA_BASE, 2, 3, 2, 3); HardwareSerial Serial3(USART3, 2250000UL, GPIOB_BASE, 10, 11, 0, 0); +// TODO: High density device ports HardwareSerial::HardwareSerial(uint8 usart_num, uint32 max_baud, diff --git a/wirish/comm/HardwareSerial.h b/wirish/comm/HardwareSerial.h index c2209ce..df8d7bf 100644 --- a/wirish/comm/HardwareSerial.h +++ b/wirish/comm/HardwareSerial.h @@ -61,5 +61,6 @@ class HardwareSerial : public Print { extern HardwareSerial Serial1; extern HardwareSerial Serial2; extern HardwareSerial Serial3; +// TODO: high density device ports #endif diff --git a/wirish/time.c b/wirish/time.c index c0fd03e..ea8ebe1 100644 --- a/wirish/time.c +++ b/wirish/time.c @@ -39,6 +39,7 @@ void delay(unsigned long ms) } void delayMicroseconds(uint32 us) { + // So (2^32)/12 micros max, or less than 6 minutes us *= 12; /* fudge for function call overhead */ diff --git a/wirish/time.h b/wirish/time.h index 45e82dc..33c04b4 100644 --- a/wirish/time.h +++ b/wirish/time.h @@ -35,10 +35,10 @@ extern "C"{ #include "nvic.h" #include "systick.h" +#include "boards.h" -#define CYCLES_PER_MICROSECOND 72 #define US_PER_MS 1000 -#define MAPLE_RELOAD_VAL 72000 +#define MAPLE_RELOAD_VAL (CYCLES_PER_MICROSECOND * US_PER_MS) extern volatile uint32 systick_timer_millis; diff --git a/wirish/wirish.c b/wirish/wirish.c index d439b23..69bd63b 100644 --- a/wirish/wirish.c +++ b/wirish/wirish.c @@ -56,9 +56,13 @@ void init(void) { systick_init(MAPLE_RELOAD_VAL); gpio_init(); adc_init(); - short i = 1; - for(i = 1; i <= NR_TIMERS; i++) { - timer_init(i, 1); - } + timer_init(1, 1); + timer_init(2, 1); + timer_init(3, 1); + timer_init(4, 1); + #if NR_TIMERS >= 8 + timer_init(5, 1); + timer_init(8, 1); + #endif setupUSB(); } diff --git a/wirish/wirish.h b/wirish/wirish.h index dd99e5c..7ede77c 100644 --- a/wirish/wirish.h +++ b/wirish/wirish.h @@ -33,10 +33,10 @@ #include "libmaple.h" #include "boards.h" +#include "time.h" #include "timers.h" #include "io.h" #include "bits.h" -#include "time.h" #include "pwm.h" #include "ext_interrupts.h" #include "wirish_math.h" diff --git a/wirish/wirish_analog.c b/wirish/wirish_analog.c index 2a8d662..1b911bc 100644 --- a/wirish/wirish_analog.c +++ b/wirish/wirish_analog.c @@ -33,8 +33,9 @@ /* Assumes that the ADC has been initialized and * that the pin is set to ANALOG_INPUT */ uint32 analogRead(uint8 pin) { - if (pin >= NR_ANALOG_PINS) + if(PIN_MAP[pin].adc == ADC_INVALID) { return 0; + } return adc_read(PIN_MAP[pin].adc); } -- cgit v1.2.3