From 9cea4517c1db13a6f16eb3854c18c7fc02cbdeda Mon Sep 17 00:00:00 2001 From: Marti Bolivar Date: Tue, 15 Mar 2011 20:47:53 -0400 Subject: FSMC refactor; SRAM test code --- wirish/native_sram.h | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 wirish/native_sram.h (limited to 'wirish/native_sram.h') diff --git a/wirish/native_sram.h b/wirish/native_sram.h new file mode 100644 index 0000000..7724667 --- /dev/null +++ b/wirish/native_sram.h @@ -0,0 +1,43 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +#ifdef BOARD_maple_native + +#ifndef _NATIVE_SRAM_H_ +#define _NATIVE_SRAM_H_ + +/** + * Sets up the FSMC peripheral to use the SRAM chip on the Maple + * Native as an external segment of system memory space. + * + * This implementation is for the IS62WV51216BLL 8Mb chip (55ns + * timing, 512K x 16 bits). + */ +void initNativeSRAM(void); + +#endif + +#endif -- cgit v1.2.3