From 7caa5711c3f2d03870cba71d175a057e573aff8d Mon Sep 17 00:00:00 2001 From: Marti Bolivar Date: Fri, 29 Apr 2011 12:28:30 -0400 Subject: Native and FSMC cleanups. Got rid of native_sram.h (and native_sram.cpp), and pushed their functionality into maple_native.cpp. Fixed includes in maple_native.h. Fixed includes in fsmc.h. --- wirish/boards/maple_native.cpp | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) (limited to 'wirish/boards/maple_native.cpp') diff --git a/wirish/boards/maple_native.cpp b/wirish/boards/maple_native.cpp index c1f8d5c..fa36240 100644 --- a/wirish/boards/maple_native.cpp +++ b/wirish/boards/maple_native.cpp @@ -31,12 +31,20 @@ */ #include "maple_native.h" -#include "native_sram.h" + +#include "fsmc.h" +#include "gpio.h" +#include "rcc.h" +#include "timer.h" + +#include "wirish_types.h" #ifdef BOARD_maple_native +void initSRAMChip(void); + void boardInit(void) { - initNativeSRAM(); + initSRAMChip(); } extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { @@ -177,4 +185,15 @@ extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = { BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN }; +void initSRAMChip(void) { + fsmc_nor_psram_reg_map *regs = FSMC_NOR_PSRAM1_BASE; + + fsmc_sram_init_gpios(); + rcc_clk_enable(RCC_FSMC); + + regs->BCR = FSMC_BCR_WREN | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN; + fsmc_nor_psram_set_addset(regs, 0); + fsmc_nor_psram_set_datast(regs, 3); +} + #endif -- cgit v1.2.3