From 800b8ca1c1463dd85101e242a94c7ca0ec8c459d Mon Sep 17 00:00:00 2001 From: bnewbold Date: Thu, 2 Sep 2010 17:39:52 -0400 Subject: board-specifc linker scripts --- support/ld/flash.ld | 215 ------------------------------------- support/ld/jtag.ld | 190 --------------------------------- support/ld/maple/flash.ld | 211 ++++++++++++++++++++++++++++++++++++ support/ld/maple/jtag.ld | 186 ++++++++++++++++++++++++++++++++ support/ld/maple/ram.ld | 220 ++++++++++++++++++++++++++++++++++++++ support/ld/maple_native/flash.ld | 211 ++++++++++++++++++++++++++++++++++++ support/ld/maple_native/jtag.ld | 186 ++++++++++++++++++++++++++++++++ support/ld/maple_native/ram.ld | 220 ++++++++++++++++++++++++++++++++++++++ support/ld/ram.ld | 224 --------------------------------------- 9 files changed, 1234 insertions(+), 629 deletions(-) delete mode 100644 support/ld/flash.ld delete mode 100644 support/ld/jtag.ld create mode 100644 support/ld/maple/flash.ld create mode 100644 support/ld/maple/jtag.ld create mode 100644 support/ld/maple/ram.ld create mode 100644 support/ld/maple_native/flash.ld create mode 100644 support/ld/maple_native/jtag.ld create mode 100644 support/ld/maple_native/ram.ld delete mode 100644 support/ld/ram.ld (limited to 'support') diff --git a/support/ld/flash.ld b/support/ld/flash.ld deleted file mode 100644 index d05aa6c..0000000 --- a/support/ld/flash.ld +++ /dev/null @@ -1,215 +0,0 @@ -/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) - * - * Version:Sourcery G++ 4.2-84 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ - -/* Linker script for STM32 (by Lanchon), - * ROM and RAM relocated to their positions - * as placed by Maple bootloader - * - * Configure target memory and included script - * according to your application requirements. */ - -/* Define memory spaces. */ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 108K -/* native - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 500K -*/ -} - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -ENTRY(_start) -SEARCH_DIR(.) -/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ -GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_lanchon_stm32) -INCLUDE names.inc -EXTERN(__cs3_interrupt_vector_lanchon_stm32) -EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) -EXTERN(_start) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); - *(.rom) - *(.rom.b) - - PROVIDE(__cs3_reset_lanchon_stm32 = _start); - __cs3_reset = __cs3_reset_lanchon_stm32; - *(.cs3.reset) - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } >rom - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >rom - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >rom - -/* expose a custom rom only section */ - .USER_FLASH : - { - *(.USER_FLASH) - } >rom - - - /* __cs3_region_end_rom is deprecated */ - __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom); - __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1; - - .data : - { - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram AT>rom - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram AT>rom - /* __cs3_region_end_ram is deprecated */ - __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_init_ram = LOADADDR (.data); - __cs3_region_init_size_ram = _edata - ADDR (.data); - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/support/ld/jtag.ld b/support/ld/jtag.ld deleted file mode 100644 index 2ba3ce6..0000000 --- a/support/ld/jtag.ld +++ /dev/null @@ -1,190 +0,0 @@ -/* Linker script for STM32 (by Lanchon), - * ROM and RAM relocated to their positions - * as placed by Maple bootloader - * - * Configure target memory and included script - * according to your application requirements. */ - -/* Define memory spaces. */ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 108K -/* native - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 500K -*/ -} - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -ENTRY(_start) -SEARCH_DIR(.) -/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ -GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_lanchon_stm32) -INCLUDE names.inc -EXTERN(__cs3_interrupt_vector_lanchon_stm32) -EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) -EXTERN(_start) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); - *(.rom) - *(.rom.b) - - PROVIDE(__cs3_reset_lanchon_stm32 = _start); - __cs3_reset = __cs3_reset_lanchon_stm32; - *(.cs3.reset) - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } >rom - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >rom - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >rom - /* __cs3_region_end_rom is deprecated */ - __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom); - __cs3_region_size_rom = LENGTH(rom); - __cs3_region_num = 1; - - .data : - { - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram AT>rom - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram AT>rom - /* __cs3_region_end_ram is deprecated */ - __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_init_ram = LOADADDR (.data); - __cs3_region_init_size_ram = _edata - ADDR (.data); - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} diff --git a/support/ld/maple/flash.ld b/support/ld/maple/flash.ld new file mode 100644 index 0000000..2d40100 --- /dev/null +++ b/support/ld/maple/flash.ld @@ -0,0 +1,211 @@ +/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) + * + * Version:Sourcery G++ 4.2-84 + * BugURL:https://support.codesourcery.com/GNUToolchain/ + * + * Copyright 2007 CodeSourcery. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. */ + +/* Linker script for STM32 (by Lanchon), + * ROM and RAM relocated to their positions + * as placed by Maple bootloader + * + * Configure target memory and included script + * according to your application requirements. */ + +/* Define memory spaces. */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K + rom (rx) : ORIGIN = 0x08005000, LENGTH = 108K +} + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +ENTRY(_start) +SEARCH_DIR(.) +/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ +GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) + +/* These force the linker to search for particular symbols from + * the start of the link process and thus ensure the user's + * overrides are picked up + */ +EXTERN(__cs3_reset_lanchon_stm32) +INCLUDE names.inc +EXTERN(__cs3_interrupt_vector_lanchon_stm32) +EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) +EXTERN(_start) + +PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); +PROVIDE(__cs3_heap_start = _end); +PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); + +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + __cs3_region_start_rom = .; + *(.cs3.region-head.rom) + __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; + *(.cs3.interrupt_vector) + /* Make sure we pulled in an interrupt vector. */ + ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); + *(.rom) + *(.rom.b) + + PROVIDE(__cs3_reset_lanchon_stm32 = _start); + __cs3_reset = __cs3_reset_lanchon_stm32; + *(.cs3.reset) + + *(.text .text.* .gnu.linkonce.t.*) + *(.plt) + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) + + *(.rodata .rodata.* .gnu.linkonce.r.*) + + *(.ARM.extab* .gnu.linkonce.armextab.*) + *(.gcc_except_table) + *(.eh_frame_hdr) + *(.eh_frame) + + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + __cs3_regions = .; + LONG (0) + LONG (__cs3_region_init_ram) + LONG (__cs3_region_start_ram) + LONG (__cs3_region_init_size_ram) + LONG (__cs3_region_zero_size_ram) + } >rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >rom + __exidx_end = .; + .text.align : + { + . = ALIGN(8); + _etext = .; + } >rom + +/* expose a custom rom only section */ + .USER_FLASH : + { + *(.USER_FLASH) + } >rom + + + /* __cs3_region_end_rom is deprecated */ + __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom); + __cs3_region_size_rom = LENGTH(rom); + __cs3_region_num = 1; + + .data : + { + __cs3_region_start_ram = .; + *(.cs3.region-head.ram) + KEEP(*(.jcr)) + *(.got.plt) *(.got) + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + *(.ram) + . = ALIGN (8); + _edata = .; + } >ram AT>rom + .bss : + { + *(.shbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + *(.ram.b) + . = ALIGN (8); + _end = .; + __end = .; + } >ram AT>rom + /* __cs3_region_end_ram is deprecated */ + __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); + __cs3_region_size_ram = LENGTH(ram); + __cs3_region_init_ram = LOADADDR (.data); + __cs3_region_init_size_ram = _edata - ADDR (.data); + __cs3_region_zero_size_ram = _end - _edata; + __cs3_region_num = 1; + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/support/ld/maple/jtag.ld b/support/ld/maple/jtag.ld new file mode 100644 index 0000000..8c5ff49 --- /dev/null +++ b/support/ld/maple/jtag.ld @@ -0,0 +1,186 @@ +/* Linker script for STM32 (by Lanchon), + * ROM and RAM relocated to their positions + * as placed by Maple bootloader + * + * Configure target memory and included script + * according to your application requirements. */ + +/* Define memory spaces. */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K + rom (rx) : ORIGIN = 0x08005000, LENGTH = 108K +} + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +ENTRY(_start) +SEARCH_DIR(.) +/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ +GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) + +/* These force the linker to search for particular symbols from + * the start of the link process and thus ensure the user's + * overrides are picked up + */ +EXTERN(__cs3_reset_lanchon_stm32) +INCLUDE names.inc +EXTERN(__cs3_interrupt_vector_lanchon_stm32) +EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) +EXTERN(_start) + +PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); +PROVIDE(__cs3_heap_start = _end); +PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); + +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + __cs3_region_start_rom = .; + *(.cs3.region-head.rom) + __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; + *(.cs3.interrupt_vector) + /* Make sure we pulled in an interrupt vector. */ + ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); + *(.rom) + *(.rom.b) + + PROVIDE(__cs3_reset_lanchon_stm32 = _start); + __cs3_reset = __cs3_reset_lanchon_stm32; + *(.cs3.reset) + + *(.text .text.* .gnu.linkonce.t.*) + *(.plt) + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) + + *(.rodata .rodata.* .gnu.linkonce.r.*) + + *(.ARM.extab* .gnu.linkonce.armextab.*) + *(.gcc_except_table) + *(.eh_frame_hdr) + *(.eh_frame) + + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + __cs3_regions = .; + LONG (0) + LONG (__cs3_region_init_ram) + LONG (__cs3_region_start_ram) + LONG (__cs3_region_init_size_ram) + LONG (__cs3_region_zero_size_ram) + } >rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >rom + __exidx_end = .; + .text.align : + { + . = ALIGN(8); + _etext = .; + } >rom + /* __cs3_region_end_rom is deprecated */ + __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom); + __cs3_region_size_rom = LENGTH(rom); + __cs3_region_num = 1; + + .data : + { + __cs3_region_start_ram = .; + *(.cs3.region-head.ram) + KEEP(*(.jcr)) + *(.got.plt) *(.got) + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + *(.ram) + . = ALIGN (8); + _edata = .; + } >ram AT>rom + .bss : + { + *(.shbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + *(.ram.b) + . = ALIGN (8); + _end = .; + __end = .; + } >ram AT>rom + /* __cs3_region_end_ram is deprecated */ + __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); + __cs3_region_size_ram = LENGTH(ram); + __cs3_region_init_ram = LOADADDR (.data); + __cs3_region_init_size_ram = _edata - ADDR (.data); + __cs3_region_zero_size_ram = _end - _edata; + __cs3_region_num = 1; + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/support/ld/maple/ram.ld b/support/ld/maple/ram.ld new file mode 100644 index 0000000..1fbecc5 --- /dev/null +++ b/support/ld/maple/ram.ld @@ -0,0 +1,220 @@ +/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) + * + * Version:Sourcery G++ 4.2-84 + * BugURL:https://support.codesourcery.com/GNUToolchain/ + * + * Copyright 2007 CodeSourcery. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. */ + +/* Linker script for STM32 (by Lanchon), + * ROM and RAM relocated to their positions + * as placed by Maple bootloader + * + * Configure target memory and included script + * according to your application requirements. */ + +/* Define memory spaces. */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K + rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K +} + + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +ENTRY(_start) +SEARCH_DIR(.) +/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ +GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) + +/* These force the linker to search for particular symbols from + * the start of the link process and thus ensure the user's + * overrides are picked up + */ +EXTERN(__cs3_reset_lanchon_stm32) +INCLUDE names.inc +EXTERN(__cs3_interrupt_vector_lanchon_stm32) +EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) +EXTERN(_start) + +PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); +PROVIDE(__cs3_heap_start = _end); +PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); + +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + __cs3_region_start_ram = .; + *(.cs3.region-head.ram) + __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; + *(.cs3.interrupt_vector) + /* Make sure we pulled in an interrupt vector. */ + ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); + + PROVIDE(__cs3_reset_lanchon_stm32 = _start); + __cs3_reset = __cs3_reset_lanchon_stm32; + *(.cs3.reset) + + *(.text .text.* .gnu.linkonce.t.*) + *(.plt) + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) + + *(.rodata .rodata.* .gnu.linkonce.r.*) + + *(.ARM.extab* .gnu.linkonce.armextab.*) + *(.gcc_except_table) + *(.eh_frame_hdr) + *(.eh_frame) + + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + __cs3_regions = .; + LONG (0) + LONG (__cs3_region_init_ram) + LONG (__cs3_region_start_ram) + LONG (__cs3_region_init_size_ram) + LONG (__cs3_region_zero_size_ram) + } >ram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + /* even cs3.rom is in ram since its running as user code under the Maple + bootloader */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >ram + __exidx_end = .; + .text.align : + { + . = ALIGN(8); + _etext = .; + } >ram + + .cs3.rom : + { + __cs3_region_start_rom = .; + *(.cs3.region-head.rom) + *(.rom) + . = ALIGN (8); + } >ram + + .cs3.rom.bss : + { + *(.rom.b) + . = ALIGN (8); + } >ram + /* __cs3_region_end_rom is deprecated */ + __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(ram); + __cs3_region_size_rom = LENGTH(ram); + __cs3_region_init_rom = LOADADDR (.cs3.rom); + __cs3_region_init_size_rom = SIZEOF(.cs3.rom); + __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss); + + .data : + { + + KEEP(*(.jcr)) + *(.got.plt) *(.got) + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + *(.ram) + . = ALIGN (8); + _edata = .; + } >ram + .bss : + { + *(.shbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + *(.ram.b) + . = ALIGN (8); + _end = .; + __end = .; + } >ram + /* __cs3_region_end_ram is deprecated */ + __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); + __cs3_region_size_ram = LENGTH(ram); + __cs3_region_init_ram = LOADADDR (.text); + __cs3_region_init_size_ram = _edata - ADDR (.text); + __cs3_region_zero_size_ram = _end - _edata; + __cs3_region_num = 1; + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } +} + diff --git a/support/ld/maple_native/flash.ld b/support/ld/maple_native/flash.ld new file mode 100644 index 0000000..7e1e453 --- /dev/null +++ b/support/ld/maple_native/flash.ld @@ -0,0 +1,211 @@ +/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) + * + * Version:Sourcery G++ 4.2-84 + * BugURL:https://support.codesourcery.com/GNUToolchain/ + * + * Copyright 2007 CodeSourcery. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. */ + +/* Linker script for STM32 (by Lanchon), + * ROM and RAM relocated to their positions + * as placed by Maple bootloader + * + * Configure target memory and included script + * according to your application requirements. */ + +/* Define memory spaces. */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K + rom (rx) : ORIGIN = 0x08005000, LENGTH = 500K +} + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +ENTRY(_start) +SEARCH_DIR(.) +/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ +GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) + +/* These force the linker to search for particular symbols from + * the start of the link process and thus ensure the user's + * overrides are picked up + */ +EXTERN(__cs3_reset_lanchon_stm32) +INCLUDE names.inc +EXTERN(__cs3_interrupt_vector_lanchon_stm32) +EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) +EXTERN(_start) + +PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); +PROVIDE(__cs3_heap_start = _end); +PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); + +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + __cs3_region_start_rom = .; + *(.cs3.region-head.rom) + __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; + *(.cs3.interrupt_vector) + /* Make sure we pulled in an interrupt vector. */ + ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); + *(.rom) + *(.rom.b) + + PROVIDE(__cs3_reset_lanchon_stm32 = _start); + __cs3_reset = __cs3_reset_lanchon_stm32; + *(.cs3.reset) + + *(.text .text.* .gnu.linkonce.t.*) + *(.plt) + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) + + *(.rodata .rodata.* .gnu.linkonce.r.*) + + *(.ARM.extab* .gnu.linkonce.armextab.*) + *(.gcc_except_table) + *(.eh_frame_hdr) + *(.eh_frame) + + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + __cs3_regions = .; + LONG (0) + LONG (__cs3_region_init_ram) + LONG (__cs3_region_start_ram) + LONG (__cs3_region_init_size_ram) + LONG (__cs3_region_zero_size_ram) + } >rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >rom + __exidx_end = .; + .text.align : + { + . = ALIGN(8); + _etext = .; + } >rom + +/* expose a custom rom only section */ + .USER_FLASH : + { + *(.USER_FLASH) + } >rom + + + /* __cs3_region_end_rom is deprecated */ + __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom); + __cs3_region_size_rom = LENGTH(rom); + __cs3_region_num = 1; + + .data : + { + __cs3_region_start_ram = .; + *(.cs3.region-head.ram) + KEEP(*(.jcr)) + *(.got.plt) *(.got) + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + *(.ram) + . = ALIGN (8); + _edata = .; + } >ram AT>rom + .bss : + { + *(.shbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + *(.ram.b) + . = ALIGN (8); + _end = .; + __end = .; + } >ram AT>rom + /* __cs3_region_end_ram is deprecated */ + __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); + __cs3_region_size_ram = LENGTH(ram); + __cs3_region_init_ram = LOADADDR (.data); + __cs3_region_init_size_ram = _edata - ADDR (.data); + __cs3_region_zero_size_ram = _end - _edata; + __cs3_region_num = 1; + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/support/ld/maple_native/jtag.ld b/support/ld/maple_native/jtag.ld new file mode 100644 index 0000000..85aae53 --- /dev/null +++ b/support/ld/maple_native/jtag.ld @@ -0,0 +1,186 @@ +/* Linker script for STM32 (by Lanchon), + * ROM and RAM relocated to their positions + * as placed by Maple bootloader + * + * Configure target memory and included script + * according to your application requirements. */ + +/* Define memory spaces. */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K + rom (rx) : ORIGIN = 0x08005000, LENGTH = 500K +} + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +ENTRY(_start) +SEARCH_DIR(.) +/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ +GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) + +/* These force the linker to search for particular symbols from + * the start of the link process and thus ensure the user's + * overrides are picked up + */ +EXTERN(__cs3_reset_lanchon_stm32) +INCLUDE names.inc +EXTERN(__cs3_interrupt_vector_lanchon_stm32) +EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) +EXTERN(_start) + +PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); +PROVIDE(__cs3_heap_start = _end); +PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); + +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + __cs3_region_start_rom = .; + *(.cs3.region-head.rom) + __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; + *(.cs3.interrupt_vector) + /* Make sure we pulled in an interrupt vector. */ + ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); + *(.rom) + *(.rom.b) + + PROVIDE(__cs3_reset_lanchon_stm32 = _start); + __cs3_reset = __cs3_reset_lanchon_stm32; + *(.cs3.reset) + + *(.text .text.* .gnu.linkonce.t.*) + *(.plt) + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) + + *(.rodata .rodata.* .gnu.linkonce.r.*) + + *(.ARM.extab* .gnu.linkonce.armextab.*) + *(.gcc_except_table) + *(.eh_frame_hdr) + *(.eh_frame) + + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + __cs3_regions = .; + LONG (0) + LONG (__cs3_region_init_ram) + LONG (__cs3_region_start_ram) + LONG (__cs3_region_init_size_ram) + LONG (__cs3_region_zero_size_ram) + } >rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >rom + __exidx_end = .; + .text.align : + { + . = ALIGN(8); + _etext = .; + } >rom + /* __cs3_region_end_rom is deprecated */ + __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom); + __cs3_region_size_rom = LENGTH(rom); + __cs3_region_num = 1; + + .data : + { + __cs3_region_start_ram = .; + *(.cs3.region-head.ram) + KEEP(*(.jcr)) + *(.got.plt) *(.got) + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + *(.ram) + . = ALIGN (8); + _edata = .; + } >ram AT>rom + .bss : + { + *(.shbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + *(.ram.b) + . = ALIGN (8); + _end = .; + __end = .; + } >ram AT>rom + /* __cs3_region_end_ram is deprecated */ + __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); + __cs3_region_size_ram = LENGTH(ram); + __cs3_region_init_ram = LOADADDR (.data); + __cs3_region_init_size_ram = _edata - ADDR (.data); + __cs3_region_zero_size_ram = _end - _edata; + __cs3_region_num = 1; + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } +} diff --git a/support/ld/maple_native/ram.ld b/support/ld/maple_native/ram.ld new file mode 100644 index 0000000..a5e1482 --- /dev/null +++ b/support/ld/maple_native/ram.ld @@ -0,0 +1,220 @@ +/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) + * + * Version:Sourcery G++ 4.2-84 + * BugURL:https://support.codesourcery.com/GNUToolchain/ + * + * Copyright 2007 CodeSourcery. + * + * The authors hereby grant permission to use, copy, modify, distribute, + * and license this software and its documentation for any purpose, provided + * that existing copyright notices are retained in all copies and that this + * notice is included verbatim in any distributions. No written agreement, + * license, or royalty fee is required for any of the authorized uses. + * Modifications to this software may be copyrighted by their authors + * and need not follow the licensing terms described here, provided that + * the new terms are clearly indicated on the first page of each file where + * they apply. */ + +/* Linker script for STM32 (by Lanchon), + * ROM and RAM relocated to their positions + * as placed by Maple bootloader + * + * Configure target memory and included script + * according to your application requirements. */ + +/* Define memory spaces. */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K + rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K +} + + +OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +ENTRY(_start) +SEARCH_DIR(.) +/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ +GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) + +/* These force the linker to search for particular symbols from + * the start of the link process and thus ensure the user's + * overrides are picked up + */ +EXTERN(__cs3_reset_lanchon_stm32) +INCLUDE names.inc +EXTERN(__cs3_interrupt_vector_lanchon_stm32) +EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) +EXTERN(_start) + +PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); +PROVIDE(__cs3_heap_start = _end); +PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); + +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + __cs3_region_start_ram = .; + *(.cs3.region-head.ram) + __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; + *(.cs3.interrupt_vector) + /* Make sure we pulled in an interrupt vector. */ + ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); + + PROVIDE(__cs3_reset_lanchon_stm32 = _start); + __cs3_reset = __cs3_reset_lanchon_stm32; + *(.cs3.reset) + + *(.text .text.* .gnu.linkonce.t.*) + *(.plt) + *(.gnu.warning) + *(.glue_7t) *(.glue_7) *(.vfp11_veneer) + + *(.rodata .rodata.* .gnu.linkonce.r.*) + + *(.ARM.extab* .gnu.linkonce.armextab.*) + *(.gcc_except_table) + *(.eh_frame_hdr) + *(.eh_frame) + + . = ALIGN(4); + KEEP(*(.init)) + + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(0x4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + __cs3_regions = .; + LONG (0) + LONG (__cs3_region_init_ram) + LONG (__cs3_region_start_ram) + LONG (__cs3_region_init_size_ram) + LONG (__cs3_region_zero_size_ram) + } >ram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + /* even cs3.rom is in ram since its running as user code under the Maple + bootloader */ + __exidx_start = .; + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } >ram + __exidx_end = .; + .text.align : + { + . = ALIGN(8); + _etext = .; + } >ram + + .cs3.rom : + { + __cs3_region_start_rom = .; + *(.cs3.region-head.rom) + *(.rom) + . = ALIGN (8); + } >ram + + .cs3.rom.bss : + { + *(.rom.b) + . = ALIGN (8); + } >ram + /* __cs3_region_end_rom is deprecated */ + __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(ram); + __cs3_region_size_rom = LENGTH(ram); + __cs3_region_init_rom = LOADADDR (.cs3.rom); + __cs3_region_init_size_rom = SIZEOF(.cs3.rom); + __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss); + + .data : + { + + KEEP(*(.jcr)) + *(.got.plt) *(.got) + *(.shdata) + *(.data .data.* .gnu.linkonce.d.*) + *(.ram) + . = ALIGN (8); + _edata = .; + } >ram + .bss : + { + *(.shbss) + *(.bss .bss.* .gnu.linkonce.b.*) + *(COMMON) + *(.ram.b) + . = ALIGN (8); + _end = .; + __end = .; + } >ram + /* __cs3_region_end_ram is deprecated */ + __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); + __cs3_region_size_ram = LENGTH(ram); + __cs3_region_init_ram = LOADADDR (.text); + __cs3_region_init_size_ram = _edata - ADDR (.text); + __cs3_region_zero_size_ram = _end - _edata; + __cs3_region_num = 1; + + .stab 0 (NOLOAD) : { *(.stab) } + .stabstr 0 (NOLOAD) : { *(.stabstr) } + /* DWARF debug sections. + * Symbols in the DWARF debugging sections are relative to the beginning + * of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } + .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } + /DISCARD/ : { *(.note.GNU-stack) } +} + diff --git a/support/ld/ram.ld b/support/ld/ram.ld deleted file mode 100644 index b9dd4ee..0000000 --- a/support/ld/ram.ld +++ /dev/null @@ -1,224 +0,0 @@ -/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) - * - * Version:Sourcery G++ 4.2-84 - * BugURL:https://support.codesourcery.com/GNUToolchain/ - * - * Copyright 2007 CodeSourcery. - * - * The authors hereby grant permission to use, copy, modify, distribute, - * and license this software and its documentation for any purpose, provided - * that existing copyright notices are retained in all copies and that this - * notice is included verbatim in any distributions. No written agreement, - * license, or royalty fee is required for any of the authorized uses. - * Modifications to this software may be copyrighted by their authors - * and need not follow the licensing terms described here, provided that - * the new terms are clearly indicated on the first page of each file where - * they apply. */ - -/* Linker script for STM32 (by Lanchon), - * ROM and RAM relocated to their positions - * as placed by Maple bootloader - * - * Configure target memory and included script - * according to your application requirements. */ - -/* Define memory spaces. */ -MEMORY -{ - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K -/* native - ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K - rom (rx) : ORIGIN = 0x08005000, LENGTH = 0K -*/ -} - - -OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") -ENTRY(_start) -SEARCH_DIR(.) -/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */ -GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a) - -/* These force the linker to search for particular symbols from - * the start of the link process and thus ensure the user's - * overrides are picked up - */ -EXTERN(__cs3_reset_lanchon_stm32) -INCLUDE names.inc -EXTERN(__cs3_interrupt_vector_lanchon_stm32) -EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end) -EXTERN(_start) - -PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram); -PROVIDE(__cs3_heap_start = _end); -PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram); - -SECTIONS -{ - .text : - { - CREATE_OBJECT_SYMBOLS - __cs3_region_start_ram = .; - *(.cs3.region-head.ram) - __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32; - *(.cs3.interrupt_vector) - /* Make sure we pulled in an interrupt vector. */ - ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector"); - - PROVIDE(__cs3_reset_lanchon_stm32 = _start); - __cs3_reset = __cs3_reset_lanchon_stm32; - *(.cs3.reset) - - *(.text .text.* .gnu.linkonce.t.*) - *(.plt) - *(.gnu.warning) - *(.glue_7t) *(.glue_7) *(.vfp11_veneer) - - *(.rodata .rodata.* .gnu.linkonce.r.*) - - *(.ARM.extab* .gnu.linkonce.armextab.*) - *(.gcc_except_table) - *(.eh_frame_hdr) - *(.eh_frame) - - . = ALIGN(4); - KEEP(*(.init)) - - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(0x4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - __cs3_regions = .; - LONG (0) - LONG (__cs3_region_init_ram) - LONG (__cs3_region_start_ram) - LONG (__cs3_region_init_size_ram) - LONG (__cs3_region_zero_size_ram) - } >ram - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - /* even cs3.rom is in ram since its running as user code under the Maple - bootloader */ - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } >ram - __exidx_end = .; - .text.align : - { - . = ALIGN(8); - _etext = .; - } >ram - - .cs3.rom : - { - __cs3_region_start_rom = .; - *(.cs3.region-head.rom) - *(.rom) - . = ALIGN (8); - } >ram - - .cs3.rom.bss : - { - *(.rom.b) - . = ALIGN (8); - } >ram - /* __cs3_region_end_rom is deprecated */ - __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(ram); - __cs3_region_size_rom = LENGTH(ram); - __cs3_region_init_rom = LOADADDR (.cs3.rom); - __cs3_region_init_size_rom = SIZEOF(.cs3.rom); - __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss); - - .data : - { - - KEEP(*(.jcr)) - *(.got.plt) *(.got) - *(.shdata) - *(.data .data.* .gnu.linkonce.d.*) - *(.ram) - . = ALIGN (8); - _edata = .; - } >ram - .bss : - { - *(.shbss) - *(.bss .bss.* .gnu.linkonce.b.*) - *(COMMON) - *(.ram.b) - . = ALIGN (8); - _end = .; - __end = .; - } >ram - /* __cs3_region_end_ram is deprecated */ - __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram); - __cs3_region_size_ram = LENGTH(ram); - __cs3_region_init_ram = LOADADDR (.text); - __cs3_region_init_size_ram = _edata - ADDR (.text); - __cs3_region_zero_size_ram = _end - _edata; - __cs3_region_num = 1; - - .stab 0 (NOLOAD) : { *(.stab) } - .stabstr 0 (NOLOAD) : { *(.stabstr) } - /* DWARF debug sections. - * Symbols in the DWARF debugging sections are relative to the beginning - * of the section so we begin them at 0. */ - /* DWARF 1 */ - .debug 0 : { *(.debug) } - .line 0 : { *(.line) } - /* GNU DWARF 1 extensions */ - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_sfnames 0 : { *(.debug_sfnames) } - /* DWARF 1.1 and DWARF 2 */ - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - /* DWARF 2 */ - .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - /* SGI/MIPS DWARF 2 extensions */ - .debug_weaknames 0 : { *(.debug_weaknames) } - .debug_funcnames 0 : { *(.debug_funcnames) } - .debug_typenames 0 : { *(.debug_typenames) } - .debug_varnames 0 : { *(.debug_varnames) } - - .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) } - .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) } - /DISCARD/ : { *(.note.GNU-stack) } -} - -- cgit v1.2.3