From 1a908d88b8c288fca89b17ceea182044d82e766e Mon Sep 17 00:00:00 2001
From: Perry Hung <iperry@alum.mit.edu>
Date: Fri, 28 May 2010 22:52:53 -0400
Subject: fix botched merge from linker-refactor

---
 support/openocd/flash.cfg | 85 +++++++++++++++++++++++++++++++++++++++++++++++
 support/openocd/run.cfg   | 75 +++++++++++++++++++++++++++++++++++++++++
 2 files changed, 160 insertions(+)
 create mode 100644 support/openocd/flash.cfg
 create mode 100644 support/openocd/run.cfg

(limited to 'support/openocd')

diff --git a/support/openocd/flash.cfg b/support/openocd/flash.cfg
new file mode 100644
index 0000000..86020bf
--- /dev/null
+++ b/support/openocd/flash.cfg
@@ -0,0 +1,85 @@
+# script for stm32
+
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout olimex-jtag
+ft2232_vid_pid 0x15ba 0x0003
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME stm32
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+# jtag speed speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so ufse F_JTAG = 1MHz
+jtag_khz 1000
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst
+
+#jtag scan chain
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # See STM Document RM0008
+  # Section 26.6.3
+   set _CPUTAPID 0x3ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+if { [info exists BSTAPID ] } {
+   # FIXME this never gets used to override defaults...
+   set _BSTAPID $BSTAPID
+} else {
+  # See STM Document RM0008
+  # Section 29.6.2
+  # Low density devices, Rev A
+  set _BSTAPID1 0x06412041
+  # Medium density devices, Rev A
+  set _BSTAPID2 0x06410041
+  # Medium density devices, Rev B and Rev Z
+  set _BSTAPID3 0x16410041
+  # High density devices, Rev A
+  set _BSTAPID4 0x06414041
+  # Connectivity line devices, Rev A and Rev Z
+  set _BSTAPID5 0x06418041
+}
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+           -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
+           -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0
+
+flash bank stm32x 0x08000000 0x00020000 0 0 $_TARGETNAME
+
+proc flash_chip {} {
+    echo "Halting..."
+    halt
+    echo "Erasing 128KB..."
+    flash erase_address 0x08000000 0x20000
+    echo "Flashing image..."
+    flash write_bank 0 build/main.bin 0
+    echo "Verifying image..."
+    verify_image build/main.bin 0x08000000 bin
+    echo "Checksum verified, resetting chip"
+    reset run
+    echo "Daemon shutdown"
+    shutdown
+}
+
+init
+flash_chip
diff --git a/support/openocd/run.cfg b/support/openocd/run.cfg
new file mode 100644
index 0000000..234a3c8
--- /dev/null
+++ b/support/openocd/run.cfg
@@ -0,0 +1,75 @@
+# script for stm32
+
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout olimex-jtag
+ft2232_vid_pid 0x15ba 0x0003
+
+if { [info exists CHIPNAME] } {
+   set  _CHIPNAME $CHIPNAME
+} else {
+   set  _CHIPNAME stm32
+}
+
+if { [info exists ENDIAN] } {
+   set  _ENDIAN $ENDIAN
+} else {
+   set  _ENDIAN little
+}
+
+# jtag speed speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so ufse F_JTAG = 1MHz
+jtag_khz 1000
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config trst_and_srst
+
+#jtag scan chain
+if { [info exists CPUTAPID ] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+  # See STM Document RM0008
+  # Section 26.6.3
+   set _CPUTAPID 0x3ba00477
+}
+
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
+
+if { [info exists BSTAPID ] } {
+   # FIXME this never gets used to override defaults...
+   set _BSTAPID $BSTAPID
+} else {
+  # See STM Document RM0008
+  # Section 29.6.2
+  # Low density devices, Rev A
+  set _BSTAPID1 0x06412041
+  # Medium density devices, Rev A
+  set _BSTAPID2 0x06410041
+  # Medium density devices, Rev B and Rev Z
+  set _BSTAPID3 0x16410041
+  # High density devices, Rev A
+  set _BSTAPID4 0x06414041
+  # Connectivity line devices, Rev A and Rev Z
+  set _BSTAPID5 0x06418041
+}
+jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
+           -expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
+           -expected-id $_BSTAPID4 -expected-id $_BSTAPID5
+
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x20000000 -work-area-size 0x5000 -work-area-backup 0
+
+flash bank stm32x 0x08000000 0x00020000 0 0 $_TARGETNAME
+
+proc nopforever {} {
+    puts "Resetting the chip..."
+    reset run
+}
+
+init
+nopforever
-- 
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