From 32e57dac2e61e79b029593eb4d34d727bcc10678 Mon Sep 17 00:00:00 2001 From: iperry Date: Thu, 17 Dec 2009 02:37:07 +0000 Subject: Initial commit of library code, moved from leaftest repo git-svn-id: https://leaflabs.googlecode.com/svn/trunk/library@69 749a229e-a60e-11de-b98f-4500b42dc123 --- src/stm32lib/examples/TIM/OCToggle/main.c | 245 ++++++++++++++++++++++++++++++ 1 file changed, 245 insertions(+) create mode 100755 src/stm32lib/examples/TIM/OCToggle/main.c (limited to 'src/stm32lib/examples/TIM/OCToggle/main.c') diff --git a/src/stm32lib/examples/TIM/OCToggle/main.c b/src/stm32lib/examples/TIM/OCToggle/main.c new file mode 100755 index 0000000..408e9ee --- /dev/null +++ b/src/stm32lib/examples/TIM/OCToggle/main.c @@ -0,0 +1,245 @@ +/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** +* File Name : main.c +* Author : MCD Application Team +* Version : V2.0.1 +* Date : 06/13/2008 +* Description : Main program body +******************************************************************************** +* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS +* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. +* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, +* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE +* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING +* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. +*******************************************************************************/ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_lib.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure; +TIM_OCInitTypeDef TIM_OCInitStructure; +vu16 CCR1_Val = 32768; +vu16 CCR2_Val = 16384; +vu16 CCR3_Val = 8192; +vu16 CCR4_Val = 4096; +ErrorStatus HSEStartUpStatus; + +/* Private function prototypes -----------------------------------------------*/ +void RCC_Configuration(void); +void GPIO_Configuration(void); +void NVIC_Configuration(void); + +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : main +* Description : Main program +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +int main(void) +{ +#ifdef DEBUG + debug(); +#endif + + /* System Clocks Configuration */ + RCC_Configuration(); + + /* NVIC Configuration */ + NVIC_Configuration(); + + /* GPIO Configuration */ + GPIO_Configuration(); + + /* --------------------------------------------------------------- + TIM2 Configuration: Output Compare Toggle Mode: + TIM2CLK = 36 MHz, Prescaler = 0x2, TIM2 counter clock = 12 MHz + CC1 update rate = TIM2 counter clock / CCR1_Val = 366.2 Hz + CC2 update rate = TIM2 counter clock / CCR2_Val = 732.4 Hz + CC3 update rate = TIM2 counter clock / CCR3_Val = 1464.8 Hz + CC4 update rate = TIM2 counter clock / CCR4_Val = 2929.6 Hz + --------------------------------------------------------------- */ + + /* Time base configuration */ + TIM_TimeBaseStructure.TIM_Period = 65535; + TIM_TimeBaseStructure.TIM_Prescaler = 2; + TIM_TimeBaseStructure.TIM_ClockDivision = 0; + TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; + + TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); + + /* Output Compare Toggle Mode configuration: Channel1 */ + TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_Toggle; + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR1_Val; + TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_Low; + TIM_OC1Init(TIM2, &TIM_OCInitStructure); + + TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* Output Compare Toggle Mode configuration: Channel2 */ + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR2_Val; + + TIM_OC2Init(TIM2, &TIM_OCInitStructure); + + TIM_OC2PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* Output Compare Toggle Mode configuration: Channel3 */ + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR3_Val; + + TIM_OC3Init(TIM2, &TIM_OCInitStructure); + + TIM_OC3PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* Output Compare Toggle Mode configuration: Channel4 */ + TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable; + TIM_OCInitStructure.TIM_Pulse = CCR4_Val; + + TIM_OC4Init(TIM2, &TIM_OCInitStructure); + + TIM_OC4PreloadConfig(TIM2, TIM_OCPreload_Disable); + + /* TIM enable counter */ + TIM_Cmd(TIM2, ENABLE); + + /* TIM IT enable */ + TIM_ITConfig(TIM2, TIM_IT_CC1 | TIM_IT_CC2 | TIM_IT_CC3 | TIM_IT_CC4, ENABLE); + + while (1) + {} +} + +/******************************************************************************* +* Function Name : RCC_Configuration +* Description : Configures the different system clocks. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void RCC_Configuration(void) +{ + /* RCC system reset(for debug purpose) */ + RCC_DeInit(); + + /* Enable HSE */ + RCC_HSEConfig(RCC_HSE_ON); + + /* Wait till HSE is ready */ + HSEStartUpStatus = RCC_WaitForHSEStartUp(); + + if (HSEStartUpStatus == SUCCESS) + { + /* Enable Prefetch Buffer */ + FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable); + + /* Flash 2 wait state */ + FLASH_SetLatency(FLASH_Latency_2); + + /* HCLK = SYSCLK */ + RCC_HCLKConfig(RCC_SYSCLK_Div1); + + /* PCLK2 = HCLK */ + RCC_PCLK2Config(RCC_HCLK_Div1); + + /* PCLK1 = HCLK/4 */ + RCC_PCLK1Config(RCC_HCLK_Div4); + + /* PLLCLK = 8MHz * 9 = 72 MHz */ + RCC_PLLConfig(RCC_PLLSource_HSE_Div1, RCC_PLLMul_9); + + /* Enable PLL */ + RCC_PLLCmd(ENABLE); + + /* Wait till PLL is ready */ + while (RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET) + {} + + /* Select PLL as system clock source */ + RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK); + + /* Wait till PLL is used as system clock source */ + while (RCC_GetSYSCLKSource() != 0x08) + {} + } + + /* TIM2 clock enable */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); + + /* GPIOA clock enable */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE); +} + +/******************************************************************************* +* Function Name : GPIO_Configuration +* Description : Configure the TIM2 Pins. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void GPIO_Configuration(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* GPIOA Configuration:TIM2 Channel1, 2, 3 and 4 as alternate function push-pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + + GPIO_Init(GPIOA, &GPIO_InitStructure); +} + +/******************************************************************************* +* Function Name : NVIC_Configuration +* Description : Configure the nested vectored interrupt controller. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void NVIC_Configuration(void) +{ + NVIC_InitTypeDef NVIC_InitStructure; + +#ifdef VECT_TAB_RAM + /* Set the Vector Table base location at 0x20000000 */ + NVIC_SetVectorTable(NVIC_VectTab_RAM, 0x0); +#else /* VECT_TAB_FLASH */ + /* Set the Vector Table base location at 0x08000000 */ + NVIC_SetVectorTable(NVIC_VectTab_FLASH, 0x0); +#endif + + /* Enable the TIM2 global Interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQChannel; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +} + +#ifdef DEBUG +/******************************************************************************* +* Function Name : assert_failed +* Description : Reports the name of the source file and the source line number +* where the assert_param error has occurred. +* Input : - file: pointer to the source file name +* - line: assert_param error line source number +* Output : None +* Return : None +*******************************************************************************/ +void assert_failed(u8* file, u32 line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + while (1) + {} +} +#endif +/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3