From a8aaabae4c1cc64a01d740a436336ca31c1f79ba Mon Sep 17 00:00:00 2001 From: iperry Date: Thu, 17 Dec 2009 02:46:08 +0000 Subject: removed extraneous files, stm32lib examples git-svn-id: https://leaflabs.googlecode.com/svn/trunk/library@70 749a229e-a60e-11de-b98f-4500b42dc123 --- src/stm32lib/examples/DMA/FSMC/fsmc_sram.c | 161 ----------------------------- 1 file changed, 161 deletions(-) delete mode 100755 src/stm32lib/examples/DMA/FSMC/fsmc_sram.c (limited to 'src/stm32lib/examples/DMA/FSMC/fsmc_sram.c') diff --git a/src/stm32lib/examples/DMA/FSMC/fsmc_sram.c b/src/stm32lib/examples/DMA/FSMC/fsmc_sram.c deleted file mode 100755 index ea7d248..0000000 --- a/src/stm32lib/examples/DMA/FSMC/fsmc_sram.c +++ /dev/null @@ -1,161 +0,0 @@ -/******************** (C) COPYRIGHT 2008 STMicroelectronics ******************** -* File Name : fsmc_sram.c -* Author : MCD Application Team -* Version : V2.0.1 -* Date : 06/13/2008 -* Description : This file provides a set of functions needed to drive the -* IS61WV51216BLL SRAM memory mounted on STM3210E-EVAL board. -******************************************************************************** -* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS -* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME. -* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT, -* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE -* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING -* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. -*******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ -#include "fsmc_sram.h" - -/* Private typedef -----------------------------------------------------------*/ -/* Private define ------------------------------------------------------------*/ -#define Bank1_SRAM3_ADDR ((u32)0x68000000) - -/* Private macro -------------------------------------------------------------*/ -/* Private variables ---------------------------------------------------------*/ -/* Private function prototypes -----------------------------------------------*/ -/* Private functions ---------------------------------------------------------*/ - -/******************************************************************************* -* Function Name : FSMC_SRAM_Init -* Description : Configures the FSMC and GPIOs to interface with the SRAM memory. -* This function must be called before any write/read operation -* on the SRAM. -* Input : None -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_SRAM_Init(void) -{ - FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; - FSMC_NORSRAMTimingInitTypeDef p; - GPIO_InitTypeDef GPIO_InitStructure; - - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOG | RCC_APB2Periph_GPIOE | - RCC_APB2Periph_GPIOF, ENABLE); - -/*-- GPIO Configuration ------------------------------------------------------*/ - /* SRAM Data lines configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | - GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15; - GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; - GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; - GPIO_Init(GPIOD, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | - GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | - GPIO_Pin_15; - GPIO_Init(GPIOE, &GPIO_InitStructure); - - /* SRAM Address lines configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | - GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | - GPIO_Pin_14 | GPIO_Pin_15; - GPIO_Init(GPIOF, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | - GPIO_Pin_4 | GPIO_Pin_5; - GPIO_Init(GPIOG, &GPIO_InitStructure); - - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13; - GPIO_Init(GPIOD, &GPIO_InitStructure); - - /* NOE and NWE configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5; - GPIO_Init(GPIOD, &GPIO_InitStructure); - - /* NE3 configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10; - GPIO_Init(GPIOG, &GPIO_InitStructure); - - /* NBL0, NBL1 configuration */ - GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; - GPIO_Init(GPIOE, &GPIO_InitStructure); - -/*-- FSMC Configuration ------------------------------------------------------*/ - p.FSMC_AddressSetupTime = 0; - p.FSMC_AddressHoldTime = 0; - p.FSMC_DataSetupTime = 2; - p.FSMC_BusTurnAroundDuration = 0; - p.FSMC_CLKDivision = 0; - p.FSMC_DataLatency = 0; - p.FSMC_AccessMode = FSMC_AccessMode_A; - - FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; - FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; - FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; - FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; - FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; - FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; - FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; - FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; - FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; - FSMC_NORSRAMInitStructure.FSMC_AsyncWait = FSMC_AsyncWait_Disable; - FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; - FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; - FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; - - FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); - - /* Enable FSMC Bank1_SRAM Bank */ - FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); -} - -/******************************************************************************* -* Function Name : FSMC_SRAM_WriteBuffer -* Description : Writes a Half-word buffer to the FSMC SRAM memory. -* Input : - pBuffer : pointer to buffer. -* - WriteAddr : SRAM memory internal address from which the data -* will be written. -* - NumHalfwordToWrite : number of half-words to write. -* -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_SRAM_WriteBuffer(u16* pBuffer, u32 WriteAddr, u32 NumHalfwordToWrite) -{ - for(; NumHalfwordToWrite != 0; NumHalfwordToWrite--) /* while there is data to write */ - { - /* Transfer data to the memory */ - *(u16 *) (Bank1_SRAM3_ADDR + WriteAddr) = *pBuffer++; - - /* Increment the address*/ - WriteAddr += 2; - } -} - -/******************************************************************************* -* Function Name : FSMC_SRAM_ReadBuffer -* Description : Reads a block of data from the FSMC SRAM memory. -* Input : - pBuffer : pointer to the buffer that receives the data read -* from the SRAM memory. -* - ReadAddr : SRAM memory internal address to read from. -* - NumHalfwordToRead : number of half-words to read. -* Output : None -* Return : None -*******************************************************************************/ -void FSMC_SRAM_ReadBuffer(u16* pBuffer, u32 ReadAddr, u32 NumHalfwordToRead) -{ - for(; NumHalfwordToRead != 0; NumHalfwordToRead--) /* while there is data to read */ - { - /* Read a half-word from the memory */ - *pBuffer++ = *(vu16*) (Bank1_SRAM3_ADDR + ReadAddr); - - /* Increment the address*/ - ReadAddr += 2; - } -} - -/******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/ -- cgit v1.2.3