From ce9c1210356c758a7e1d322521e5eda25cecde63 Mon Sep 17 00:00:00 2001 From: bnewbold Date: Sat, 13 Jun 2015 18:33:12 -0700 Subject: stm32f2-f4: refactor header guards, doxygen comments --- libmaple/stm32f2-f4/include/series/pwr.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'libmaple/stm32f2-f4/include/series/pwr.h') diff --git a/libmaple/stm32f2-f4/include/series/pwr.h b/libmaple/stm32f2-f4/include/series/pwr.h index aee6eff..ed30cce 100644 --- a/libmaple/stm32f2-f4/include/series/pwr.h +++ b/libmaple/stm32f2-f4/include/series/pwr.h @@ -27,11 +27,11 @@ /** * @file libmaple/stm32f2-f4/include/series/pwr.h * @author Marti Bolivar - * @brief STM32F2 Power control (PWR) support. + * @brief STM32F2-F4 Power control (PWR) support. */ -#ifndef _LIBMAPLE_STM32F2_PWR_H_ -#define _LIBMAPLE_STM32F2_PWR_H_ +#ifndef _LIBMAPLE_STM32F2F4_PWR_H_ +#define _LIBMAPLE_STM32F2F4_PWR_H_ /* * Additional register bits @@ -41,11 +41,11 @@ /** * @brief Flash power down in stop mode bit. - * Availability: STM32F2 */ + * Availability: STM32F2-F4 */ #define PWR_CR_FPDS_BIT 9 /** * @brief Flash power down in stop mode. - * Availability: STM32F2 */ + * Availability: STM32F2-F4 */ #define PWR_CR_FPDS (1U << PWR_CR_FPDS_BIT) /* PVD level selection */ -- cgit v1.2.3