From 9fadd89bd9ce6de5377a493f46ba5212097b2204 Mon Sep 17 00:00:00 2001
From: Marti Bolivar <mbolivar@leaflabs.com>
Date: Tue, 29 Nov 2011 15:54:59 -0500
Subject: Make BKP support STM32F1-only.

- libmaple/bkp.h: Mark availability restriction.

- Move libmaple/bkp.c to libmaple/stm32f1; adjust rules.mk files
  accordingly.

Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
---
 libmaple/stm32f1/bkp.c    | 129 ++++++++++++++++++++++++++++++++++++++++++++++
 libmaple/stm32f1/rules.mk |   1 +
 2 files changed, 130 insertions(+)
 create mode 100644 libmaple/stm32f1/bkp.c

(limited to 'libmaple/stm32f1')

diff --git a/libmaple/stm32f1/bkp.c b/libmaple/stm32f1/bkp.c
new file mode 100644
index 0000000..62783e7
--- /dev/null
+++ b/libmaple/stm32f1/bkp.c
@@ -0,0 +1,129 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file bkp.c
+ * @brief Backup register support.
+ */
+
+#include <libmaple/bkp.h>
+#include <libmaple/pwr.h>
+#include <libmaple/rcc.h>
+#include <libmaple/bitband.h>
+
+static inline __io uint32* data_register(uint8 reg);
+
+bkp_dev bkp = {
+    .regs = BKP_BASE,
+};
+/** Backup device. */
+const bkp_dev *BKP = &bkp;
+
+/**
+ * @brief Initialize backup interface.
+ *
+ * Enables the power and backup interface clocks, and resets the
+ * backup device.
+ */
+void bkp_init(void) {
+    /* Don't call pwr_init(), or you'll reset the device.  We just
+     * need the clock. */
+    rcc_clk_enable(RCC_PWR);
+    rcc_clk_enable(RCC_BKP);
+    rcc_reset_dev(RCC_BKP);
+}
+
+/**
+ * Enable write access to the backup registers.  Backup interface must
+ * be initialized for subsequent register writes to work.
+ * @see bkp_init()
+ */
+void bkp_enable_writes(void) {
+    *bb_perip(&PWR_BASE->CR, PWR_CR_DBP) = 1;
+}
+
+/**
+ * Disable write access to the backup registers.
+ */
+void bkp_disable_writes(void) {
+    *bb_perip(&PWR_BASE->CR, PWR_CR_DBP) = 0;
+}
+
+/**
+ * Read a value from given backup data register.
+ * @param reg Data register to read, from 1 to BKP_NR_DATA_REGS (10 on
+ *            medium-density devices, 42 on high-density devices).
+ */
+uint16 bkp_read(uint8 reg) {
+    __io uint32* dr = data_register(reg);
+    if (!dr) {
+        ASSERT(0);                  /* nonexistent register */
+        return 0;
+    }
+    return (uint16)*dr;
+}
+
+/**
+ * @brief Write a value to given data register.
+ *
+ * Write access to backup registers must be enabled.
+ *
+ * @param reg Data register to write, from 1 to BKP_NR_DATA_REGS (10
+ *            on medium-density devices, 42 on high-density devices).
+ * @param val Value to write into the register.
+ * @see bkp_enable_writes()
+ */
+void bkp_write(uint8 reg, uint16 val) {
+    __io uint32* dr = data_register(reg);
+    if (!dr) {
+        ASSERT(0);                  /* nonexistent register */
+        return;
+    }
+    *dr = (uint32)val;
+}
+
+/*
+ * Data register memory layout is not contiguous. It's split up from
+ * 1--NR_LOW_DRS, beginning at BKP_BASE->DR1, through to
+ * (NR_LOW_DRS+1)--BKP_NR_DATA_REGS, beginning at BKP_BASE->DR11.
+ */
+#define NR_LOW_DRS 10
+
+static inline __io uint32* data_register(uint8 reg) {
+    if (reg < 1 || reg > BKP_NR_DATA_REGS) {
+        return 0;
+    }
+
+#if BKP_NR_DATA_REGS == NR_LOW_DRS
+    return (uint32*)BKP_BASE + reg;
+#else
+    if (reg <= NR_LOW_DRS) {
+        return (uint32*)BKP_BASE + reg;
+    } else {
+        return (uint32*)&(BKP_BASE->DR11) + (reg - NR_LOW_DRS - 1);
+    }
+#endif
+}
diff --git a/libmaple/stm32f1/rules.mk b/libmaple/stm32f1/rules.mk
index 5267e9b..32b3a2c 100644
--- a/libmaple/stm32f1/rules.mk
+++ b/libmaple/stm32f1/rules.mk
@@ -14,6 +14,7 @@ sSRCS_$(d) := isrs_performance.S            \
 cSRCS_$(d) := rcc.c
 cSRCS_$(d) += flash.c
 cSRCS_$(d) += gpio.c
+cSRCS_$(d) += bkp.c
 
 sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%)
 cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%)
-- 
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