From 94ddccd06c20cc8e7fef34fe53d7b550b64d65da Mon Sep 17 00:00:00 2001
From: Marti Bolivar <mbolivar@leaflabs.com>
Date: Fri, 29 Jun 2012 20:34:40 -0400
Subject: ADC: Doxygen fixups

Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
---
 libmaple/stm32f1/adc.c                |  3 +++
 libmaple/stm32f1/include/series/adc.h | 23 +++++++++++------------
 2 files changed, 14 insertions(+), 12 deletions(-)

(limited to 'libmaple/stm32f1')

diff --git a/libmaple/stm32f1/adc.c b/libmaple/stm32f1/adc.c
index ecfbc1c..6409c37 100644
--- a/libmaple/stm32f1/adc.c
+++ b/libmaple/stm32f1/adc.c
@@ -68,6 +68,9 @@ const adc_dev *ADC3 = &adc3;
 
 /**
  * @brief Calibrate an ADC peripheral
+ *
+ * Availability: STM32F1.
+ *
  * @param dev adc device
  */
 void adc_calibrate(const adc_dev *dev) {
diff --git a/libmaple/stm32f1/include/series/adc.h b/libmaple/stm32f1/include/series/adc.h
index 774c97c..79d8107 100644
--- a/libmaple/stm32f1/include/series/adc.h
+++ b/libmaple/stm32f1/include/series/adc.h
@@ -53,11 +53,11 @@ extern const struct adc_dev *ADC3;
  * Register map base pointers
  */
 
-/** ADC1 register map base pointer. */
+/** STM32F1 ADC1 register map base pointer. */
 #define ADC1_BASE                       ((struct adc_reg_map*)0x40012400)
-/** ADC2 register map base pointer. */
+/** STM32F1 ADC2 register map base pointer. */
 #define ADC2_BASE                       ((struct adc_reg_map*)0x40012800)
-/** ADC3 register map base pointer. */
+/** STM32F1 ADC3 register map base pointer. */
 #define ADC3_BASE                       ((struct adc_reg_map*)0x40013C00)
 
 /*
@@ -205,11 +205,6 @@ typedef enum adc_extsel_event {
  * @brief STM32F1 sample times, in ADC clock cycles.
  *
  * These control the amount of time spent sampling the input voltage.
- *
- * IMPORTANT: maximum external impedance must be below 0.4kOhms for
- * 1.5 cycle sampling time. At 55.5 cycles/sample, the external input
- * impedance must be at most 50kOhms. See your device's datasheet for
- * more information.
  */
 typedef enum adc_smp_rate {
     ADC_SMPR_1_5,               /**< 1.5 ADC cycles */
@@ -226,10 +221,14 @@ typedef enum adc_smp_rate {
  * @brief STM32F1 ADC prescalers, as divisors of PCLK2.
  */
 typedef enum adc_prescaler {
-    ADC_PRE_PCLK2_DIV_2 = RCC_ADCPRE_PCLK_DIV_2, /** PCLK2 divided by 2 */
-    ADC_PRE_PCLK2_DIV_4 = RCC_ADCPRE_PCLK_DIV_4, /** PCLK2 divided by 4 */
-    ADC_PRE_PCLK2_DIV_6 = RCC_ADCPRE_PCLK_DIV_6, /** PCLK2 divided by 6 */
-    ADC_PRE_PCLK2_DIV_8 = RCC_ADCPRE_PCLK_DIV_8, /** PCLK2 divided by 8 */
+    /** PCLK2 divided by 2 */
+    ADC_PRE_PCLK2_DIV_2 = RCC_ADCPRE_PCLK_DIV_2,
+    /** PCLK2 divided by 4 */
+    ADC_PRE_PCLK2_DIV_4 = RCC_ADCPRE_PCLK_DIV_4,
+    /** PCLK2 divided by 6 */
+    ADC_PRE_PCLK2_DIV_6 = RCC_ADCPRE_PCLK_DIV_6,
+    /** PCLK2 divided by 8 */
+    ADC_PRE_PCLK2_DIV_8 = RCC_ADCPRE_PCLK_DIV_8,
 } adc_prescaler;
 
 /*
-- 
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