From bf0f839fb1d7d8075b148e2e6788479a36f56b7e Mon Sep 17 00:00:00 2001
From: Marti Bolivar <mbolivar@leaflabs.com>
Date: Mon, 26 Mar 2012 19:39:49 -0400
Subject: Resurrect PWR support for F1 and F2.

Just add the missing register bit definitions in new series headers.

Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
---
 libmaple/rules.mk | 1 +
 1 file changed, 1 insertion(+)

(limited to 'libmaple/rules.mk')

diff --git a/libmaple/rules.mk b/libmaple/rules.mk
index 4c2a40f..b12e3ff 100644
--- a/libmaple/rules.mk
+++ b/libmaple/rules.mk
@@ -14,6 +14,7 @@ CFLAGS_$(d) = $(LIBMAPLE_PRIVATE_INCLUDES) $(LIBMAPLE_INCLUDES) -Wall -Werror
 cSRCS_$(d) := flash.c
 cSRCS_$(d) += gpio.c
 cSRCS_$(d) += nvic.c
+cSRCS_$(d) += pwr.c
 cSRCS_$(d) += rcc.c
 cSRCS_$(d) += syscalls.c
 cSRCS_$(d) += systick.c
-- 
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