From 0f55cc0d89dc018aa1a2e7ad1c926889f98ec26d Mon Sep 17 00:00:00 2001 From: bnewbold Date: Thu, 5 Aug 2010 21:47:12 -0400 Subject: partial progress on FSMC for SRAM --- examples/test-fsmc.cpp | 149 +++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 149 insertions(+) create mode 100644 examples/test-fsmc.cpp (limited to 'examples') diff --git a/examples/test-fsmc.cpp b/examples/test-fsmc.cpp new file mode 100644 index 0000000..a4e43d6 --- /dev/null +++ b/examples/test-fsmc.cpp @@ -0,0 +1,149 @@ +/* ***************************************************************************** + * The MIT License + * + * Copyright (c) 2010 LeafLabs LLC. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * ****************************************************************************/ + +/** + * @brief Sample main.cpp file. Sends "Hello world!" out SPI1. + * + * SPI1 is set up to be a master transmitter at 4.5MHz, little endianness, + * and SPI mode 0. + * + * Pin 10 is used as Chip Select + * + */ + +#include "wirish.h" +#include "fsmc.h" +#include "rcc.h" +#include "gpio.h" + +#define LED_PIN 23 +#define DISC_PIN 14 + +// System control block registers +#define SCB_BASE (SCB_Reg*)(0xE000ED00) + +typedef struct { + volatile uint32 CPUID; + volatile uint32 ICSR; + volatile uint32 VTOR; + volatile uint32 AIRCR; + volatile uint32 SCR; + volatile uint32 CCR; + volatile uint32 SHPR1; + volatile uint32 SHPR2; + volatile uint32 SHPR3; + volatile uint32 SHCRS; + volatile uint32 CFSR; + volatile uint32 HFSR; + uint32 pad1; + volatile uint32 MMAR; + volatile uint32 BFAR; +} SCB_Reg; + +SCB_Reg *scb; + +uint16 *ptr; +int toggle = 0; + +void setup() { + uint32 id; + scb = (SCB_Reg*)SCB_BASE; + + rcc_enable_clk_fsmc(); + + pinMode(LED_PIN, OUTPUT); + pinMode(DISC_PIN, OUTPUT); + digitalWrite(DISC_PIN,1); + digitalWrite(LED_PIN,1); + + Serial1.begin(9600); + Serial1.println("Hello World!"); + + Serial1.print("Init... "); + fsmc_native_sram_init(); + Serial1.println("Done."); + + + ptr = (uint16*)(0x60000000); + //ptr = (uint16*)(0x68000000); + //ptr = (uint16*)(0x80000000); + Serial1.print("Writing... "); + + *ptr = 0xFFFF; + Serial1.println("Done."); + + Serial1.print("Reading... "); + id = *ptr; + Serial1.print("Done: "); + Serial1.println(id,BIN); + + /* + Serial1.print("CPUID is at: "); + id = (uint32)(&(scb->CPUID)); + Serial1.println(id,BIN); + */ + + Serial1.print("CPUID: "); + id = scb->CPUID; + Serial1.println(id,BIN); + Serial1.print("ICSR: "); + id = scb->ICSR; + Serial1.println(id,BIN); + Serial1.print("CFSR: "); + id = scb->CFSR; + Serial1.println(id,BIN); + Serial1.print("HFSR: "); + id = scb->HFSR; + Serial1.println(id,BIN); + Serial1.print("MMAR: "); + id = scb->MMAR; + Serial1.println(id,BIN); + Serial1.print("BFAR: "); + id = scb->BFAR; + Serial1.println(id,BIN); + +} + +void loop() { + digitalWrite(LED_PIN, toggle); + toggle ^= 1; + delay(100); + + *ptr = 0xFFFF; + /* + Serial1.print((uint32)(ptr),HEX); + Serial1.print(": "); + Serial1.println(*ptr,BIN); + */ +} + +int main(void) { + init(); + setup(); + + while (1) { + loop(); + } + return 0; +} -- cgit v1.2.3 From 314846bee32479f8fd6aae46c508fdc7ff8e0a95 Mon Sep 17 00:00:00 2001 From: bnewbold Date: Thu, 5 Aug 2010 20:58:51 -0400 Subject: Partially working! Documented; see ./notes/fsmc.txt. Not yet integrated into .ld scripts or fully tested --- examples/test-fsmc.cpp | 80 ++++++++++++++++++-------------------------------- libmaple/exc.c | 1 - libmaple/fsmc.c | 25 +++++++++------- notes/fsmc.txt | 51 ++++++++++++++++++++++---------- 4 files changed, 79 insertions(+), 78 deletions(-) (limited to 'examples') diff --git a/examples/test-fsmc.cpp b/examples/test-fsmc.cpp index a4e43d6..6449cfd 100644 --- a/examples/test-fsmc.cpp +++ b/examples/test-fsmc.cpp @@ -1,48 +1,17 @@ -/* ***************************************************************************** - * The MIT License - * - * Copyright (c) 2010 LeafLabs LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * ****************************************************************************/ - -/** - * @brief Sample main.cpp file. Sends "Hello world!" out SPI1. - * - * SPI1 is set up to be a master transmitter at 4.5MHz, little endianness, - * and SPI mode 0. - * - * Pin 10 is used as Chip Select - * - */ #include "wirish.h" #include "fsmc.h" #include "rcc.h" #include "gpio.h" -#define LED_PIN 23 -#define DISC_PIN 14 +#define LED_PIN 23 // hack for maple native +#define DISC_PIN 14 // hack for USB on native // System control block registers #define SCB_BASE (SCB_Reg*)(0xE000ED00) +// This stuff should ultimately get moved to util.h or scb.h or w/e. +// Also in interactive test program and the HardFault IRQ handler. typedef struct { volatile uint32 CPUID; volatile uint32 ICSR; @@ -65,6 +34,7 @@ SCB_Reg *scb; uint16 *ptr; int toggle = 0; +int count = 0; void setup() { uint32 id; @@ -84,26 +54,20 @@ void setup() { fsmc_native_sram_init(); Serial1.println("Done."); - + // Start of channel1 SRAM bank (through to 0x63FFFFFF, though only a chunk + // of this is valid) ptr = (uint16*)(0x60000000); - //ptr = (uint16*)(0x68000000); - //ptr = (uint16*)(0x80000000); - Serial1.print("Writing... "); - *ptr = 0xFFFF; + Serial1.print("Writing... "); + *ptr = 0x1234; Serial1.println("Done."); Serial1.print("Reading... "); id = *ptr; - Serial1.print("Done: "); - Serial1.println(id,BIN); - - /* - Serial1.print("CPUID is at: "); - id = (uint32)(&(scb->CPUID)); + Serial1.print("Done: "); // shouldn't be 0xFFFFFFFF Serial1.println(id,BIN); - */ + Serial1.println("Dumping System Control Block Registers"); Serial1.print("CPUID: "); id = scb->CPUID; Serial1.println(id,BIN); @@ -122,20 +86,32 @@ void setup() { Serial1.print("BFAR: "); id = scb->BFAR; Serial1.println(id,BIN); - + + Serial1.println("Now testing all memory addresses... (will hardfault at the end)"); + delay(3000); } void loop() { digitalWrite(LED_PIN, toggle); toggle ^= 1; - delay(100); + delay(1); - *ptr = 0xFFFF; - /* + ptr = (uint16*)(0x60000000); + count = 0; + for(int i = 0; i<1024; i++) { + count++; + ptr++; + *ptr = (0x0000FFFF & count); + //delay(10); // tweak this to test SRAM resiliance over time + if(*ptr != (0x0000FFFF & count)) { + Serial1.println("ERROR: mismatch, halting"); + while(1) { } + } + } + Serial1.print((uint32)(ptr),HEX); Serial1.print(": "); Serial1.println(*ptr,BIN); - */ } int main(void) { diff --git a/libmaple/exc.c b/libmaple/exc.c index 3d01492..dd02476 100644 --- a/libmaple/exc.c +++ b/libmaple/exc.c @@ -38,7 +38,6 @@ void NMIException(void) { } void HardFaultException(void) { - return; ASSERT(0); while(1) ; diff --git a/libmaple/fsmc.c b/libmaple/fsmc.c index 17431f5..4e25ef6 100644 --- a/libmaple/fsmc.c +++ b/libmaple/fsmc.c @@ -28,12 +28,14 @@ #include "gpio.h" #include "fsmc.h" -#define FSMC_ADDSET 0x5 -#define FSMC_DATAST 0x5 - -// Setup the FSMC peripheral to use the SRAM chip on the maple native -// as an external segment of memory space. -// This is for the IS62WV51216BLL 8meg 55ns chip +// These values determined for a particular SRAM chip by following the +// calculations in the ST FSMC application note. +#define FSMC_ADDSET 0x0 +#define FSMC_DATAST 0x3 + +// Sets up the FSMC peripheral to use the SRAM chip on the maple native as an +// external segment of system memory space. +// This implementation is for the IS62WV51216BLL 8mbit chip (55ns timing) void fsmc_native_sram_init(void) { FSMC_Bank *bank; @@ -87,8 +89,8 @@ void fsmc_native_sram_init(void) { gpio_set_mode(GPIOE_BASE, 0, MODE_AF_OUTPUT_PP); // NBL0 gpio_set_mode(GPIOE_BASE, 1, MODE_AF_OUTPUT_PP); // NBL1 - // Then we configure the FSMC SRAM channel 1 peripheral - // (the SRAM part of the FSMC is "bank 1") + // Then we configure channel 1 the FSMC SRAM peripheral + // (all SRAM channels are in "Bank 1" of the FSMC) bank = (FSMC_Bank*)(FSMC1_BASE); // Everything else is cleared (BCR1) @@ -104,6 +106,9 @@ void fsmc_native_sram_init(void) { // Memory is nonmultiplexed bank->BCR &= ~(FSMC_BCR_MUXEN); // '0' + // Need write enable to write to the chip + bank->BCR |= FSMC_BCR_WREN; + // Set ADDSET bank->BTR &= ~(FSMC_BTR_ADDSET); bank->BTR |= (FSMC_BTR_ADDSET | FSMC_ADDSET); @@ -112,9 +117,9 @@ void fsmc_native_sram_init(void) { bank->BTR &= ~(FSMC_BTR_DATAST); bank->BTR |= (FSMC_BTR_DATAST | (FSMC_DATAST << 8)); - // Enable bank1 + // Enable channel 1 bank->BCR |= FSMC_BCR_MBKEN; // '1' - // FSMC_BWTR3 not used + // FSMC_BWTR3 not used for this simple configuration. } diff --git a/notes/fsmc.txt b/notes/fsmc.txt index 583dba2..b41de60 100644 --- a/notes/fsmc.txt +++ b/notes/fsmc.txt @@ -1,18 +1,32 @@ -FSMC notes (for maple native) +FSMC notes (for maple native and other "high density" STM32 devices) ------------------------------------------------------------------------------- There is an application note for all this which is helpful; see the ST website. -Chip details +SRAM chip details IS62WV51216BLL 512k x 16 19 address input 16 data inputs + t_wc (write cycle) = 55ns + t_rc (write cycle) = 55ns + t_pwe1 (write enable low pulse) = 40ns + t_aa (address access) = 55ns -For simple debugging, i'm going to set all the access parameters to maximum -time values (aka, slowest). I'm going to use not-extended mode 1 for -read/write. + +The FSMC nomenclature is very confusing. There are three seperate "banks" +(which I will call "peripheral banks") each of specialized for different types +of external memory (NOR flash, NAND flash, SRAM, etc). We use the one for +"PSRAM" with our SRAM chip; it's bank #1. The SRAM peripheral bank is further +split into 4 "banks" (which I will call "channels") to support multiple +external devices with chip select pins. I think what's going on is that there +are 4 hardware peripherals and many sections of RAM; the docs are confusing +about what's a "block of memeory" and what's an "FSMC block". + +Anyways, this all takes place on the AHB memory bus. + +I'm going to use not-extended mode 1 for read/write. Steps from application note: @@ -22,21 +36,28 @@ Steps from application note: - memory is nonmultiplexed: BCR3_MEXEN is reset (= '0') - everything else is cleared -Parameters: - - t_wc (write cycle) = 55ns - t_rc (write cycle) = 55ns - t_pwe1 (write enable low pulse) = 40ns - t_aa (address access) = 55ns +But not true! Actually write enable needs to be set. -So address setup (ADDSET) = 0x0, data setup (DATAST) = 0x3 +Using the application note, which is based around a very similar chip (with +faster timing), I calculated an ADDSET (address setup) value of 0x0 and a +DATAST (data setup) value of 0x3. -Using bank1, NOR/PSRAM1 memory starts at 0x60000000. +Using channel1, NOR/PSRAM1 memory starts at 0x60000000. -Oops, obviously have to turn on the clock for all those GPIO pins... +Have to turn on the RCC clock for all those GPIO pins, but don't need to use +any interrupts. Not-super-helpful-link: http://www.keil.com/support/man/docs/mcbstm32e/mcbstm32e_to_xmemory.htm -PG9 (which is NE2) is twiddling on reset? +Note the possible confusion with address spaces, bitwidths, rollovers, etc. + + +TODO +------------------------------------------------------------------------------- +- more rigorous testing: throughput, latency, bounds checking, bitwidth, data + resiliance, etc. +- update .ld scripts to transparently make use of this external memory +- test/demo using a seperate external SRAM chip or screen +- write up documentation -- cgit v1.2.3 From 7b391d7f76a2d56242420c560d65f00a60f78682 Mon Sep 17 00:00:00 2001 From: bnewbold Date: Sat, 7 Aug 2010 20:29:37 -0400 Subject: basic working dac implementation --- examples/test-dac.cpp | 53 +++++++++++++++++++++++++ libmaple/dac.c | 67 +++++++++++++++++++++++++++++++ libmaple/dac.h | 108 ++++++++++++++++++++++++++++++++++++++++++++++++++ libmaple/rcc.h | 3 ++ libmaple/rules.mk | 1 + notes/dac.txt | 32 +++++++++++++++ 6 files changed, 264 insertions(+) create mode 100644 examples/test-dac.cpp create mode 100644 libmaple/dac.c create mode 100644 libmaple/dac.h create mode 100644 notes/dac.txt (limited to 'examples') diff --git a/examples/test-dac.cpp b/examples/test-dac.cpp new file mode 100644 index 0000000..65496f4 --- /dev/null +++ b/examples/test-dac.cpp @@ -0,0 +1,53 @@ + +#include "wirish.h" +#include "fsmc.h" +#include "rcc.h" +#include "gpio.h" +#include "dac.h" + +#define LED_PIN 23 // hack for maple native +#define DISC_PIN 14 // hack for USB on native + +int toggle = 0; +uint16 count = 0; + +void setup() { + + pinMode(LED_PIN, OUTPUT); + pinMode(DISC_PIN, OUTPUT); + digitalWrite(DISC_PIN,1); + digitalWrite(LED_PIN,1); + + Serial1.begin(9600); + Serial1.println("Hello World!"); + + Serial1.print("Init... "); + dac_init(); + Serial1.println("Done."); +} + +void loop() { + digitalWrite(LED_PIN, toggle); + toggle ^= 1; + delay(100); + + count += 100; + + if(count > 4095) { + count = 0; + } + + dac_write(1, 2048); + dac_write(2, count); +} + +int main(void) { + init(); + setup(); + + while (1) { + loop(); + } + return 0; +} + diff --git a/libmaple/dac.c b/libmaple/dac.c new file mode 100644 index 0000000..b9c7d63 --- /dev/null +++ b/libmaple/dac.c @@ -0,0 +1,67 @@ + +/* ***************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Bryan Newbold. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * ****************************************************************************/ + +#include "libmaple.h" +#include "rcc.h" +#include "gpio.h" +#include "dac.h" + +// Only one, so global to this file +DAC_Map *dac = (DAC_Map*)(DAC_BASE); + +// This numbering follows the registers (1-indexed) +#define DAC_CHA 1 +#define DAC_CHB 2 + +// Sets up the DAC peripheral +void dac_init(void) { + + // First turn on the clock + rcc_enable_clk_dac(); + + // Then setup ANALOG mode on PA4 and PA5 + gpio_set_mode(GPIOA_BASE, 4, CNF_INPUT_ANALOG); + gpio_set_mode(GPIOA_BASE, 5, CNF_INPUT_ANALOG); + + // Then do register stuff. + // Default does no triggering, and buffered output, so all good. + dac->CR |= DAC_CR_EN1; + dac->CR |= DAC_CR_EN2; + +} + +void dac_write(uint8 chan, uint16 val) { + + switch(chan) { + case DAC_CHA: + dac->DHR12R1 = 0x0FFF & val; + break; + case DAC_CHB: + dac->DHR12R2 = 0x0FFF & val; + break; + default: + ASSERT(0); // Shouldn't get here + } +} diff --git a/libmaple/dac.h b/libmaple/dac.h new file mode 100644 index 0000000..de1fd3f --- /dev/null +++ b/libmaple/dac.h @@ -0,0 +1,108 @@ +/* ***************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Bryan Newbold. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * ****************************************************************************/ + +/* + * See ../notes/dac.txt for more info + */ + +#ifndef _DAC_H_ +#define _DAC_H_ + +#ifdef __cplusplus +extern "C"{ +#endif + +#define DAC_BASE 0x40007400 + +typedef struct { + volatile uint32 CR; + volatile uint32 SWTRIGR; + volatile uint32 DHR12R1; + volatile uint32 DHR12L1; + volatile uint32 DHR8R1; + volatile uint32 DHR12R2; + volatile uint32 DHR12L2; + volatile uint32 DHR8R2; + volatile uint32 DHR12RD; + volatile uint32 DHR12LD; + volatile uint32 DHR8RD; + volatile uint32 DOR1; + volatile uint32 DOR2; +} DAC_Map; + + +// And here are the register bit ranges +#define DAC_CR_EN1 BIT(0) +#define DAC_CR_BOFF1 BIT(1) +#define DAC_CR_TEN1 BIT(2) +#define DAC_CR_TSEL1 (BIT(3) | BIT(4) | BIT(5)) +#define DAC_CR_WAVE1 (BIT(6) | BIT(7)) +#define DAC_CR_MAMP1 (BIT(8) | BIT(9) | BIT(10) | BIT(11)) +#define DAC_CR_DMAEN1 BIT(12) +#define DAC_CR_EN2 BIT(16) +#define DAC_CR_BOFF2 BIT(17) +#define DAC_CR_TEN2 BIT(18) +#define DAC_CR_TSEL2 (BIT(19) | BIT(20) | BIT(21)) +#define DAC_CR_WAVE2 (BIT(22) | BIT(23)) +#define DAC_CR_MAMP2 (BIT(24) | BIT(25) | BIT(26) | BIT(27)) +#define DAC_CR_DMAEN2 BIT(28) + +#define DAC_SWTRIGR_SWTRIG1 BIT(0) +#define DAC_SWTRIGR_SWTRIG2 BIT(1) + +#define DAC_DHR12R1_DACC1DHR 0x00000FFF + +#define DAC_DHR12L1_DACC1DHR 0x0000FFF0 + +#define DAC_DHR8R1_DACC1DHR 0x000000FF + +#define DAC_DHR12R2_DACC2DHR 0x00000FFF + +#define DAC_DHR12L2_DACC2DHR 0x0000FFF0 + +#define DAC_DHR8R2_DACC2DHR 0x000000FF + +#define DAC_DHR12RD_DACC1DHR 0x00000FFF +#define DAC_DHR12RD_DACC2DHR 0x0FFF0000 + +#define DAC_DHR12LD_DACC1DHR 0x0000FFF0 +#define DAC_DHR12LD_DACC2DHR 0xFFF00000 + +#define DAC_DHR8RD_DACC1DHR 0x000000FF +#define DAC_DHR8RD_DACC2DHR 0x0000FF00 + +#define DAC_DOR1 0x00000FFF + +#define DAC_DOR2 0x00000FFF + + +void dac_init(void); +void dac_write(uint8 chan, uint16 val); + +#ifdef __cplusplus +} // extern "C" +#endif + + +#endif diff --git a/libmaple/rcc.h b/libmaple/rcc.h index 8ad70e5..2dca151 100644 --- a/libmaple/rcc.h +++ b/libmaple/rcc.h @@ -139,6 +139,7 @@ struct rcc_device { #define RCC_APB1ENR_USART3EN BIT(18) #define RCC_APB1ENR_SPI2EN BIT(14) #define RCC_APB1ENR_USB BIT(23) +#define RCC_APB1ENR_DACEN BIT(29) /* AHB peripheral clock enable bits */ #define RCC_AHBENR_DMA1EN BIT(0) @@ -174,6 +175,8 @@ struct rcc_device { #define rcc_enable_clk_adc1() __set_bits(RCC_APB2ENR, RCC_APB2ENR_ADC1EN) +#define rcc_enable_clk_dac() __set_bits(RCC_APB1ENR, RCC_APB1ENR_DACEN) + #define rcc_reset_adc1() { __set_bits(RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST); \ __clear_bits(RCC_APB2RSTR, RCC_APB2RSTR_ADC1RST); \ } diff --git a/libmaple/rules.mk b/libmaple/rules.mk index db9540a..8428277 100644 --- a/libmaple/rules.mk +++ b/libmaple/rules.mk @@ -26,6 +26,7 @@ cSRCS_$(d) := systick.c \ flash.c \ spi.c \ fsmc.c \ + dac.c \ usb/usb.c \ usb/usb_callbacks.c \ usb/usb_hardware.c \ diff --git a/notes/dac.txt b/notes/dac.txt new file mode 100644 index 0000000..9df0782 --- /dev/null +++ b/notes/dac.txt @@ -0,0 +1,32 @@ + +DAC notes (for maple native and other "high density" STM32 devices) +------------------------------------------------------------------------------- +There is an ST application note for the DACs; it provides a lot of context but +doesn't help setup the peripheral very much. + +For the first code iteration we'll just use 12-bit right-aligned single writes, +so use DAC_DHR12Rx + +Once data is loaded into the digital registers, there are a number of possible +triggers to start conversion to analog output: external interrupts, software +control, and timer events. We'll just use software triggering for now. + +There is (obviously) DMA support for DAC output. + +There are noise output and triangle wave output features with variable +amplitude. + +There are many additional modes to tigger output to both channels at the same +time. + +Buffering will be enabled by default. + +TODO +------------------------------------------------------------------------------- +- sine wave demo using Timer interrupts +- wirish implementation +- documentation +- higher performance modes? +- signal quality testing +- DMA output + -- cgit v1.2.3 From b2dd49c3141d8a21a4e7c7ef51dee7329f847c30 Mon Sep 17 00:00:00 2001 From: bnewbold Date: Sat, 7 Aug 2010 21:25:51 -0400 Subject: FSMC tweaks --- examples/test-fsmc.cpp | 10 ++-------- libmaple/fsmc.c | 3 +++ 2 files changed, 5 insertions(+), 8 deletions(-) (limited to 'examples') diff --git a/examples/test-fsmc.cpp b/examples/test-fsmc.cpp index 6449cfd..f4fd068 100644 --- a/examples/test-fsmc.cpp +++ b/examples/test-fsmc.cpp @@ -1,8 +1,6 @@ #include "wirish.h" #include "fsmc.h" -#include "rcc.h" -#include "gpio.h" #define LED_PIN 23 // hack for maple native #define DISC_PIN 14 // hack for USB on native @@ -40,8 +38,6 @@ void setup() { uint32 id; scb = (SCB_Reg*)SCB_BASE; - rcc_enable_clk_fsmc(); - pinMode(LED_PIN, OUTPUT); pinMode(DISC_PIN, OUTPUT); digitalWrite(DISC_PIN,1); @@ -96,13 +92,11 @@ void loop() { toggle ^= 1; delay(1); - ptr = (uint16*)(0x60000000); - count = 0; - for(int i = 0; i<1024; i++) { + for(int i = 0; i<100; i++) { // modify this to speed things up count++; ptr++; - *ptr = (0x0000FFFF & count); //delay(10); // tweak this to test SRAM resiliance over time + *ptr = (0x0000FFFF & count); if(*ptr != (0x0000FFFF & count)) { Serial1.println("ERROR: mismatch, halting"); while(1) { } diff --git a/libmaple/fsmc.c b/libmaple/fsmc.c index 4e25ef6..a8df2e1 100644 --- a/libmaple/fsmc.c +++ b/libmaple/fsmc.c @@ -88,6 +88,9 @@ void fsmc_native_sram_init(void) { gpio_set_mode(GPIOE_BASE, 0, MODE_AF_OUTPUT_PP); // NBL0 gpio_set_mode(GPIOE_BASE, 1, MODE_AF_OUTPUT_PP); // NBL1 + + // Next enable the clock + rcc_enable_clk_fsmc(); // Then we configure channel 1 the FSMC SRAM peripheral // (all SRAM channels are in "Bank 1" of the FSMC) -- cgit v1.2.3 From e14aa2adb49b6f1da00fccf1d45fdc67b11d0c99 Mon Sep 17 00:00:00 2001 From: bnewbold Date: Wed, 25 Aug 2010 18:17:10 -0400 Subject: simplified example headers --- examples/blinky.cpp | 28 +--------------------------- examples/test-session.cpp | 29 ++++++----------------------- 2 files changed, 7 insertions(+), 50 deletions(-) (limited to 'examples') diff --git a/examples/blinky.cpp b/examples/blinky.cpp index b037a1f..45c4528 100644 --- a/examples/blinky.cpp +++ b/examples/blinky.cpp @@ -1,30 +1,4 @@ -/* ***************************************************************************** - * The MIT License - * - * Copyright (c) 2010 LeafLabs LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * ****************************************************************************/ - -/** - * @brief blinky.cpp. Blinks the LED, pin 13 - */ +// Blinks the LED, pin 13 #include "wirish.h" diff --git a/examples/test-session.cpp b/examples/test-session.cpp index 9885ab3..cfb81d0 100644 --- a/examples/test-session.cpp +++ b/examples/test-session.cpp @@ -1,26 +1,9 @@ -/* ***************************************************************************** - * The MIT License - * - * Copyright (c) 2010 LeafLabs LLC. - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * ****************************************************************************/ +// Interactive Test Session for LeafLabs Maple +// Copyright (c) 2010 LeafLabs LLC. +// +// Useful for testing Maple features and troubleshooting. Select a COMM port +// (SerialUSB or Serial2) before compiling and then enter 'h' at the prompt +// for a list of commands. #include "wirish.h" -- cgit v1.2.3