From 7caa5711c3f2d03870cba71d175a057e573aff8d Mon Sep 17 00:00:00 2001 From: Marti Bolivar Date: Fri, 29 Apr 2011 12:28:30 -0400 Subject: Native and FSMC cleanups. Got rid of native_sram.h (and native_sram.cpp), and pushed their functionality into maple_native.cpp. Fixed includes in maple_native.h. Fixed includes in fsmc.h. --- libmaple/fsmc.c | 4 +--- libmaple/fsmc.h | 14 +++++++------ wirish/boards/maple_native.cpp | 23 +++++++++++++++++++-- wirish/boards/maple_native.h | 5 ----- wirish/native_sram.cpp | 45 ------------------------------------------ wirish/native_sram.h | 43 ---------------------------------------- wirish/rules.mk | 3 +-- 7 files changed, 31 insertions(+), 106 deletions(-) delete mode 100644 wirish/native_sram.cpp delete mode 100644 wirish/native_sram.h diff --git a/libmaple/fsmc.c b/libmaple/fsmc.c index 70d7e0d..356e1e5 100644 --- a/libmaple/fsmc.c +++ b/libmaple/fsmc.c @@ -26,10 +26,8 @@ * @brief */ -#include "libmaple.h" -#include "rcc.h" -#include "gpio.h" #include "fsmc.h" +#include "gpio.h" #ifdef STM32_HIGH_DENSITY diff --git a/libmaple/fsmc.h b/libmaple/fsmc.h index fccaf0b..8b6cac5 100644 --- a/libmaple/fsmc.h +++ b/libmaple/fsmc.h @@ -26,6 +26,8 @@ * See ../notes/fsmc.txt for more info */ +#include "libmaple_types.h" + /** * @file fsmc.h */ @@ -83,10 +85,10 @@ typedef struct fsmc_reg_map { __io uint32 BWTR4; /**< SRAM/NOR-Flash write timing register 4 */ } __attribute__((packed)) fsmc_reg_map; -#define __FSMC_B 0xA0000000 +#define __FSMCB 0xA0000000 /** FSMC register map base pointer */ -#define FSMC_BASE ((struct fsmc_reg_map*)__FSMC_B) +#define FSMC_BASE ((struct fsmc_reg_map*)__FSMCB) /** FSMC NOR/PSRAM register map type */ typedef struct fsmc_nor_psram_reg_map { @@ -97,16 +99,16 @@ typedef struct fsmc_nor_psram_reg_map { } fsmc_nor_psram_reg_map; /** FSMC NOR/PSRAM base pointer 1 */ -#define FSMC_NOR_PSRAM1_BASE ((struct fsmc_nor_psram_reg_map*)__FSMC_B) +#define FSMC_NOR_PSRAM1_BASE ((struct fsmc_nor_psram_reg_map*)__FSMCB) /** FSMC NOR/PSRAM base pointer 2 */ -#define FSMC_NOR_PSRAM2_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMC_B + 0x8)) +#define FSMC_NOR_PSRAM2_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x8)) /** FSMC NOR/PSRAM base pointer 3 */ -#define FSMC_NOR_PSRAM3_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMC_B+0x10)) +#define FSMC_NOR_PSRAM3_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x10)) /** FSMC NOR/PSRAM base pointer 4 */ -#define FSMC_NOR_PSRAM4_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMC_B+0x18)) +#define FSMC_NOR_PSRAM4_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x18)) /* * Register bit definitions diff --git a/wirish/boards/maple_native.cpp b/wirish/boards/maple_native.cpp index c1f8d5c..fa36240 100644 --- a/wirish/boards/maple_native.cpp +++ b/wirish/boards/maple_native.cpp @@ -31,12 +31,20 @@ */ #include "maple_native.h" -#include "native_sram.h" + +#include "fsmc.h" +#include "gpio.h" +#include "rcc.h" +#include "timer.h" + +#include "wirish_types.h" #ifdef BOARD_maple_native +void initSRAMChip(void); + void boardInit(void) { - initNativeSRAM(); + initSRAMChip(); } extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { @@ -177,4 +185,15 @@ extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = { BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN }; +void initSRAMChip(void) { + fsmc_nor_psram_reg_map *regs = FSMC_NOR_PSRAM1_BASE; + + fsmc_sram_init_gpios(); + rcc_clk_enable(RCC_FSMC); + + regs->BCR = FSMC_BCR_WREN | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN; + fsmc_nor_psram_set_addset(regs, 0); + fsmc_nor_psram_set_datast(regs, 3); +} + #endif diff --git a/wirish/boards/maple_native.h b/wirish/boards/maple_native.h index 2cbd406..b573d72 100644 --- a/wirish/boards/maple_native.h +++ b/wirish/boards/maple_native.h @@ -32,11 +32,6 @@ * See maple.h for more information on these definitions. */ -#include "gpio.h" -#include "timer.h" - -#include "wirish_types.h" - #ifndef _BOARD_MAPLE_NATIVE_H_ #define _BOARD_MAPLE_NATIVE_H_ diff --git a/wirish/native_sram.cpp b/wirish/native_sram.cpp deleted file mode 100644 index 5e8095f..0000000 --- a/wirish/native_sram.cpp +++ /dev/null @@ -1,45 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -#include "native_sram.h" -#include "libmaple.h" -#include "fsmc.h" -#include "rcc.h" - -#ifdef BOARD_maple_native - -void initNativeSRAM(void) { - fsmc_nor_psram_reg_map *regs = FSMC_NOR_PSRAM1_BASE; - - fsmc_sram_init_gpios(); - rcc_clk_enable(RCC_FSMC); - - regs->BCR = FSMC_BCR_WREN | FSMC_BCR_MWID_16BITS | FSMC_BCR_MBKEN; - fsmc_nor_psram_set_addset(regs, 0); - fsmc_nor_psram_set_datast(regs, 3); -} - -#endif diff --git a/wirish/native_sram.h b/wirish/native_sram.h deleted file mode 100644 index 7724667..0000000 --- a/wirish/native_sram.h +++ /dev/null @@ -1,43 +0,0 @@ -/****************************************************************************** - * The MIT License - * - * Copyright (c) 2011 LeafLabs, LLC. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - *****************************************************************************/ - -#ifdef BOARD_maple_native - -#ifndef _NATIVE_SRAM_H_ -#define _NATIVE_SRAM_H_ - -/** - * Sets up the FSMC peripheral to use the SRAM chip on the Maple - * Native as an external segment of system memory space. - * - * This implementation is for the IS62WV51216BLL 8Mb chip (55ns - * timing, 512K x 16 bits). - */ -void initNativeSRAM(void); - -#endif - -#endif diff --git a/wirish/rules.mk b/wirish/rules.mk index 02906c7..c3608e3 100644 --- a/wirish/rules.mk +++ b/wirish/rules.mk @@ -30,8 +30,7 @@ cppSRCS_$(d) := wirish_math.cpp \ wirish_time.cpp \ pwm.cpp \ ext_interrupts.cpp \ - wirish_digital.cpp \ - native_sram.cpp + wirish_digital.cpp cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) cppFILES_$(d) := $(cppSRCS_$(d):%=$(d)/%) -- cgit v1.2.3