From 7b14b950363f707c40732b4387f2f50711907673 Mon Sep 17 00:00:00 2001 From: Marti Bolivar Date: Tue, 12 Apr 2011 00:08:54 -0400 Subject: Doxygen bugfixes. Fixed various Doxygen comment errors. --- libmaple/adc.h | 1 + libmaple/bkp.h | 6 +++--- libmaple/dma.h | 4 ++++ libmaple/ring_buffer.h | 6 +++--- libmaple/timer.h | 9 +++++---- wirish/pwm.h | 3 +++ wirish/wirish_time.h | 2 +- wirish/wirish_types.h | 3 +++ 8 files changed, 23 insertions(+), 11 deletions(-) diff --git a/libmaple/adc.h b/libmaple/adc.h index 520b982..c6a67a0 100644 --- a/libmaple/adc.h +++ b/libmaple/adc.h @@ -309,6 +309,7 @@ uint16 adc_read(const adc_dev *dev, uint8 channel); * Defines the total number of conversions in the regular channel * conversion sequence. * + * @param dev ADC device. * @param length Regular channel sequence length, from 1 to 16. */ static inline void adc_set_reg_seqlen(const adc_dev *dev, uint8 length) { diff --git a/libmaple/bkp.h b/libmaple/bkp.h index cea39b6..97edd2a 100644 --- a/libmaple/bkp.h +++ b/libmaple/bkp.h @@ -46,7 +46,7 @@ extern "C" { /** Backup peripheral register map type. */ typedef struct bkp_reg_map { - const uint32 RESERVED1; + const uint32 RESERVED1; ///< Reserved __io uint32 DR1; ///< Data register 1 __io uint32 DR2; ///< Data register 2 __io uint32 DR3; ///< Data register 3 @@ -61,8 +61,8 @@ typedef struct bkp_reg_map { __io uint32 CR; ///< Control register __io uint32 CSR; ///< Control and status register #ifdef STM32_HIGH_DENSITY - const uint32 RESERVED2; - const uint32 RESERVED3; + const uint32 RESERVED2; ///< Reserved + const uint32 RESERVED3; ///< Reserved __io uint32 DR11; ///< Data register 11 __io uint32 DR12; ///< Data register 12 __io uint32 DR13; ///< Data register 13 diff --git a/libmaple/dma.h b/libmaple/dma.h index c763672..7c380d0 100644 --- a/libmaple/dma.h +++ b/libmaple/dma.h @@ -417,6 +417,8 @@ static inline uint8 dma_is_channel_enabled(dma_dev *dev, dma_channel channel) { * If you're attempting to figure out why a DMA interrupt fired; you * may find dma_get_irq_cause() more convenient. * + * @param dev DMA device + * @param channel Channel whose ISR bits to return. * @see dma_get_irq_cause(). */ static inline uint8 dma_get_isr_bits(dma_dev *dev, dma_channel channel) { @@ -430,6 +432,8 @@ static inline uint8 dma_get_isr_bits(dma_dev *dev, dma_channel channel) { * If you're attempting to clean up after yourself in a DMA interrupt, * you may find dma_get_irq_cause() more convenient. * + * @param dev DMA device + * @param channel Channel whose ISR bits to clear. * @see dma_get_irq_cause() */ static inline void dma_clear_isr_bits(dma_dev *dev, dma_channel channel) { diff --git a/libmaple/ring_buffer.h b/libmaple/ring_buffer.h index 101f010..ad6ad96 100644 --- a/libmaple/ring_buffer.h +++ b/libmaple/ring_buffer.h @@ -89,7 +89,7 @@ static inline uint16 rb_full_count(ring_buffer *rb) { /** * @brief Returns true if and only if the ring buffer is full. - * @brief rb Buffer to test. + * @param rb Buffer to test. */ static inline int rb_is_full(ring_buffer *rb) { return (rb->tail + 1 == rb->head) || @@ -139,8 +139,8 @@ static inline int16 rb_safe_remove(ring_buffer *rb) { /** * @brief Attempt to insert an element into a ring buffer. * - * @brief rb Buffer to insert into. - * @brief element Value to insert into rb. + * @param rb Buffer to insert into. + * @param element Value to insert into rb. * @sideeffect If rb is not full, appends element onto buffer. * @return If element was appended, then true; otherwise, false. */ static inline int rb_safe_insert(ring_buffer *rb, uint8 element) { diff --git a/libmaple/timer.h b/libmaple/timer.h index fa19cc9..befc026 100644 --- a/libmaple/timer.h +++ b/libmaple/timer.h @@ -628,8 +628,8 @@ static inline uint16 timer_get_count(timer_dev *dev) { /** * @brief Sets the counter value for the given timer. - * @param timer_num Timer whose counter to set - * @param value New counter value + * @param dev Timer whose counter to set + * @param value New counter value */ static inline void timer_set_count(timer_dev *dev, uint16 value) { (dev->regs).bas->CNT = value; @@ -804,8 +804,8 @@ static inline void timer_cc_disable(timer_dev *dev, uint8 channel) { /** * @brief Get a channel's capture/compare output polarity - * @brief dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. - * @brief channel Channel whose capture/compare output polarity to get. + * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. + * @param channel Channel whose capture/compare output polarity to get. * @return Polarity, either 0 or 1. * @see timer_cc_set_polarity() */ @@ -982,6 +982,7 @@ typedef enum timer_oc_mode_flags { * * @param dev Timer device, must have type TIMER_ADVANCED or TIMER_GENERAL. * @param channel Channel to configure in output compare mode. + * @param mode Timer mode to set. * @param flags OR of timer_oc_mode_flags. * @see timer_oc_mode * @see timer_oc_mode_flags diff --git a/wirish/pwm.h b/wirish/pwm.h index a6385e9..4ce4bb4 100644 --- a/wirish/pwm.h +++ b/wirish/pwm.h @@ -43,6 +43,9 @@ * * User code is expected to determine and honor the maximum value * (based on the configured period). + * + * @param pin PWM output pin + * @param duty_cycle Duty cycle to set. */ void pwmWrite(uint8 pin, uint16 duty_cycle); diff --git a/wirish/wirish_time.h b/wirish/wirish_time.h index a0c0c82..a0b1c11 100644 --- a/wirish/wirish_time.h +++ b/wirish/wirish_time.h @@ -23,7 +23,7 @@ *****************************************************************************/ /** - * @file time.h + * @file wirish_time.h * @brief Timing and delay functions. */ diff --git a/wirish/wirish_types.h b/wirish/wirish_types.h index 475f470..39efae0 100644 --- a/wirish/wirish_types.h +++ b/wirish/wirish_types.h @@ -57,6 +57,9 @@ typedef struct stm32_pin_info { uint8 adc_channel; /**< Pin ADC channel, or ADCx if none. */ } stm32_pin_info; +/** + * Variable attribute, instructs the linker to place the marked + * variable in Flash instead of RAM. */ #define __FLASH__ __attr_flash #endif -- cgit v1.2.3