From 214941537f2211d5e2ef16e34440485d7e872d1a Mon Sep 17 00:00:00 2001
From: Perry Hung <iperry@gmail.com>
Date: Sun, 27 Feb 2011 15:49:51 -0500
Subject: Refactor linker scripts. Rename irq and exception handlers.

Add common linker scripts for ram and rom. Add medium and high density
libraries for libcs3.
---
 libmaple/dma.c                                   |  14 +-
 libmaple/exc.S                                   |  44 ++++-
 libmaple/exti.c                                  |  14 +-
 libmaple/systick.c                               |   2 +-
 libmaple/timers.c                                |   8 +-
 libmaple/usart.c                                 |  10 +-
 libmaple/usb/usb.c                               |   2 +-
 libmaple/usb/usb.h                               |   2 +-
 support/ld/common_ram.inc                        | 221 +++++++++++++++++++++
 support/ld/common_rom.inc                        | 223 +++++++++++++++++++++
 support/ld/libcs3-lanchon-stm32.a                | Bin 10134 -> 0 bytes
 support/ld/libcs3-lanchon-stm32.tar.gz           | Bin 2775 -> 0 bytes
 support/ld/libcs3_stm32_high_density.a           | Bin 0 -> 9464 bytes
 support/ld/libcs3_stm32_med_density.a            | Bin 0 -> 9464 bytes
 support/ld/libcs3_stm32_src/Makefile             |  35 ++++
 support/ld/libcs3_stm32_src/start.S              |  27 +++
 support/ld/libcs3_stm32_src/start_c.c            |  58 ++++++
 support/ld/libcs3_stm32_src/stm32_isrs.S         | 235 +++++++++++++++++++++++
 support/ld/libcs3_stm32_src/stm32_vector_table.S |  90 +++++++++
 support/ld/maple/flash.ld                        | 219 ++-------------------
 support/ld/maple/jtag.ld                         | 192 ++----------------
 support/ld/maple/ram.ld                          | 227 ++--------------------
 support/ld/maple_mini/flash.ld                   | 218 ++-------------------
 support/ld/maple_mini/jtag.ld                    | 192 ++----------------
 support/ld/maple_mini/ram.ld                     | 227 ++--------------------
 support/ld/maple_native/flash.ld                 | 211 ++------------------
 support/ld/maple_native/jtag.ld                  | 187 ++----------------
 support/ld/maple_native/ram.ld                   | 220 ++-------------------
 support/ld/names.inc                             | 137 +++++++------
 support/ld/src.zip                               | Bin 15774 -> 0 bytes
 30 files changed, 1163 insertions(+), 1852 deletions(-)
 create mode 100644 support/ld/common_ram.inc
 create mode 100644 support/ld/common_rom.inc
 delete mode 100644 support/ld/libcs3-lanchon-stm32.a
 delete mode 100644 support/ld/libcs3-lanchon-stm32.tar.gz
 create mode 100644 support/ld/libcs3_stm32_high_density.a
 create mode 100644 support/ld/libcs3_stm32_med_density.a
 create mode 100644 support/ld/libcs3_stm32_src/Makefile
 create mode 100644 support/ld/libcs3_stm32_src/start.S
 create mode 100644 support/ld/libcs3_stm32_src/start_c.c
 create mode 100644 support/ld/libcs3_stm32_src/stm32_isrs.S
 create mode 100644 support/ld/libcs3_stm32_src/stm32_vector_table.S
 delete mode 100644 support/ld/src.zip

diff --git a/libmaple/dma.c b/libmaple/dma.c
index 15c96e1..c71e52c 100644
--- a/libmaple/dma.c
+++ b/libmaple/dma.c
@@ -77,31 +77,31 @@ static inline void dispatch_handler(uint8 channel_idx) {
     }
 }
 
-void DMAChannel1_IRQHandler(void) {
+void __irq_dma1_channel1(void) {
     dispatch_handler(0);
 }
 
-void DMAChannel2_IRQHandler(void) {
+void __irq_dma1_channel2(void) {
     dispatch_handler(1);
 }
 
-void DMAChannel3_IRQHandler(void) {
+void __irq_dma2_channel3(void) {
     dispatch_handler(2);
 }
 
-void DMAChannel4_IRQHandler(void) {
+void __irq_dma2_channel4(void) {
     dispatch_handler(3);
 }
 
-void DMAChannel5_IRQHandler(void) {
+void __irq_dma2_channel5(void) {
     dispatch_handler(4);
 }
 
-void DMAChannel6_IRQHandler(void) {
+void __irq_dma2_channel6(void) {
     dispatch_handler(5);
 }
 
-void DMAChannel7_IRQHandler(void) {
+void __irq_dma2_channel7(void) {
     dispatch_handler(6);
 }
 
diff --git a/libmaple/exc.S b/libmaple/exc.S
index a9f6561..d01e3d5 100644
--- a/libmaple/exc.S
+++ b/libmaple/exc.S
@@ -41,16 +41,42 @@
 #    SP-->  r0
 
 .text
-.globl HardFaultException
+.globl __exc_hardfault
+.globl __exc_nmi
+.globl __exc_hardfault
+.globl __exc_memmanage
+.globl __exc_busfault
+.globl __exc_usagefault
+
+/* TODO: Fix this up. */
+.thumb_func
+__exc_nmi:
+    mov r0, #1
+
+.thumb_func
+__exc_hardfault:
+    mov r0, #2
+
 .thumb_func
-HardFaultException:
-   ldr r0, CPSR_MASK           @ Set default CPSR
-   push {r0}
-   ldr r0, TARGET_PC           @ Set target pc
-   push {r0}
-   sub sp, sp, #24             @ its not like i even care
-   ldr r0, EXC_RETURN          @ Return to thread mode
-   mov lr, r0
+__exc_memmanage:
+    mov r0, #3
+
+.thumb_func
+__exc_busfault:
+    mov r0, #4
+
+.thumb_func
+__exc_usagefault:
+    mov r0, #5
+
+__default:
+   ldr r1, CPSR_MASK           @ Set default CPSR
+   push {r1}
+   ldr r1, TARGET_PC           @ Set target pc
+   push {r1}
+   sub sp, sp, #24             @ Don't care
+   ldr r1, EXC_RETURN          @ Return to thread mode
+   mov lr, r1
    bx lr                       @ Exception exit
 
  .align 4
diff --git a/libmaple/exti.c b/libmaple/exti.c
index 150dd05..e8ad52a 100644
--- a/libmaple/exti.c
+++ b/libmaple/exti.c
@@ -74,32 +74,32 @@ static inline void dispatch_handler(uint32 channel) {
  * is associated with each channel, so we
  * don't have to keep track of which channel
  * we came from */
-void EXTI0_IRQHandler(void) {
+void __irq_exti0(void) {
     dispatch_handler(EXTI0);
     clear_pending(EXTI0);
 }
 
-void EXTI1_IRQHandler(void) {
+void __irq_exti1(void) {
     dispatch_handler(EXTI1);
     clear_pending(EXTI1);
 }
 
-void EXTI2_IRQHandler(void) {
+void __irq_exti2(void) {
     dispatch_handler(EXTI2);
     clear_pending(EXTI2);
 }
 
-void EXTI3_IRQHandler(void) {
+void __irq_exti3(void) {
     dispatch_handler(EXTI3);
     clear_pending(EXTI3);
 }
 
-void EXTI4_IRQHandler(void) {
+void __irq_exti4(void) {
     dispatch_handler(EXTI4);
     clear_pending(EXTI4);
 }
 
-void EXTI9_5_IRQHandler(void) {
+void __irq_exti9_5(void) {
     /* Figure out which channel it came from  */
     uint32 pending;
     uint32 i;
@@ -116,7 +116,7 @@ void EXTI9_5_IRQHandler(void) {
     }
 }
 
-void EXTI15_10_IRQHandler(void) {
+void __irq_exti15_10(void) {
     /* Figure out which channel it came from  */
     uint32 pending;
     uint32 i;
diff --git a/libmaple/systick.c b/libmaple/systick.c
index b056001..b9a52c1 100644
--- a/libmaple/systick.c
+++ b/libmaple/systick.c
@@ -64,6 +64,6 @@ void systick_resume() {
 }
 
 /** SysTick interrupt handler.  Bumps up the tick counter. */
-void SysTickHandler(void) {
+void __exc_systick(void) {
     systick_timer_millis++;
 }
diff --git a/libmaple/timers.c b/libmaple/timers.c
index ff548c0..c561d39 100644
--- a/libmaple/timers.c
+++ b/libmaple/timers.c
@@ -382,7 +382,7 @@ void timer_generate_update(timer_dev_num timer_num) {
  * registers /or/ has overflowed.
  *
  * This is a rather long implementation... */
-void TIM1_CC_IRQHandler(void) {
+void __irq_tim1_cc(void) {
     timer_port *timer = (timer_port*)TIMER1_BASE;
     uint16 sr_buffer;
     sr_buffer = timer->SR;
@@ -418,7 +418,7 @@ void TIM1_CC_IRQHandler(void) {
         //timer->EGR  = 1;
     }
 }
-void TIM2_IRQHandler(void) {
+void __irq_tim2(void) {
     /* This is a rather long implementation... */
     timer_port *timer = (timer_port*)TIMER2_BASE;
     uint16 sr_buffer;
@@ -453,7 +453,7 @@ void TIM2_IRQHandler(void) {
         //timer->EGR  = 1;
     }
 }
-void TIM3_IRQHandler(void) {
+void __irq_tim3(void) {
     /* This is a rather long implementation... */
     timer_port *timer = (timer_port*)TIMER3_BASE;
     uint16 sr_buffer;
@@ -489,7 +489,7 @@ void TIM3_IRQHandler(void) {
     }
 }
 
-void TIM4_IRQHandler(void) {
+void __irq_tim4(void) {
     /* This is a rather long implementation... */
     timer_port*timer = (timer_port*)TIMER4_BASE;
     uint16 sr_buffer;
diff --git a/libmaple/usart.c b/libmaple/usart.c
index 030d3cc..494a29f 100644
--- a/libmaple/usart.c
+++ b/libmaple/usart.c
@@ -95,24 +95,24 @@ static inline void usart_irq(int usart_num) {
 /* TODO: Check the disassembly for the following functions to make
    sure GCC inlined properly. */
 
-void USART1_IRQHandler(void) {
+void __irq_usart1(void) {
     usart_irq(USART1);
 }
 
-void USART2_IRQHandler(void) {
+void __irq_usart2(void) {
     usart_irq(USART2);
 }
 
-void USART3_IRQHandler(void) {
+void __irq_usart3(void) {
     usart_irq(USART3);
 }
 
 #ifdef STM32_HIGH_DENSITY
-void UART4_IRQHandler(void) {
+void __irq_uart4(void) {
     usart_irq(UART4);
 }
 
-void UART5_IRQHandler(void) {
+void __irq_uart5(void) {
     usart_irq(UART5);
 }
 #endif
diff --git a/libmaple/usb/usb.c b/libmaple/usb/usb.c
index d875785..62f56fc 100644
--- a/libmaple/usb/usb.c
+++ b/libmaple/usb/usb.c
@@ -241,7 +241,7 @@ void usbDsbISR(void) {
 }
 
 /* overloaded ISR routine, this is the main usb ISR */
-void usb_lpIRQHandler(void) {
+void __irq_usb_lp_can_rx0(void) {
 wIstr = _GetISTR();
 
 /* go nuts with the preproc switches since this is an ISTR and must be FAST */
diff --git a/libmaple/usb/usb.h b/libmaple/usb/usb.h
index 0ed02e5..92f606c 100644
--- a/libmaple/usb/usb.h
+++ b/libmaple/usb/usb.h
@@ -69,7 +69,7 @@ void usbDsbISR(void);
 void usbEnbISR(void);
 
 /* overloaded ISR routine, this is the main usb ISR */
-void usb_lpIRQHandler(void);
+void __irq_usb_lp_can_rx0(void);
 void usbWaitReset(void);
 
 /* blocking functions for send/receive */
diff --git a/support/ld/common_ram.inc b/support/ld/common_ram.inc
new file mode 100644
index 0000000..be83e84
--- /dev/null
+++ b/support/ld/common_ram.inc
@@ -0,0 +1,221 @@
+/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) */
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+SEARCH_DIR(.)
+/*
+ * Link against libgcc, libc, and libm
+ */
+GROUP(libgcc.a libc.a libm.a)
+
+/* These force the linker to search for particular symbols from
+ * the start of the link process and thus ensure the user's
+ * overrides are picked up
+ */
+INCLUDE names.inc
+
+/* STM32 vector table. See stm32_vector_table.S  */
+EXTERN(__cs3_stm32_vector_table)
+
+/* libcs3 C start function. See cs3.h */
+EXTERN(__cs3_start_c)
+
+/* main entry point */
+EXTERN(main)
+
+/* Initial stack pointer value. */
+EXTERN(__cs3_stack)
+PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
+
+/* Reset vector and chip reset entry point. See start.S */
+EXTERN(_start)
+ENTRY(_start)
+PROVIDE(__cs3_reset = _start);
+
+/* Beginning of the heap */
+PROVIDE(__cs3_heap_start = _end);
+
+/* End of the heap */
+PROVIDE(__cs3_heap_end = __cs3_region_start_ram + LENGTH(ram));
+
+
+SECTIONS
+{
+  .text :
+      {
+        CREATE_OBJECT_SYMBOLS
+        __cs3_region_start_ram = .;
+        *(.cs3.region-head.ram)
+
+        /*
+         * STM32 vector table
+         */
+        __cs3_interrupt_vector = __cs3_stm32_vector_table;
+        *(.cs3.interrupt_vector)
+        /* Make sure we pulled in an interrupt vector.  */
+        ASSERT (. != __cs3_stm32_vector_table, "No interrupt vector");
+
+        /*
+         * Program code and vague linking
+         */
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.plt)
+        *(.gnu.warning)
+        *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+        *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+        *(.gcc_except_table)
+        *(.eh_frame_hdr)
+        *(.eh_frame)
+
+        . = ALIGN(4);
+        KEEP(*(.init))
+
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(0x4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        __cs3_regions = .;
+        LONG (0)
+        LONG (__cs3_region_init_ram)
+        LONG (__cs3_region_start_ram)
+        LONG (__cs3_region_init_size_ram)
+        LONG (__cs3_region_zero_size_ram)
+      } > ram
+
+  /*
+   * .ARM.exidx exception unwinding
+   */
+  __exidx_start = .;
+  .ARM.exidx :
+      {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+      } > ram
+  __exidx_end = .;
+
+  /*
+   * End of text
+   */
+  .text.align :
+      {
+        . = ALIGN(8);
+        _etext = .;
+      } > ram
+
+   .cs3.rom :
+   {
+     __cs3_region_start_rom = .;
+     *(.cs3.region-head.rom)
+     *(.rom)
+     . = ALIGN (8);
+   } >ram
+
+   .cs3.rom.bss :
+   {
+     *(.rom.b)
+     . = ALIGN (8);
+   } >ram
+   /* __cs3_region_end_rom is deprecated */
+   __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(ram);
+   __cs3_region_size_rom = LENGTH(ram);
+   __cs3_region_init_rom = LOADADDR (.cs3.rom);
+   __cs3_region_init_size_rom = SIZEOF(.cs3.rom);
+   __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);
+
+  /*
+   * Start of data
+   */
+  .data :
+      {
+        KEEP(*(.jcr))
+        *(.got.plt) *(.got)
+        *(.shdata)
+        *(.data .data.* .gnu.linkonce.d.*)
+        *(.ram)
+        . = ALIGN (8);
+        _edata = .;
+      } > ram
+
+  .bss :
+      {
+        *(.shbss)
+        *(.bss .bss.* .gnu.linkonce.b.*)
+        *(COMMON)
+        *(.ram.b)
+        . = ALIGN (8);
+        _end = .;
+        __end = .;
+      } > ram
+
+  /* __cs3_region_end_ram is deprecated */
+  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
+  __cs3_region_size_ram = LENGTH(ram);
+  __cs3_region_init_ram = LOADADDR (.text);
+  __cs3_region_init_size_ram = _edata - ADDR (.text);
+  __cs3_region_zero_size_ram = _end - _edata;
+  __cs3_region_num = 1;
+
+  /*
+   * Debugging sections
+   */
+  .stab 0 (NOLOAD) : { *(.stab) }
+  .stabstr 0 (NOLOAD) : { *(.stabstr) }
+  /* DWARF debug sections.
+   * Symbols in the DWARF debugging sections are relative to the beginning
+   * of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+
+  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/support/ld/common_rom.inc b/support/ld/common_rom.inc
new file mode 100644
index 0000000..e0c295f
--- /dev/null
+++ b/support/ld/common_rom.inc
@@ -0,0 +1,223 @@
+/* Linker script for STM32 (by Lanchon with Mods by LeafLabs) */
+
+OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+ENTRY(_start)
+SEARCH_DIR(.)
+/*
+ * Link against libgcc, libc, and libm
+ */
+GROUP(libgcc.a libc.a libm.a)
+
+/* These force the linker to search for particular symbols from
+ * the start of the link process and thus ensure the user's
+ * overrides are picked up
+ */
+INCLUDE names.inc
+
+/* STM32 vector table. See stm32_vector_table.S  */
+EXTERN(__cs3_stm32_vector_table)
+
+/* libcs3 C start function. See cs3.h */
+EXTERN(__cs3_start_c)
+
+/* main entry point */
+EXTERN(main)
+
+/* Initial stack pointer value. */
+EXTERN(__cs3_stack)
+PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
+
+/* Reset vector and chip reset entry point. See start.S */
+EXTERN(_start)
+PROVIDE(__cs3_reset = _start);
+
+/* Beginning of the heap */
+PROVIDE(__cs3_heap_start = _end);
+
+/* End of the heap */
+PROVIDE(__cs3_heap_end = __cs3_region_start_ram + LENGTH(ram));
+
+
+SECTIONS
+{
+  .text :
+      {
+        CREATE_OBJECT_SYMBOLS
+        __cs3_region_start_rom = .;
+        *(.cs3.region-head.rom)
+
+        /*
+         * STM32 vector table
+         */
+        __cs3_interrupt_vector = __cs3_stm32_vector_table;
+        *(.cs3.interrupt_vector)
+        /* Make sure we pulled in an interrupt vector.  */
+        ASSERT (. != __cs3_stm32_vector_table, "No interrupt vector");
+
+        *(.rom)
+        *(.rom.b)
+
+        /*
+         * Program code and vague linking
+         */
+        *(.rom)
+        *(.rom.b)
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.plt)
+        *(.gnu.warning)
+        *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+
+        *(.rodata .rodata.* .gnu.linkonce.r.*)
+
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+        *(.gcc_except_table)
+        *(.eh_frame_hdr)
+        *(.eh_frame)
+
+        . = ALIGN(4);
+        KEEP(*(.init))
+
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(0x4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        __cs3_regions = .;
+        LONG (0)
+        LONG (__cs3_region_init_ram)
+        LONG (__cs3_region_start_ram)
+        LONG (__cs3_region_init_size_ram)
+        LONG (__cs3_region_zero_size_ram)
+      } > REGION_TEXT
+
+  /*
+   * .ARM.exidx exception unwinding
+   */
+  __exidx_start = .;
+  .ARM.exidx :
+      {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+      } > REGION_TEXT
+  __exidx_end = .;
+
+  /*
+   * End of text
+   */
+  .text.align :
+      {
+        . = ALIGN(8);
+        _etext = .;
+      } > REGION_TEXT
+
+   /* expose a custom rom only section */
+  .USER_FLASH :
+  {
+    *(.USER_FLASH)
+  } >rom
+
+   /* __cs3_region_end_rom is deprecated */
+   __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
+   __cs3_region_size_rom = LENGTH(rom);
+   __cs3_region_num = 1;
+
+  /*
+   * Start of data
+   */
+  .data :
+      {
+        ram_begin = DEFINED(RAM_BUILD) ? . : . ;
+        *(.cs3.region-head.ram_begin)
+
+        __cs3_region_start_ram = .;
+        *(.cs3.region-head.ram)
+
+        KEEP(*(.jcr))
+        *(.got.plt) *(.got)
+        *(.shdata)
+        *(.data .data.* .gnu.linkonce.d.*)
+        *(.ram)
+        . = ALIGN (8);
+        _edata = .;
+      } > REGION_DATA AT> REGION_TEXT
+
+  .bss :
+      {
+        *(.shbss)
+        *(.bss .bss.* .gnu.linkonce.b.*)
+        *(COMMON)
+        *(.ram.b)
+        . = ALIGN (8);
+        _end = .;
+        __end = .;
+      } > REGION_BSS AT> REGION_TEXT
+
+  /* __cs3_region_end_ram is deprecated */
+  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
+  __cs3_region_size_ram = LENGTH(ram);
+  __cs3_region_init_ram = LOADADDR (.data);
+  __cs3_region_init_size_ram = _edata - ADDR (.data);
+  __cs3_region_zero_size_ram = _end - _edata;
+  __cs3_region_num = 1;
+
+  /*
+   * Debugging sections
+   */
+  .stab 0 (NOLOAD) : { *(.stab) }
+  .stabstr 0 (NOLOAD) : { *(.stabstr) }
+  /* DWARF debug sections.
+   * Symbols in the DWARF debugging sections are relative to the beginning
+   * of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+
+  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
+  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
+  /DISCARD/ : { *(.note.GNU-stack) }
+}
diff --git a/support/ld/libcs3-lanchon-stm32.a b/support/ld/libcs3-lanchon-stm32.a
deleted file mode 100644
index 4ed858f..0000000
Binary files a/support/ld/libcs3-lanchon-stm32.a and /dev/null differ
diff --git a/support/ld/libcs3-lanchon-stm32.tar.gz b/support/ld/libcs3-lanchon-stm32.tar.gz
deleted file mode 100644
index 5cbcf7d..0000000
Binary files a/support/ld/libcs3-lanchon-stm32.tar.gz and /dev/null differ
diff --git a/support/ld/libcs3_stm32_high_density.a b/support/ld/libcs3_stm32_high_density.a
new file mode 100644
index 0000000..472ed28
Binary files /dev/null and b/support/ld/libcs3_stm32_high_density.a differ
diff --git a/support/ld/libcs3_stm32_med_density.a b/support/ld/libcs3_stm32_med_density.a
new file mode 100644
index 0000000..07a991d
Binary files /dev/null and b/support/ld/libcs3_stm32_med_density.a differ
diff --git a/support/ld/libcs3_stm32_src/Makefile b/support/ld/libcs3_stm32_src/Makefile
new file mode 100644
index 0000000..d5275b9
--- /dev/null
+++ b/support/ld/libcs3_stm32_src/Makefile
@@ -0,0 +1,35 @@
+# setup environment
+
+TARGET_ARCH = -mcpu=cortex-m3 -mthumb
+
+CC = arm-none-eabi-gcc
+CFLAGS =
+
+AS = $(CC) -x assembler-with-cpp -c $(TARGET_ARCH)
+ASFLAGS =
+
+AR = arm-none-eabi-ar
+ARFLAGS = cr
+
+LIB_OBJS = stm32_vector_table.o stm32_isrs.o start.o start_c.o
+
+help:
+	@echo "Targets:"
+	@echo "\t medium-density: Target medium density chips (e.g. Maple)"
+	@echo "\t high-density: Target high density chips (e.g. Maple-native)"
+
+.PHONY: help medium high
+
+medium-density: $(LIB_OBJS)
+	$(AR) $(ARFLAGS) libcs3_stm32_med_density.a $(LIB_OBJS)
+	rm -f $(LIB_OBJS)
+
+high-density: CFLAGS := -DSTM32_HIGH_DENSITY
+high-density: $(LIB_OBJS)
+	$(AR) $(ARFLAGS) libcs3_stm32_high_density.a $(LIB_OBJS)
+	rm -f $(LIB_OBJS)
+
+# clean
+.PHONY: clean
+clean:
+	-rm -f $(LIB_OBJS) *.a
diff --git a/support/ld/libcs3_stm32_src/start.S b/support/ld/libcs3_stm32_src/start.S
new file mode 100644
index 0000000..ae75747
--- /dev/null
+++ b/support/ld/libcs3_stm32_src/start.S
@@ -0,0 +1,27 @@
+/*
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+	.text
+	.code 16
+	.thumb_func
+
+	.globl _start
+	.type _start, %function
+_start:
+	.fnstart
+	ldr	r1,=__cs3_stack
+	mov	sp,r1
+	ldr	r1,=__cs3_start_c
+	bx	r1
+	.pool
+	.cantunwind
+	.fnend
diff --git a/support/ld/libcs3_stm32_src/start_c.c b/support/ld/libcs3_stm32_src/start_c.c
new file mode 100644
index 0000000..dff9fa3
--- /dev/null
+++ b/support/ld/libcs3_stm32_src/start_c.c
@@ -0,0 +1,58 @@
+/* CS3 start_c routine.
+ *
+ * Copyright (c) 2006, 2007 CodeSourcery Inc
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include "cs3.h"
+
+extern void __libc_init_array (void);
+
+extern int main (int, char **, char **);
+
+extern void exit (int) __attribute__ ((noreturn, weak));
+
+void  __attribute ((noreturn))
+__cs3_start_c (void)
+{
+  unsigned regions = __cs3_region_num;
+  const struct __cs3_region *rptr = __cs3_regions;
+  int exit_code;
+
+  /* Initialize memory */
+  for (regions = __cs3_region_num, rptr = __cs3_regions; regions--; rptr++)
+    {
+      long long *src = (long long *)rptr->init;
+      long long *dst = (long long *)rptr->data;
+      unsigned limit = rptr->init_size;
+      unsigned count;
+
+      if (src != dst)
+	for (count = 0; count != limit; count += sizeof (long long))
+	  *dst++ = *src++;
+      else
+	dst = (long long *)((char *)dst + limit);
+      limit = rptr->zero_size;
+      for (count = 0; count != limit; count += sizeof (long long))
+	*dst++ = 0;
+    }
+
+  /* Run initializers.  */
+  __libc_init_array ();
+
+  exit_code = main (0, NULL, NULL);
+  if (exit)
+    exit (exit_code);
+  /* If exit is NULL, make sure we don't return. */
+  for (;;)
+    continue;
+}
diff --git a/support/ld/libcs3_stm32_src/stm32_isrs.S b/support/ld/libcs3_stm32_src/stm32_isrs.S
new file mode 100644
index 0000000..f95468c
--- /dev/null
+++ b/support/ld/libcs3_stm32_src/stm32_isrs.S
@@ -0,0 +1,235 @@
+/* STM32 ISR weak declarations */
+
+	.thumb
+
+/* Default handler for all non-overridden interrupts and exceptions */
+	.globl	__default_handler
+	.type	__default_handler, %function
+
+__default_handler:
+	b .
+
+	.weak	__exc_nmi
+	.globl	__exc_nmi
+	.set	__exc_nmi, __default_handler
+	.weak	__exc_hardfault
+	.globl	__exc_hardfault
+	.set	__exc_hardfault, __default_handler
+	.weak	__exc_memmanage
+	.globl	__exc_memmanage
+	.set	__exc_memmanage, __default_handler
+	.weak	__exc_busfault
+	.globl	__exc_busfault
+	.set	__exc_busfault, __default_handler
+	.weak	__exc_usagefault
+	.globl	__exc_usagefault
+	.set	__exc_usagefault, __default_handler
+	.weak	__stm32reservedexception7
+	.globl	__stm32reservedexception7
+	.set	__stm32reservedexception7, __default_handler
+	.weak	__stm32reservedexception8
+	.globl	__stm32reservedexception8
+	.set	__stm32reservedexception8, __default_handler
+	.weak	__stm32reservedexception9
+	.globl	__stm32reservedexception9
+	.set	__stm32reservedexception9, __default_handler
+	.weak	__stm32reservedexception10
+	.globl	__stm32reservedexception10
+	.set	__stm32reservedexception10, __default_handler
+	.weak	__exc_svc
+	.globl	__exc_svc
+	.set	__exc_svc, __default_handler
+	.weak	__exc_debug_monitor
+	.globl	__exc_debug_monitor
+	.set	__exc_debug_monitor, __default_handler
+	.weak	__stm32reservedexception13
+	.globl	__stm32reservedexception13
+	.set	__stm32reservedexception13, __default_handler
+	.weak	__exc_pendsv
+	.globl	__exc_pendsv
+	.set	__exc_pendsv, __default_handler
+	.weak	__exc_systick
+	.globl	__exc_systick
+	.set	__exc_systick, __default_handler
+	.weak	__irq_wwdg
+	.globl	__irq_wwdg
+	.set	__irq_wwdg, __default_handler
+	.weak	__irq_pvd
+	.globl	__irq_pvd
+	.set	__irq_pvd, __default_handler
+	.weak	__irq_tamper
+	.globl	__irq_tamper
+	.set	__irq_tamper, __default_handler
+	.weak	__irq_rtc
+	.globl	__irq_rtc
+	.set	__irq_rtc, __default_handler
+	.weak	__irq_flash
+	.globl	__irq_flash
+	.set	__irq_flash, __default_handler
+	.weak	__irq_rcc
+	.globl	__irq_rcc
+	.set	__irq_rcc, __default_handler
+	.weak	__irq_exti0
+	.globl	__irq_exti0
+	.set	__irq_exti0, __default_handler
+	.weak	__irq_exti1
+	.globl	__irq_exti1
+	.set	__irq_exti1, __default_handler
+	.weak	__irq_exti2
+	.globl	__irq_exti2
+	.set	__irq_exti2, __default_handler
+	.weak	__irq_exti3
+	.globl	__irq_exti3
+	.set	__irq_exti3, __default_handler
+	.weak	__irq_exti4
+	.globl	__irq_exti4
+	.set	__irq_exti4, __default_handler
+	.weak	__irq_dma1_channel1
+	.globl	__irq_dma1_channel1
+	.set	__irq_dma1_channel1, __default_handler
+	.weak	__irq_dma1_channel2
+	.globl	__irq_dma1_channel2
+	.set	__irq_dma1_channel2, __default_handler
+	.weak	__irq_dma1_channel3
+	.globl	__irq_dma1_channel3
+	.set	__irq_dma1_channel3, __default_handler
+	.weak	__irq_dma1_channel4
+	.globl	__irq_dma1_channel4
+	.set	__irq_dma1_channel4, __default_handler
+	.weak	__irq_dma1_channel5
+	.globl	__irq_dma1_channel5
+	.set	__irq_dma1_channel5, __default_handler
+	.weak	__irq_dma1_channel6
+	.globl	__irq_dma1_channel6
+	.set	__irq_dma1_channel6, __default_handler
+	.weak	__irq_dma1_channel7
+	.globl	__irq_dma1_channel7
+	.set	__irq_dma1_channel7, __default_handler
+	.weak	__irq_adc
+	.globl	__irq_adc
+	.set	__irq_adc, __default_handler
+	.weak	__irq_usb_hp_can_tx
+	.globl	__irq_usb_hp_can_tx
+	.set	__irq_usb_hp_can_tx, __default_handler
+	.weak	__irq_usb_lp_can_rx0
+	.globl	__irq_usb_lp_can_rx0
+	.set	__irq_usb_lp_can_rx0, __default_handler
+	.weak	__irq_can_rx1
+	.globl	__irq_can_rx1
+	.set	__irq_can_rx1, __default_handler
+	.weak	__irq_can_sce
+	.globl	__irq_can_sce
+	.set	__irq_can_sce, __default_handler
+	.weak	__irq_exti9_5
+	.globl	__irq_exti9_5
+	.set	__irq_exti9_5, __default_handler
+	.weak	__irq_tim1_brk
+	.globl	__irq_tim1_brk
+	.set	__irq_tim1_brk, __default_handler
+	.weak	__irq_tim1_up
+	.globl	__irq_tim1_up
+	.set	__irq_tim1_up, __default_handler
+	.weak	__irq_tim1_trg_com
+	.globl	__irq_tim1_trg_com
+	.set	__irq_tim1_trg_com, __default_handler
+	.weak	__irq_tim1_cc
+	.globl	__irq_tim1_cc
+	.set	__irq_tim1_cc, __default_handler
+	.weak	__irq_tim2
+	.globl	__irq_tim2
+	.set	__irq_tim2, __default_handler
+	.weak	__irq_tim3
+	.globl	__irq_tim3
+	.set	__irq_tim3, __default_handler
+	.weak	__irq_tim4
+	.globl	__irq_tim4
+	.set	__irq_tim4, __default_handler
+	.weak	__irq_i2c1_ev
+	.globl	__irq_i2c1_ev
+	.set	__irq_i2c1_ev, __default_handler
+	.weak	__irq_i2c1_er
+	.globl	__irq_i2c1_er
+	.set	__irq_i2c1_er, __default_handler
+	.weak	__irq_i2c2_ev
+	.globl	__irq_i2c2_ev
+	.set	__irq_i2c2_ev, __default_handler
+	.weak	__irq_i2c2_er
+	.globl	__irq_i2c2_er
+	.set	__irq_i2c2_er, __default_handler
+	.weak	__irq_spi1
+	.globl	__irq_spi1
+	.set	__irq_spi1, __default_handler
+	.weak	__irq_spi2
+	.globl	__irq_spi2
+	.set	__irq_spi2, __default_handler
+	.weak	__irq_usart1
+	.globl	__irq_usart1
+	.set	__irq_usart1, __default_handler
+	.weak	__irq_usart2
+	.globl	__irq_usart2
+	.set	__irq_usart2, __default_handler
+	.weak	__irq_usart3
+	.globl	__irq_usart3
+	.set	__irq_usart3, __default_handler
+	.weak	__irq_exti15_10
+	.globl	__irq_exti15_10
+	.set	__irq_exti15_10, __default_handler
+	.weak	__irq_rtcalarm
+	.globl	__irq_rtcalarm
+	.set	__irq_rtcalarm, __default_handler
+	.weak	__irq_usbwakeup
+	.globl	__irq_usbwakeup
+	.set	__irq_usbwakeup, __default_handler
+#if defined (STM32_HIGH_DENSITY)
+	.weak	__irq_tim8_brk
+	.globl	__irq_tim8_brk
+	.set	__irq_tim8_brk, __default_handler
+	.weak	__irq_tim8_up
+	.globl	__irq_tim8_up
+	.set	__irq_tim8_up, __default_handler
+	.weak	__irq_tim8_trg_com
+	.globl	__irq_tim8_trg_com
+	.set	__irq_tim8_trg_com, __default_handler
+	.weak	__irq_tim8_cc
+	.globl	__irq_tim8_cc
+	.set	__irq_tim8_cc, __default_handler
+	.weak	__irq_adc3
+	.globl	__irq_adc3
+	.set	__irq_adc3, __default_handler
+	.weak	__irq_fsmc
+	.globl	__irq_fsmc
+	.set	__irq_fsmc, __default_handler
+	.weak	__irq_sdio
+	.globl	__irq_sdio
+	.set	__irq_sdio, __default_handler
+	.weak	__irq_tim5
+	.globl	__irq_tim5
+	.set	__irq_tim5, __default_handler
+	.weak	__irq_spi3
+	.globl	__irq_spi3
+	.set	__irq_spi3, __default_handler
+	.weak	__irq_uart4
+	.globl	__irq_uart4
+	.set	__irq_uart4, __default_handler
+	.weak	__irq_uart5
+	.globl	__irq_uart5
+	.set	__irq_uart5, __default_handler
+	.weak	__irq_tim6
+	.globl	__irq_tim6
+	.set	__irq_tim6, __default_handler
+	.weak	__irq_tim7
+	.globl	__irq_tim7
+	.set	__irq_tim7, __default_handler
+	.weak	__irq_dma2_channel1
+	.globl	__irq_dma2_channel1
+	.set	__irq_dma2_channel1, __default_handler
+	.weak	__irq_dma2_channel2
+	.globl	__irq_dma2_channel2
+	.set	__irq_dma2_channel2, __default_handler
+	.weak	__irq_dma2_channel3
+	.globl	__irq_dma2_channel3
+	.set	__irq_dma2_channel3, __default_handler
+	.weak	__irq_dma2_channel4_5
+	.globl	__irq_dma2_channel4_5
+	.set	__irq_dma2_channel4_5, __default_handler
+#endif /* STM32_HIGH_DENSITY */
diff --git a/support/ld/libcs3_stm32_src/stm32_vector_table.S b/support/ld/libcs3_stm32_src/stm32_vector_table.S
new file mode 100644
index 0000000..8c71cb5
--- /dev/null
+++ b/support/ld/libcs3_stm32_src/stm32_vector_table.S
@@ -0,0 +1,90 @@
+/* STM32 vector table */
+
+	.section	".cs3.interrupt_vector"
+
+	.globl	__cs3_stm32_vector_table
+	.type	__cs3_stm32_vector_table, %object
+
+__cs3_stm32_vector_table:
+/* CM3 core interrupts */
+	.long	__cs3_stack
+	.long	__cs3_reset
+	.long	__exc_nmi
+	.long	__exc_hardfault
+	.long	__exc_memmanage
+	.long	__exc_busfault
+	.long	__exc_usagefault
+	.long	__stm32reservedexception7
+	.long	__stm32reservedexception8
+	.long	__stm32reservedexception9
+	.long	__stm32reservedexception10
+	.long	__exc_svc
+	.long	__exc_debug_monitor
+	.long	__stm32reservedexception13
+	.long	__exc_pendsv
+	.long	__exc_systick
+/* Peripheral interrupts */
+	.long	__irq_wwdg
+	.long	__irq_pvd
+	.long	__irq_tamper
+	.long	__irq_rtc
+	.long	__irq_flash
+	.long	__irq_rcc
+	.long	__irq_exti0
+	.long	__irq_exti1
+	.long	__irq_exti2
+	.long	__irq_exti3
+	.long	__irq_exti4
+	.long	__irq_dma1_channel1
+	.long	__irq_dma1_channel2
+	.long	__irq_dma1_channel3
+	.long	__irq_dma1_channel4
+	.long	__irq_dma1_channel5
+	.long	__irq_dma1_channel6
+	.long	__irq_dma1_channel7
+	.long	__irq_adc
+	.long	__irq_usb_hp_can_tx
+	.long	__irq_usb_lp_can_rx0
+	.long	__irq_can_rx1
+	.long	__irq_can_sce
+	.long	__irq_exti9_5
+	.long	__irq_tim1_brk
+	.long	__irq_tim1_up
+	.long	__irq_tim1_trg_com
+	.long	__irq_tim1_cc
+	.long	__irq_tim2
+	.long	__irq_tim3
+	.long	__irq_tim4
+	.long	__irq_i2c1_ev
+	.long	__irq_i2c1_er
+	.long	__irq_i2c2_ev
+	.long	__irq_i2c2_er
+	.long	__irq_spi1
+	.long	__irq_spi2
+	.long	__irq_usart1
+	.long	__irq_usart2
+	.long	__irq_usart3
+	.long	__irq_exti15_10
+	.long	__irq_rtcalarm
+	.long	__irq_usbwakeup
+#if defined (STM32_HIGH_DENSITY)
+	.weak	__irq_tim8_brk
+	.weak	__irq_tim8_up
+	.weak	__irq_tim8_trg_com
+	.weak	__irq_tim8_cc
+	.weak	__irq_adc3
+	.weak	__irq_fsmc
+	.weak	__irq_sdio
+	.weak	__irq_tim5
+	.weak	__irq_spi3
+	.weak	__irq_uart4
+	.weak	__irq_uart5
+	.weak	__irq_tim6
+	.weak	__irq_tim7
+	.weak	__irq_dma2_channel1
+	.weak	__irq_dma2_channel2
+	.weak	__irq_dma2_channel3
+	.weak	__irq_dma2_channel4_5
+#endif /* STM32_HIGH_DENSITY */
+
+	.size	__cs3_stm32_vector_table, . - __cs3_stm32_vector_table
diff --git a/support/ld/maple/flash.ld b/support/ld/maple/flash.ld
index 2d40100..9c3efcb 100644
--- a/support/ld/maple/flash.ld
+++ b/support/ld/maple/flash.ld
@@ -1,211 +1,28 @@
-/* Linker script for STM32 (by Lanchon with Mods by LeafLabs)
- *
- * Version:Sourcery G++ 4.2-84
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- *  Copyright 2007 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * STM32F103RBT6 medium density chip linker script for use with
+ * maple bootloader. Loads to flash.
+ */
 
-/* Define memory spaces. */
+/*
+ * Define memory spaces.
+ */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K
   rom (rx)  : ORIGIN = 0x08005000, LENGTH = 108K
 }
 
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use medium density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-    *(.rom)
-    *(.rom.b)
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
-
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+GROUP(libcs3_stm32_med_density.a)
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >rom
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >rom
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >rom
-
-/* expose a custom rom only section */
-  .USER_FLASH :
-  {
-    *(.USER_FLASH)
-  } >rom
-
-
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
-  __cs3_region_size_rom = LENGTH(rom);
-  __cs3_region_num = 1;
-
-  .data :
-  {
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram AT>rom
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram AT>rom
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.data);
-  __cs3_region_init_size_ram = _edata - ADDR (.data);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
+/*
+ * Define the rest of the sections
+ */
+INCLUDE common_rom.inc
diff --git a/support/ld/maple/jtag.ld b/support/ld/maple/jtag.ld
index 435e3f0..caf90ee 100644
--- a/support/ld/maple/jtag.ld
+++ b/support/ld/maple/jtag.ld
@@ -1,186 +1,28 @@
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * STM32F103RBT6 medium density chip linker script.
+ */
 
-/* Define memory spaces. */
+/*
+ * Define memory spaces.
+ */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
   rom (rx)  : ORIGIN = 0x08000000, LENGTH = 128K
 }
 
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use medium density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-    *(.rom)
-    *(.rom.b)
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
+GROUP(libcs3_stm32_med_density.a)
 
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
-
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >rom
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >rom
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >rom
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
-  __cs3_region_size_rom = LENGTH(rom);
-  __cs3_region_num = 1;
-
-  .data :
-  {
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram AT>rom
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram AT>rom
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.data);
-  __cs3_region_init_size_ram = _edata - ADDR (.data);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
+/*
+ * Define the rest of the sections
+ */
+INCLUDE common_rom.inc
 
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
diff --git a/support/ld/maple/ram.ld b/support/ld/maple/ram.ld
index 1fbecc5..b1e285e 100644
--- a/support/ld/maple/ram.ld
+++ b/support/ld/maple/ram.ld
@@ -1,220 +1,27 @@
-/* Linker script for STM32 (by Lanchon with Mods by LeafLabs)
- *
- * Version:Sourcery G++ 4.2-84
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- *  Copyright 2007 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * STM32F103RBT6 medium density chip linker script. Loads to ram.
+ */
 
-/* Define memory spaces. */
+/*
+ * Define memory spaces.
+ */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K
   rom (rx)  : ORIGIN = 0x08005000, LENGTH = 0K
 }
 
-
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use medium density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
-
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+GROUP(libcs3_stm32_med_density.a)
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
-
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >ram
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  /* even cs3.rom is in ram since its running as user code under the Maple
-     bootloader */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >ram
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >ram
-
-  .cs3.rom :
-  {
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    *(.rom)
-    . = ALIGN (8);
-  } >ram
-
-  .cs3.rom.bss :
-  {
-    *(.rom.b)
-    . = ALIGN (8);
-  } >ram
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(ram);
-  __cs3_region_size_rom = LENGTH(ram);
-  __cs3_region_init_rom = LOADADDR (.cs3.rom);
-  __cs3_region_init_size_rom = SIZEOF(.cs3.rom);
-  __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);
-
-  .data :
-  {
-
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.text);
-  __cs3_region_init_size_ram = _edata - ADDR (.text);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
+REGION_ALIAS("REGION_TEXT", ram);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
+/*
+ * Define the rest of the sections
+ */
+INCLUDE common_ram.inc
diff --git a/support/ld/maple_mini/flash.ld b/support/ld/maple_mini/flash.ld
index 2d40100..4c26da2 100644
--- a/support/ld/maple_mini/flash.ld
+++ b/support/ld/maple_mini/flash.ld
@@ -1,211 +1,27 @@
-/* Linker script for STM32 (by Lanchon with Mods by LeafLabs)
- *
- * Version:Sourcery G++ 4.2-84
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- *  Copyright 2007 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * Maple mini flash linker script.
+ */
 
-/* Define memory spaces. */
+/*
+ * Define memory spaces.
+ */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K
   rom (rx)  : ORIGIN = 0x08005000, LENGTH = 108K
 }
 
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use medium density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-    *(.rom)
-    *(.rom.b)
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
-
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+GROUP(libcs3_stm32_med_density.a)
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >rom
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >rom
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >rom
-
-/* expose a custom rom only section */
-  .USER_FLASH :
-  {
-    *(.USER_FLASH)
-  } >rom
-
-
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
-  __cs3_region_size_rom = LENGTH(rom);
-  __cs3_region_num = 1;
-
-  .data :
-  {
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram AT>rom
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram AT>rom
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.data);
-  __cs3_region_init_size_ram = _edata - ADDR (.data);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
+/*
+ * Define the rest of the sections
+ */
+INCLUDE common_rom.inc
diff --git a/support/ld/maple_mini/jtag.ld b/support/ld/maple_mini/jtag.ld
index 435e3f0..31768ed 100644
--- a/support/ld/maple_mini/jtag.ld
+++ b/support/ld/maple_mini/jtag.ld
@@ -1,186 +1,28 @@
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * Maple mini linker script bare metal target linker script.
+ */
 
-/* Define memory spaces. */
+/*
+ * Define memory spaces.
+ */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000000, LENGTH = 20K
   rom (rx)  : ORIGIN = 0x08000000, LENGTH = 128K
 }
 
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use medium density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-    *(.rom)
-    *(.rom.b)
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
+GROUP(libcs3_stm32_med_density.a)
 
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
-
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >rom
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >rom
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >rom
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
-  __cs3_region_size_rom = LENGTH(rom);
-  __cs3_region_num = 1;
-
-  .data :
-  {
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram AT>rom
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram AT>rom
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.data);
-  __cs3_region_init_size_ram = _edata - ADDR (.data);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
+/*
+ * Define the rest of the sections
+ */
+INCLUDE common_rom.inc
 
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
diff --git a/support/ld/maple_mini/ram.ld b/support/ld/maple_mini/ram.ld
index 1fbecc5..7dd7ee5 100644
--- a/support/ld/maple_mini/ram.ld
+++ b/support/ld/maple_mini/ram.ld
@@ -1,220 +1,27 @@
-/* Linker script for STM32 (by Lanchon with Mods by LeafLabs)
- *
- * Version:Sourcery G++ 4.2-84
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- *  Copyright 2007 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * Maple mini ram target linker script.
+ */
 
-/* Define memory spaces. */
+/*
+ * Define memory spaces.
+ */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 17K
   rom (rx)  : ORIGIN = 0x08005000, LENGTH = 0K
 }
 
-
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use medium density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
-
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+GROUP(libcs3_stm32_med_density.a)
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
-
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >ram
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  /* even cs3.rom is in ram since its running as user code under the Maple
-     bootloader */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >ram
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >ram
-
-  .cs3.rom :
-  {
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    *(.rom)
-    . = ALIGN (8);
-  } >ram
-
-  .cs3.rom.bss :
-  {
-    *(.rom.b)
-    . = ALIGN (8);
-  } >ram
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(ram);
-  __cs3_region_size_rom = LENGTH(ram);
-  __cs3_region_init_rom = LOADADDR (.cs3.rom);
-  __cs3_region_init_size_rom = SIZEOF(.cs3.rom);
-  __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);
-
-  .data :
-  {
-
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.text);
-  __cs3_region_init_size_ram = _edata - ADDR (.text);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
+REGION_ALIAS("REGION_TEXT", ram);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
+/*
+ * Define the rest of the sections
+ */
+INCLUDE common_ram.inc
diff --git a/support/ld/maple_native/flash.ld b/support/ld/maple_native/flash.ld
index 4e820d2..4358419 100644
--- a/support/ld/maple_native/flash.ld
+++ b/support/ld/maple_native/flash.ld
@@ -1,211 +1,22 @@
-/* Linker script for STM32 (by Lanchon with Mods by LeafLabs)
- *
- * Version:Sourcery G++ 4.2-84
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- *  Copyright 2007 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * STM32 high density chip linker script. Loads to flash with Maple bootloader
+ */
 
-/* Define memory spaces. */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K
   rom (rx)  : ORIGIN = 0x08005000, LENGTH = 492K
 }
 
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use high density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-    *(.rom)
-    *(.rom.b)
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
-
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+GROUP(libcs3_stm32_high_density.a)
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
+INCLUDE common_rom.inc
 
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >rom
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >rom
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >rom
-
-/* expose a custom rom only section */
-  .USER_FLASH :
-  {
-    *(.USER_FLASH)
-  } >rom
-
-
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
-  __cs3_region_size_rom = LENGTH(rom);
-  __cs3_region_num = 1;
-
-  .data :
-  {
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram AT>rom
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram AT>rom
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.data);
-  __cs3_region_init_size_ram = _edata - ADDR (.data);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
diff --git a/support/ld/maple_native/jtag.ld b/support/ld/maple_native/jtag.ld
index 90a0a3f..0e99c3b 100644
--- a/support/ld/maple_native/jtag.ld
+++ b/support/ld/maple_native/jtag.ld
@@ -1,186 +1,21 @@
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
-
-/* Define memory spaces. */
+/*
+ * Linker script for STM32.
+ * STM32 high density chip linker script. Bare metal linker script.
+ */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
   rom (rx)  : ORIGIN = 0x08000000, LENGTH = 512K
 }
 
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use high density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-    *(.rom)
-    *(.rom.b)
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
+GROUP(libcs3_stm32_high_density.a)
 
-    . = ALIGN(4);
-    KEEP(*(.init))
+REGION_ALIAS("REGION_TEXT", rom);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+INCLUDE common_rom.inc
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
-
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >rom
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >rom
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >rom
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(rom);
-  __cs3_region_size_rom = LENGTH(rom);
-  __cs3_region_num = 1;
-
-  .data :
-  {
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram AT>rom
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram AT>rom
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.data);
-  __cs3_region_init_size_ram = _edata - ADDR (.data);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
diff --git a/support/ld/maple_native/ram.ld b/support/ld/maple_native/ram.ld
index a5e1482..22c09cd 100644
--- a/support/ld/maple_native/ram.ld
+++ b/support/ld/maple_native/ram.ld
@@ -1,220 +1,22 @@
-/* Linker script for STM32 (by Lanchon with Mods by LeafLabs)
- *
- * Version:Sourcery G++ 4.2-84
- * BugURL:https://support.codesourcery.com/GNUToolchain/
- *
- *  Copyright 2007 CodeSourcery.
- *
- * The authors hereby grant permission to use, copy, modify, distribute,
- * and license this software and its documentation for any purpose, provided
- * that existing copyright notices are retained in all copies and that this
- * notice is included verbatim in any distributions. No written agreement,
- * license, or royalty fee is required for any of the authorized uses.
- * Modifications to this software may be copyrighted by their authors
- * and need not follow the licensing terms described here, provided that
- * the new terms are clearly indicated on the first page of each file where
- * they apply. */
-
-/* Linker script for STM32 (by Lanchon),
- * ROM and RAM relocated to their positions 
- * as placed by Maple bootloader
- *
- * Configure target memory and included script
- * according to your application requirements. */
+/*
+ * Linker script for STM32.
+ * STM32 high density chip linker script. Loads to RAM with Maple bootloader
+ */
 
-/* Define memory spaces. */
 MEMORY
 {
   ram (rwx) : ORIGIN = 0x20000C00, LENGTH = 61K
   rom (rx)  : ORIGIN = 0x08005000, LENGTH = 0K
 }
 
-
-OUTPUT_FORMAT ("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
-ENTRY(_start)
-SEARCH_DIR(.)
-/* GROUP(-lgcc -lc -lcs3 -lcs3unhosted -lcs3-lanchon-stm32) */
-GROUP(libgcc.a libc.a libm.a libcs3-lanchon-stm32.a)
-
-/* These force the linker to search for particular symbols from
- * the start of the link process and thus ensure the user's
- * overrides are picked up
+/*
+ * Use high density device vector table
  */
-EXTERN(__cs3_reset_lanchon_stm32)
-INCLUDE names.inc
-EXTERN(__cs3_interrupt_vector_lanchon_stm32)
-EXTERN(__cs3_start_c main __cs3_stack __cs3_heap_end)
-EXTERN(_start)
-
-PROVIDE(__cs3_stack = __cs3_region_start_ram + __cs3_region_size_ram);
-PROVIDE(__cs3_heap_start = _end);
-PROVIDE(__cs3_heap_end = __cs3_region_start_ram + __cs3_region_size_ram);
-
-SECTIONS
-{
-  .text :
-  {
-    CREATE_OBJECT_SYMBOLS
-    __cs3_region_start_ram = .;
-    *(.cs3.region-head.ram)
-    __cs3_interrupt_vector = __cs3_interrupt_vector_lanchon_stm32;
-    *(.cs3.interrupt_vector)
-    /* Make sure we pulled in an interrupt vector.  */
-    ASSERT (. != __cs3_interrupt_vector_lanchon_stm32, "No interrupt vector");
-
-    PROVIDE(__cs3_reset_lanchon_stm32 = _start);
-    __cs3_reset = __cs3_reset_lanchon_stm32;
-    *(.cs3.reset)
-
-    *(.text .text.* .gnu.linkonce.t.*)
-    *(.plt)
-    *(.gnu.warning)
-    *(.glue_7t) *(.glue_7) *(.vfp11_veneer)
-
-    *(.rodata .rodata.* .gnu.linkonce.r.*)
-
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    *(.gcc_except_table)
-    *(.eh_frame_hdr)
-    *(.eh_frame)
-
-    . = ALIGN(4);
-    KEEP(*(.init))
-
-    . = ALIGN(4);
-    __preinit_array_start = .;
-    KEEP (*(.preinit_array))
-    __preinit_array_end = .;
+GROUP(libcs3_stm32_high_density.a)
 
-    . = ALIGN(4);
-    __init_array_start = .;
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array))
-    __init_array_end = .;
+REGION_ALIAS("REGION_TEXT", ram);
+REGION_ALIAS("REGION_DATA", ram);
+REGION_ALIAS("REGION_BSS", ram);
 
-    . = ALIGN(0x4);
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*crtend.o(.ctors))
-
-    . = ALIGN(4);
-    KEEP(*(.fini))
-
-    . = ALIGN(4);
-    __fini_array_start = .;
-    KEEP (*(.fini_array))
-    KEEP (*(SORT(.fini_array.*)))
-    __fini_array_end = .;
-
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*crtend.o(.dtors))
-
-    . = ALIGN(4);
-    __cs3_regions = .;
-    LONG (0)
-    LONG (__cs3_region_init_ram)
-    LONG (__cs3_region_start_ram)
-    LONG (__cs3_region_init_size_ram)
-    LONG (__cs3_region_zero_size_ram)
-  } >ram
-
-  /* .ARM.exidx is sorted, so has to go in its own output section.  */
-  /* even cs3.rom is in ram since its running as user code under the Maple
-     bootloader */
-  __exidx_start = .;
-  .ARM.exidx :
-  {
-    *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-  } >ram
-  __exidx_end = .;
-  .text.align :
-  {
-    . = ALIGN(8);
-    _etext = .;
-  } >ram
-
-  .cs3.rom :
-  {
-    __cs3_region_start_rom = .;
-    *(.cs3.region-head.rom)
-    *(.rom)
-    . = ALIGN (8);
-  } >ram
-
-  .cs3.rom.bss :
-  {
-    *(.rom.b)
-    . = ALIGN (8);
-  } >ram
-  /* __cs3_region_end_rom is deprecated */
-  __cs3_region_end_rom = __cs3_region_start_rom + LENGTH(ram);
-  __cs3_region_size_rom = LENGTH(ram);
-  __cs3_region_init_rom = LOADADDR (.cs3.rom);
-  __cs3_region_init_size_rom = SIZEOF(.cs3.rom);
-  __cs3_region_zero_size_rom = SIZEOF(.cs3.rom.bss);
-
-  .data :
-  {
-
-    KEEP(*(.jcr))
-    *(.got.plt) *(.got)
-    *(.shdata)
-    *(.data .data.* .gnu.linkonce.d.*)
-    *(.ram)
-    . = ALIGN (8);
-    _edata = .;
-  } >ram
-  .bss :
-  {
-    *(.shbss)
-    *(.bss .bss.* .gnu.linkonce.b.*)
-    *(COMMON)
-    *(.ram.b)
-    . = ALIGN (8);
-    _end = .;
-    __end = .;
-  } >ram
-  /* __cs3_region_end_ram is deprecated */
-  __cs3_region_end_ram = __cs3_region_start_ram + LENGTH(ram);
-  __cs3_region_size_ram = LENGTH(ram);
-  __cs3_region_init_ram = LOADADDR (.text);
-  __cs3_region_init_size_ram = _edata - ADDR (.text);
-  __cs3_region_zero_size_ram = _end - _edata;
-  __cs3_region_num = 1;
-
-  .stab 0 (NOLOAD) : { *(.stab) }
-  .stabstr 0 (NOLOAD) : { *(.stabstr) }
-  /* DWARF debug sections.
-   * Symbols in the DWARF debugging sections are relative to the beginning
-   * of the section so we begin them at 0.  */
-  /* DWARF 1 */
-  .debug          0 : { *(.debug) }
-  .line           0 : { *(.line) }
-  /* GNU DWARF 1 extensions */
-  .debug_srcinfo  0 : { *(.debug_srcinfo) }
-  .debug_sfnames  0 : { *(.debug_sfnames) }
-  /* DWARF 1.1 and DWARF 2 */
-  .debug_aranges  0 : { *(.debug_aranges) }
-  .debug_pubnames 0 : { *(.debug_pubnames) }
-  /* DWARF 2 */
-  .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
-  .debug_abbrev   0 : { *(.debug_abbrev) }
-  .debug_line     0 : { *(.debug_line) }
-  .debug_frame    0 : { *(.debug_frame) }
-  .debug_str      0 : { *(.debug_str) }
-  .debug_loc      0 : { *(.debug_loc) }
-  .debug_macinfo  0 : { *(.debug_macinfo) }
-  /* SGI/MIPS DWARF 2 extensions */
-  .debug_weaknames 0 : { *(.debug_weaknames) }
-  .debug_funcnames 0 : { *(.debug_funcnames) }
-  .debug_typenames 0 : { *(.debug_typenames) }
-  .debug_varnames  0 : { *(.debug_varnames) }
-
-  .note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
-  .ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
-  /DISCARD/ : { *(.note.GNU-stack) }
-}
+INCLUDE common_ram.inc
 
diff --git a/support/ld/names.inc b/support/ld/names.inc
index a0e1fb2..9fab36c 100644
--- a/support/ld/names.inc
+++ b/support/ld/names.inc
@@ -1,61 +1,78 @@
-/* ISR names for STM32 (by Lanchon) */
+EXTERN(__cs3_stack)
+EXTERN(__cs3_reset)
+EXTERN(__exc_nmi)
+EXTERN(__exc_hardfault)
+EXTERN(__exc_memmanage)
+EXTERN(__exc_busfault)
+EXTERN(__exc_usagefault)
+EXTERN(__stm32reservedexception7)
+EXTERN(__stm32reservedexception8)
+EXTERN(__stm32reservedexception9)
+EXTERN(__stm32reservedexception10)
+EXTERN(__exc_svc)
+EXTERN(__exc_debug_monitor)
+EXTERN(__stm32reservedexception13)
+EXTERN(__exc_pendsv)
+EXTERN(__exc_systick)
 
-EXTERN (__cs3_stack)
-EXTERN (__cs3_reset)
-EXTERN (NMIException)
-EXTERN (HardFaultException)
-EXTERN (MemManageException)
-EXTERN (BusFaultException)
-EXTERN (UsageFaultException)
-EXTERN (__STM32ReservedException7)
-EXTERN (__STM32ReservedException8)
-EXTERN (__STM32ReservedException9)
-EXTERN (__STM32ReservedException10)
-EXTERN (SVCHandler)
-EXTERN (DebugMonitor)
-EXTERN (__STM32ReservedException13)
-EXTERN (PendSVC)
-EXTERN (SysTickHandler)
-EXTERN (WWDG_IRQHandler)
-EXTERN (PVD_IRQHandler)
-EXTERN (TAMPER_IRQHandler)
-EXTERN (RTC_IRQHandler)
-EXTERN (FLASH_IRQHandler)
-EXTERN (RCC_IRQHandler)
-EXTERN (EXTI0_IRQHandler)
-EXTERN (EXTI1_IRQHandler)
-EXTERN (EXTI2_IRQHandler)
-EXTERN (EXTI3_IRQHandler)
-EXTERN (EXTI4_IRQHandler)
-EXTERN (DMAChannel1_IRQHandler)
-EXTERN (DMAChannel2_IRQHandler)
-EXTERN (DMAChannel3_IRQHandler)
-EXTERN (DMAChannel4_IRQHandler)
-EXTERN (DMAChannel5_IRQHandler)
-EXTERN (DMAChannel6_IRQHandler)
-EXTERN (DMAChannel7_IRQHandler)
-EXTERN (ADC_IRQHandler)
-EXTERN (USB_HP_CAN_TX_IRQHandler)
-EXTERN (USB_LP_CAN_RX0_IRQHandler)
-EXTERN (CAN_RX1_IRQHandler)
-EXTERN (CAN_SCE_IRQHandler)
-EXTERN (EXTI9_5_IRQHandler)
-EXTERN (TIM1_BRK_IRQHandler)
-EXTERN (TIM1_UP_IRQHandler)
-EXTERN (TIM1_TRG_COM_IRQHandler)
-EXTERN (TIM1_CC_IRQHandler)
-EXTERN (TIM2_IRQHandler)
-EXTERN (TIM3_IRQHandler)
-EXTERN (TIM4_IRQHandler)
-EXTERN (I2C1_EV_IRQHandler)
-EXTERN (I2C1_ER_IRQHandler)
-EXTERN (I2C2_EV_IRQHandler)
-EXTERN (I2C2_ER_IRQHandler)
-EXTERN (SPI1_IRQHandler)
-EXTERN (SPI2_IRQHandler)
-EXTERN (USART1_IRQHandler)
-EXTERN (USART2_IRQHandler)
-EXTERN (USART3_IRQHandler)
-EXTERN (EXTI15_10_IRQHandler)
-EXTERN (RTCAlarm_IRQHandler)
-EXTERN (USBWakeUp_IRQHandler)
+EXTERN(__irq_wwdg)
+EXTERN(__irq_pvd)
+EXTERN(__irq_tamper)
+EXTERN(__irq_rtc)
+EXTERN(__irq_flash)
+EXTERN(__irq_rcc)
+EXTERN(__irq_exti0)
+EXTERN(__irq_exti1)
+EXTERN(__irq_exti2)
+EXTERN(__irq_exti3)
+EXTERN(__irq_exti4)
+EXTERN(__irq_dma_channel1)
+EXTERN(__irq_dma_channel2)
+EXTERN(__irq_dma_channel3)
+EXTERN(__irq_dma_channel4)
+EXTERN(__irq_dma_channel5)
+EXTERN(__irq_dma_channel6)
+EXTERN(__irq_dma_channel7)
+EXTERN(__irq_adc)
+EXTERN(__irq_usb_hp_can_tx)
+EXTERN(__irq_usb_lp_can_rx0)
+EXTERN(__irq_can_rx1)
+EXTERN(__irq_can_sce)
+EXTERN(__irq_exti9_5)
+EXTERN(__irq_tim1_brk)
+EXTERN(__irq_tim1_up)
+EXTERN(__irq_tim1_trg_com)
+EXTERN(__irq_tim1_cc)
+EXTERN(__irq_tim2)
+EXTERN(__irq_tim3)
+EXTERN(__irq_tim4)
+EXTERN(__irq_i2c1_ev)
+EXTERN(__irq_i2c1_er)
+EXTERN(__irq_i2c2_ev)
+EXTERN(__irq_i2c2_er)
+EXTERN(__irq_spi1)
+EXTERN(__irq_spi2)
+EXTERN(__irq_usart1)
+EXTERN(__irq_usart2)
+EXTERN(__irq_usart3)
+EXTERN(__irq_exti15_10)
+EXTERN(__irq_rtcalarm)
+EXTERN(__irq_usbwakeup)
+
+EXTERN(__irq_tim8_brk)
+EXTERN(__irq_tim8_up)
+EXTERN(__irq_tim8_trg_com)
+EXTERN(__irq_tim8_cc)
+EXTERN(__irq_adc3)
+EXTERN(__irq_fsmc)
+EXTERN(__irq_sdio)
+EXTERN(__irq_tim5)
+EXTERN(__irq_spi3)
+EXTERN(__irq_uart4)
+EXTERN(__irq_uart5)
+EXTERN(__irq_tim6)
+EXTERN(__irq_tim7)
+EXTERN(__irq_dma2_channel1)
+EXTERN(__irq_dma2_channel2)
+EXTERN(__irq_dma2_channel3)
+EXTERN(__irq_dma2_channel4_5)
diff --git a/support/ld/src.zip b/support/ld/src.zip
deleted file mode 100644
index 58ff908..0000000
Binary files a/support/ld/src.zip and /dev/null differ
-- 
cgit v1.2.3