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* usb: Replace duplicated code with nvic.h API.Marti Bolivar2011-10-185-58/+19
| | | | | | | | | Replace calls to usbEnbISR()/usbDsbISR() with nvic_irq_enable()/nvic_irq_disable(). Remove ST-style code. Use nvic_sys_reset() instead of systemHardReset(). Rename some conflicting #defines that including nvic.h created. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* usb: Cleanups and renames.Marti Bolivar2011-10-182-21/+4
| | | | | | | | | Rename setupUSB() and disableUSB() to usb_cdcacm_enable() and usb_cdcacm_disable(), respectively. Remove usbSendHello(). This shouldn't exist. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* usb: Move some board-specific configuration to Wirish.Marti Bolivar2011-10-183-39/+18
| | | | | | | | | Create new BOARD_USB_DISC_DEV and BOARD_USB_DISC_BIT board-specific values. Use these as arguments to setupUSB() and disableUSB(). This helps make the USB stack more generic, and goes towards the resolution of an important FIXME. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* timer.h: fix timer_oc_set_mode().Marti Bolivar2011-10-121-4/+2
| | | | | | | | | timer_oc_set_mode() incorrectly writes to CCMR1 when channel is 2; fix this. Thanks to ala42 for the fix. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* usart: Add usart_rx().Marti Bolivar2011-10-072-0/+17
| | | | | usart_rx() is a nonblocking USART receive. Add it for symmetry with usart_tx().
* Add support for the Olimex STM32 H103 board.David Kiliani2011-09-271-0/+6
| | | | | | | | Pin layout and header files for the STM32 H103 prototype board from Olimex featuring an STM32F103RBT6 chip. This commit contains all necessary changes to compile with BOARD=olimex_stm32_h103. Signed-off-by: David Kiliani <mail@davidkiliani.de>
* rcc: Add RCC_USB to rcc_clk_id/rcc_dev_table.Marti Bolivar2011-09-242-0/+2
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* nvic: Add nvic_sys_reset().Marti Bolivar2011-09-242-1/+14
| | | | | | This uses the SCB_AIRCR register to force a system reset. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* scb.h: Fix register map and bit definitions.Marti Bolivar2011-09-241-4/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the change log: This commit breaks backwards compatibility with 0.0.12. However, it appears that the previous version was incorrect, so these changes are necessary. The SCB register map type (scb_reg_map) appears to be adapted from versions specified by ARM; these include every possible register, and do not necessarily apply to the STM32, since some registers are implementation defined, to the extent that the implementation is allowed not to feature them at all. Thus, the current definition appears to be an overreach, since libmaple is STM32-specific. We should thus revise it based on ST's PM0056, where the STM32 SCB is specified. However, the ST docs appear to be buggy. In particular, they appear to contradict requirements made by ARM v7-M ARM with respect to the debug fault status register (DFSR), which ARM says must exist, but ST fails to specify (it does leave a DFSR-sized hole in the SCB memory layout, conveniently located next to some obvious typos which suggest that the section was not well-proofread). We defer to ARM and assume ST just forgot to document the register, and leave the DFSR field in struct scb_reg_map, since (based on my reading) its absence would be a silicon bug. All of the registers appearing in memory addresses higher than that of SCB_BFAR are not specified by ST, but the v7-M ARM appears to give some latitude on this to the implementation. Leave them in the source text, but put them in an appropriately-commented #if 0 block so that users who know they're there can yell at us if they find them missing. In this block, the Auxiliary Feature Register's field was "ADR" instead of "AFR" in struct scb_reg_map; fix this. Register bit definitions have been added which are named based on PM0056 when possible, and on the November 2010 "Derrata 2010_Q3" issue of the ARM v7-M Architecture Reference Manual, in the case of the DFSR. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Merge remote branch 'rryan/usb_fixes'Marti Bolivar2011-09-204-156/+90
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| * Missed one hard-coded structure size.RJ Ryan2011-09-181-1/+1
| | | | | | | | Signed-off-by: RJ Ryan <rryan@mit.edu>
| * Fix memory alignment of USB descriptor structures.RJ Ryan2011-09-183-155/+89
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A variety of USB descriptor structures have been manually "unpacked". Instead of using the struct, their members were unpacked into the struct they were nested in. Additionally sizeof()'s were commented in favor of manual calculation of structure sizes. After uncommenting these changes, the USB CDC peripheral stopped correctly configuring with the host. The root problem with the structures is that GCC is padding them. By applying __attribute__((__packed__)), these problems are fixed. I removed all the instances of the workaround I saw within the USB code. Signed-off-by: RJ Ryan <rryan@mit.edu>
* | Add a libc abort() implementation.RJ Ryan2011-09-161-5/+28
| | | | | | | | | | | | | | | | | | | | | | The STL in particular relies on abort() for entering an error state. Without an abort() definition, the use of many STL primitives results in a link error because the default implementation of abort() uses _kill, _exit, and _getpid -- none of which are present. My abort() implementation writes an error message to the error USART and enters the throbbing-LED error state. Signed-off-by: RJ Ryan <rryan@mit.edu>
* | Add an __assert_func assertion handler so that libc does not use itsRJ Ryan2011-09-161-0/+9
|/ | | | | | | default implementation. This allows the use of assert() from libc's assert.h. Signed-off-by: RJ Ryan <rryan@mit.edu>
* Added more doxygen file level headers. Documented a few more functions.Michael Hope2011-09-1315-4/+68
| | | | Signed-off-by: Michael Hope <michaelh@juju.net.nz>
* syscalls.c: Allow environment to specify heap boundaries.Marti Bolivar2011-09-121-6/+12
| | | | | | Rename HEAP_START/HEAP_END macros CONFIG_HEAP_START/CONFIG_HEAP_END, to mark them as build-time configuration options. Wrap their definitions with #ifndefs appropriately.
* usart.h: Deprecate rx_buf field in usart_dev.Marti Bolivar2011-09-121-1/+4
| | | | | | | nzmichaelh rightly argues that actual RX buffers should be heap-allocated, to avoid wastage for unused devices. Deprecate the field for 0.0.12, since that's coming out soon. This will let us get rid of this field in master immediately after 0.0.12 gets shipped.
* [support/ld] Add linker support for reconfigurable heap.Marti Bolivar2011-09-121-13/+5
| | | | | | | | | | | | | | | - common_header.inc: Declare EXTERN symbols _lm_heap_start and _lm_heap_end. - common_rom.inc: Check for _lm_heap_start and _lm_heap_end. If they are defined, preserve their values. Otherwise, _lm_heap_start is starts after .bss, and _lm_heap_end is the end of SRAM. This allows existing linker scripts to continue using the old heap scheme, but allows for customizability elsewhere. - syscalls.c: Respect the addresses of _lm_heap_start and _lm_heap_end as the boundaries of the heap in _sbrk().
* syscalls.c: Bugfix _sbrk() implementation.Marti Bolivar2011-09-071-16/+31
| | | | | | | | | | | | Fix _sbrk() implementation so it properly rejects negative arguments which would send the program break below the heap start. Fix incorrect check against argument causing heap overflow. Also set errno properly to ENOMEM when the call fails. Beginning and end of the heap are now determined by HEAP_START and HEAP_END macros. Their current values seem to work OK for heaps on the internal SRAM, but they'll need to get generalized for Maple Native.
* stm32.h: Add STM32_SRAM_END.Marti Bolivar2011-09-071-0/+12
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* Update outdated stm32.h usages.Marti Bolivar2011-09-074-7/+7
| | | | | stm32.h has been updated to prefix its definitions. Update the rest of libmaple to take this into account.
* stm32.h: Remove SRAM_SIZE, prefix all #defines.Marti Bolivar2011-09-071-41/+63
| | | | | | | | | | | | | | | Remove SRAM_SIZE define. This seems like a bad idea given that bootloader builds drop user code at an offset from the SRAM start address. Prefix every #define with "STM32_" to avoid polluting the namespace. Keep and deprecate the remaining ones (except for aforementioned SRAM_SIZE), but define them to be the same as their prefixed variant. Take a little extra care to break libmaple builds which specify PCLK1 and PCLK2 instead of the prefixed versions. Some libmaple forks make use of these; they will break in mysterious ways if they don't handle this change properly.
* syscalls.c: Remove fictitious uart_send() and broken comments.Marti Bolivar2011-09-071-10/+0
| | | | | | | | | uart_send() is not part of libmaple, and nm doesn't show it getting linked in from anywhere else, so I don't believe it exists. Remove it. Also remove some commented-out sections from getch(), putch(), _write(), and fgets(). These either reference uart_send() or use old libmaple APIs which no longer exist.
* util.c: Respect stm32.h.Marti Bolivar2011-09-071-1/+1
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* usart.h: Remove unnecessary local in usart_putc().Marti Bolivar2011-08-301-2/+1
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* stm32.h: Doxygen tweaks.Marti Bolivar2011-08-301-49/+49
| | | | | | | | For some unfathomable reason, Doxygen happily believes in PCLK2, but but not PCLK1, so Breathe can't find the docs for PCLK1, and all the children are unhappy. As a workaround, move all the Doxgyen crap into __DOXYGEN_PREDEFINED_HACK sections immediately preceding the actual definitions.
* dma.c: Fix Doxygen syntax for dma_get_irq_cause().Marti Bolivar2011-08-301-2/+2
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* util.h: DoxygenMarti Bolivar2011-08-221-0/+13
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* stm32.h: DoxygenMarti Bolivar2011-08-221-20/+49
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* stm32.h: DoxygenMarti Bolivar2011-08-221-1/+31
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* scb.h: DoxygenMarti Bolivar2011-08-221-0/+1
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* nvic.h: DoxygenMarti Bolivar2011-08-221-2/+9
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* i2c.h: DoxygenMarti Bolivar2011-08-221-1/+1
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* gpio.h: DoxygenMarti Bolivar2011-08-221-11/+20
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* flash.c: DoxygenMarti Bolivar2011-08-221-1/+2
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* exti.c: Doxygen improvements.Marti Bolivar2011-08-221-3/+4
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* rcc: Doxygen improvements.Marti Bolivar2011-08-222-20/+21
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* dma.h: Doxygen improvements.Marti Bolivar2011-08-221-1/+6
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* Typos.Marti Bolivar2011-08-112-2/+2
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* exti.c: Optimize multiplexed IRQ handlers.Marti Bolivar2011-08-031-43/+48
| | | | | | | | | | | | | | Rewrite existing IRQ handlers in terms of new functions dispatch_single_exti() and dispatch_extis(). dispatch_single_exti() handles EXTIs which have a dedicated IRQ line, and thus doesn't have to check EXTI_PR; it is mostly equivalent to the (now removed) handle_exti(). dispatch_extis() handles multiple EXTIs sharing an IRQ line. Using dispatch_extis() instead of calling handle_exti() multiple times avoids unnecessary I/O to the (volatile) EXTI_BASE->PR register. These changes are in the flavor of the timer IRQ optimizations performed in f5016b15bef56bbdfd187f9b623177ef6dde7ace.
* exti.c: Cleanups.Marti Bolivar2011-08-031-5/+4
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* exti.c: Remove enable_irq() and maybe_disable_irq().Marti Bolivar2011-08-031-36/+1
| | | | | These functions incorrectly replicate functionality that is already accomplished by manipulating EXTI_IMR directly.
* exti.c: Clean up some bit-banding usages.Marti Bolivar2011-08-031-9/+9
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* exti.c: Cleanups.Marti Bolivar2011-08-031-21/+18
| | | | | Add new handle_exti() instead of calling clear_pending() and dispatch_handler() each time.
* util.h: Properly parenthesize IS_POWER_OF_TWO().Marti Bolivar2011-08-031-1/+1
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* timer.c: Minor IRQ dispatch tweaks.Marti Bolivar2011-07-211-3/+3
| | | | | | Read TIMx_SR before grabbing a pointer to the user handlers instead of after. This should shave a couple of cycles off of the time between IRQ entry and SR read.
* timer.c: Optimize IRQ dispatch routines.Marti Bolivar2011-07-201-59/+66
| | | | | | | | | | | | | | | | | Remove dispatch_irq() and dispatch_cc_irqs(). For IRQs which handle exactly one timer interrupt, add new dispatch_single_irq(). The mere fact that the IRQ has been called suffices to prove that its interrupt enable bit (in TIMx_DIER) and interrupt flag (in TIMx_SR) are set. These facts are combined in dispatch_single_irq(), which only needs to check if the timer_dev handler is non-null before calling it and clearing the SR flag. For IRQs which serve multiple timer interrupts, replace the composition of calls to dispatch_irq() and dispatch_cc_irqs() with individualized routines. These eliminate unnecessary timer register reads/writes, and, in the case of capture/compare interrupts, have a loop unrolling performed.
* timer.c: Fix dispatch_irq() and dispatch_cc_irqs().Marti Bolivar2011-07-191-24/+46
| | | | | Modify them to check whether the relevant interrupts are enabled before attempting to handle them.
* timer.c: Fix off-by-one error in NR_GEN_HANDLERS.Marti Bolivar2011-07-181-1/+1
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* stm32.h: Add license header.Marti Bolivar2011-07-181-0/+26
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