|  | Commit message (Collapse) | Author | Age | Files | Lines | 
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| | Added support for non-power-of-two ring buffers. | 
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| | capacity.  Sorted struct members by size to improve the packing. | 
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| | threads/interrupts.  Add comments. | 
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| | other externs. | 
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| | | Extend the wirish attachInterrupt() and detachInterrupt() interface to
work with all GPIOs.
Note: The STM32 external interrupt lines are multiplexed between GPIO
ports. While any GPIO can be used as an external interrupt, not all of
them can be used at the same time. Each EXTI[n] line selects between
PA[n], PB[n], PC[n], etc. For example, line EXTI5 can be used with STM32
pins PA5, PB5, or PC5, but not all at the same time. See table:
EXTI Line       Maple Pin       STM32 Pin
  0             D2              PA0
  0             D27             PB0
  0             D15             PC0
  1             D3              PA1
  1             D28             PB1
  1             D16             PC1
  2             D1              PA2
  2             D17             PC2
  2             D25             PD2
  3             D0              PA3
  3             D18             PC3
  4             D10             PA4
  4             D19             PC4
  5             D13             PA5
  5             D4              PB5
  5             D20             PC5
  6             D12             PA6
  6             D5              PB6
  6             D35             PC6
  7             D11             PA7
  7             D9              PB7
  7             D36             PC7
  8             D6              PA8
  8             D14             PB8
  8             D37             PC8
  9             D7              PA9
  9             D24             PB9
  9             D38             PC9 (BUT)
 10             D8              PA10
 10             D29             PB10
 10             D26             PC10
 11             D30             PB11
 12             D31             PB12
 13             D32             PB13
 13             D21             PC13
 14             D33             PB14
 14             D22             PC14
 15             D34             PB15
 15             D23             PC15 | 
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| | | Interrupts should be cleared by writing to the interrupt clear-enable
register (ICER). This commit fixes an improper read-modify-write on
NVIC_ICER[n] that incorrectly cleared interrupt-enable bits on
non-designated channels. | 
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| | | whoops. | 
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| | | Redirect thread-mode execution to a fail routine which throbs the LED to
indicate a hard fault. Because the fail routine runs in thread mode
with interrupts on, USB auto-reset should now work. Test by executing
some bogus instruction (e.g. *(volatile int*)0xf34fdaa = 0;) and check
that the auto-reset continues to work. | 
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| | | Tested on wishield, would like some more testing if anybody has more
things that speak spi | 
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| | | Oooooops. | 
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| | ripped out marti's SystemTick for the sake of simplicity and added a
systick_resume function to libmaple. new example program demonstrates
the functionality, also demonstrates micros()/USB bug | 
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| | also removed an old ASSERT() | 
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| | | Still not working but fixed a lot of merge errors | 
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| | | | This compiles for both maple and maple_native but is untested. | 
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| | | | Sort of ugly changes. Compiles but untested. | 
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| | | | This version throws "defined but unused" warnings which could probably
be squashed with #pragma | 
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| | | | Documented; see ./notes/fsmc.txt. Not yet integrated into .ld scripts or
fully tested | 
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| | | Fixed millis(), it was just wrong, before.
Added micros(), not extensively tested.
New implementation of delayMicroseconds(). Should be more consistent
now.
Added a handful of nvic routines to enable/disable interrupts.
Cleaned up systick | 
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| | | Save space on debug strings, performance. Perhaps we should consider
some form of user-facing assert. | 
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| | | Fixed a bug where the maximum baud rate was incorrectly set to 225000
General cleanup
Use new rcc and nvic APIs | 
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| | This is just a change of macro name with zero impact on the actual
binary. Looking at page 87/1003 of the STM reference manual, bits [0:1]
are the SW register which is modifiable by software, while [2:3] are SWS
and are set only by hardware. | 
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| | examples code cleanup, more descriptive comments, more notes | 
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| | refactored timers and added interrupt behavior. see notes and
comments...  also includes a crude vga hack that doesn't use timers. |