| Commit message (Collapse) | Author | Age | Files | Lines |
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Fixed a bug where the maximum baud rate was incorrectly set to 225000
General cleanup
Use new rcc and nvic APIs
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This is just a change of macro name with zero impact on the actual
binary. Looking at page 87/1003 of the STM reference manual, bits [0:1]
are the SW register which is modifiable by software, while [2:3] are SWS
and are set only by hardware.
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examples code cleanup, more descriptive comments, more notes
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refactored timers and added interrupt behavior. see notes and
comments... also includes a crude vga hack that doesn't use timers.
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as a temporary workaround for the fact that SerialUSB is often blocking,
this crude implementation makes the low-level C usbSendBytes function
non-blocking (with a return code of bytes sent) and implements a 2ms
timeout in the wirish write() function.
also adds begin(), end(), getDTR(), getRTS(), pending(). device is still
initialized the old fashioned way during init() so that, eg, autoreset
will work. includes a simple multi-test program.
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Major build system rewrite. New and exciting:
1. Proper dependency tracking. All source files including header files
should be properly tracked and recompiled as necessary when they are
changed.
2. Build-type tracking. If the target changes from 'ram' to 'flash,'
for example, the build system will force a rebuild rather than
incorrectly link modules to a different address.
3. New targets:
The old 'ram,' 'flash,' and 'jtag' targets have been replaced with
the environment variable MAPLE_TARGET, which controls the link address.
Users can either export it to their environment, or pass MAPLE_TARGET on
the command-line. Once this is set, sketches can be compiled with 'make
sketch,' or simply 'make.'
Note: the default is MAPLE_TARGET='flash.'
The target 'install' now automagically uploads the sketch to the board
using the appropriate method.
The 'run' target has been renamed to 'debug.' It starts an openocd gdb
server.
4. Odds and ends:
-Verbose and 'quiet' modes. Set V=1 for verbose compilation, the default
is quiet.
-Object file sizes and disassembly information is generated and placed
in build/$(BOARD).sizes and build/$(BOARD).disas, respectively.
-Parallel make with -j should speed things up if you have multiple
cores.
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connection
flip flopped back and forth on how much work should be done here. For now its like 5 lines of changes
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minor
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fixed some blocking issue on serial tx, improperly checking for connection.
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current version gets stuck in the isr somewhere. not sure why or where. must debug.
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now we reset from recv bytes. After receiving the DTR/RTS toggle the next byte in from usb is parsed as the program_delay. For now, this just delays the reset for a period to close the serial port gracefully. Later, this delay will perhaps inform the bootloader of how long to live for...
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It wasnt used, and was causing a compiler warning to get thrown. It isnt needed, not sure why I added it in the first place
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aj wrote this and had comments saying fix this wouldn't work, but
it seems to...
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-updated examples
-removed HardwareUSB
-cleaned up a handful of includes
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Removed dependency on libcs3.a because Codesourcery does not provide the
source for it.
We now link against a modified libcs3-lanchon-stm32.a built from parts
in public domain from Lanchon, and a start_c.c from Codesourcery that is
licensed under a permissive license.
Also removed all of the extra linker cruft from the stm32conf directory.
The linker files now live in support/ld
The openocd scripts now live in support/openocd
The udev rules and copy-to-ide scripts now live in support/scripts
The source lives in support/ld/libcs3-lanchon-stm32.tar.gz
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windows driver
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port now 1eaf:0004) and fixed a bug in reset.py,
added a no-delay usb serial loop to main.cpp as an example. has no problem at 115200 in minicom!
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uintx
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also, removed some old usb file, bootVect.h, which setup the static table for the runtime usb lib that no longer exists and was provided by the bootloader rev 1
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dependent on st for low level access, the entire usb
stack lives in the core application level (not in libmaple). the next project should be to include some low level usb stack in
the libmaple
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Fixed nvic.c warning
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-Read DR after each master send, return the response.
-Added a send function to allow you to pass buffers to the SPI peripheral instead of goin a byte at a time.
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The 'core' directory has now been renamed to 'wirish.' Wirish is our
version of the Arduino Wiring language.
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Squashed commit of the following:
commit b41eb846ca60559cff242d0c550699eb8f309909
Author: Perry Hung <iperry@alum.mit.edu>
Date: Sat Apr 24 04:09:16 2010 -0400
Turn the other peripherals back on. Not extensively tested for
interactions between peripherals.
commit bf4fc3bf6bc02342ae508b52fb4515d361d626f6
Author: Perry Hung <iperry@alum.mit.edu>
Date: Sat Apr 24 03:16:35 2010 -0400
Upper level libmaple interface
Added a C++ HardwareSPI class to access the SPI interface. See
HardwareSPI.cpp and HardwareSPI.h for documentation.
commit 17e0e5edde60e9bf2aa4d52173ad7d47d6d6da75
Author: Perry Hung <iperry@alum.mit.edu>
Date: Thu Apr 22 02:36:01 2010 -0400
Initial SPI Polling implementation.
Initial commit of a polling-based SPI driver. The driver is limited to
synchronous, blocking sends and a 8-bit data frame format. Tested on
SPI1 and SPI2.
Other peripherals are temporarily disabled, and the rx function
is untested until I find a good peripheral to test everything on.
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stm32f10x_conf.h
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Relicensed the bulk of libmaple under the more permissive MIT License,
from GPLv3. Files that were largely or entirely derived from
the Arduino, STM, or Lanchon retain their original licenses.
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Removed inttypes.h from libmaple. Will have another pass through to use
the standard libmaple types, but will come in another commit.
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Updated usb subsystem to use libmaple types, removed STM32 peripheral
library from the Makefile
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At this point, there shouldn't be any STM code being compiled and linked
against. There are still a bunch of STM header includes, though.
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Conflicts:
Makefile
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copy-to-ide and Makefile updated to conform; .gitignore added;
LICENSE added
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