| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: Michael Hope <michaelh@juju.net.nz>
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Rename HEAP_START/HEAP_END macros CONFIG_HEAP_START/CONFIG_HEAP_END,
to mark them as build-time configuration options. Wrap their
definitions with #ifndefs appropriately.
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nzmichaelh rightly argues that actual RX buffers should be
heap-allocated, to avoid wastage for unused devices. Deprecate the
field for 0.0.12, since that's coming out soon. This will let us get
rid of this field in master immediately after 0.0.12 gets shipped.
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- common_header.inc: Declare EXTERN symbols _lm_heap_start and
_lm_heap_end.
- common_rom.inc: Check for _lm_heap_start and _lm_heap_end. If they
are defined, preserve their values. Otherwise, _lm_heap_start is
starts after .bss, and _lm_heap_end is the end of SRAM.
This allows existing linker scripts to continue using the old heap
scheme, but allows for customizability elsewhere.
- syscalls.c: Respect the addresses of _lm_heap_start and _lm_heap_end
as the boundaries of the heap in _sbrk().
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Fix _sbrk() implementation so it properly rejects negative arguments
which would send the program break below the heap start. Fix
incorrect check against argument causing heap overflow. Also set
errno properly to ENOMEM when the call fails.
Beginning and end of the heap are now determined by HEAP_START and
HEAP_END macros. Their current values seem to work OK for heaps on
the internal SRAM, but they'll need to get generalized for Maple
Native.
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stm32.h has been updated to prefix its definitions. Update the rest
of libmaple to take this into account.
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Remove SRAM_SIZE define. This seems like a bad idea given that
bootloader builds drop user code at an offset from the SRAM start
address.
Prefix every #define with "STM32_" to avoid polluting the namespace.
Keep and deprecate the remaining ones (except for aforementioned
SRAM_SIZE), but define them to be the same as their prefixed variant.
Take a little extra care to break libmaple builds which specify PCLK1
and PCLK2 instead of the prefixed versions. Some libmaple forks make
use of these; they will break in mysterious ways if they don't handle
this change properly.
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uart_send() is not part of libmaple, and nm doesn't show it getting
linked in from anywhere else, so I don't believe it exists. Remove it.
Also remove some commented-out sections from getch(), putch(),
_write(), and fgets(). These either reference uart_send() or use old
libmaple APIs which no longer exist.
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For some unfathomable reason, Doxygen happily believes in PCLK2, but
but not PCLK1, so Breathe can't find the docs for PCLK1, and all the
children are unhappy. As a workaround, move all the Doxgyen crap into
__DOXYGEN_PREDEFINED_HACK sections immediately preceding the actual
definitions.
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Rewrite existing IRQ handlers in terms of new functions
dispatch_single_exti() and dispatch_extis(). dispatch_single_exti()
handles EXTIs which have a dedicated IRQ line, and thus doesn't have
to check EXTI_PR; it is mostly equivalent to the (now removed)
handle_exti(). dispatch_extis() handles multiple EXTIs sharing an IRQ
line. Using dispatch_extis() instead of calling handle_exti()
multiple times avoids unnecessary I/O to the (volatile) EXTI_BASE->PR
register.
These changes are in the flavor of the timer IRQ optimizations
performed in f5016b15bef56bbdfd187f9b623177ef6dde7ace.
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These functions incorrectly replicate functionality that is already
accomplished by manipulating EXTI_IMR directly.
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Add new handle_exti() instead of calling clear_pending() and
dispatch_handler() each time.
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Read TIMx_SR before grabbing a pointer to the user handlers instead of
after. This should shave a couple of cycles off of the time between
IRQ entry and SR read.
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Remove dispatch_irq() and dispatch_cc_irqs().
For IRQs which handle exactly one timer interrupt, add new
dispatch_single_irq(). The mere fact that the IRQ has been called
suffices to prove that its interrupt enable bit (in TIMx_DIER) and
interrupt flag (in TIMx_SR) are set. These facts are combined in
dispatch_single_irq(), which only needs to check if the timer_dev
handler is non-null before calling it and clearing the SR flag.
For IRQs which serve multiple timer interrupts, replace the
composition of calls to dispatch_irq() and dispatch_cc_irqs() with
individualized routines. These eliminate unnecessary timer register
reads/writes, and, in the case of capture/compare interrupts, have a
loop unrolling performed.
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Modify them to check whether the relevant interrupts are enabled
before attempting to handle them.
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The delay_us() implementation multiplies its specified delay target by
a fixed constant in order to turn it into a busy-loop. This magic
number doesn't work properly when the clock configuration isn't the
same as a stock LeafLabs board. Add DELAY_US_MULT to the MCU-specific
configuration in stm32.h in order to allow other chips to use delay_us().
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bug prevented consecutive SerialUSB.read() calls from returning consecutive bytes
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Thanks to x893 for the suggestion.
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Don't modify the core FreeRTOS code; only change source that's
specific to libmaple.
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example blinky.
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libmaple/dma.c defines DMA interrupts __irq_dma_channel[1-7],
consistent with what is specified by support/ld/names.inc. However,
names.inc is inconsistent with what support/ld/libcs3_stm32_src/
expects. Specifically, it contradicts the files
- support/ld/libcs3_stm32_src/stm32_isrs.S
- support/ld/libcs3_stm32_src/stm32_vector_table.S
Which use the names __irq_dma1_channel[1-7].
Change names.inc and dma.c to use the correct IRQ names.
The original names.inc/libcs3_stm32_src inconsistency was introduced
in 43d6921658cd29b8022af4424d340a90fbcb9a7f, but dma.c had the correct
names until ec3cf2903f4b03bc1dae5e159495c9e5ef0938ca, where they were
renamed for consistency with names.inc. At that point, DMA interrupts
stopped working. (This was documented in the commit message).
Thanks to forum user robodude666 for tracking this down.
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Thanks to gbulmer for the clarifying remarks.
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Put the PCLK1 and PCLK2 within #ifndef guards. This assumption is
biased towards LeafLabs boards.
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