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* RCC: Add new mechanism for configuring the main PLL.Marti Bolivar2012-04-112-22/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new style for configuring the PLL is to initialize a (series-specific) struct rcc_pll_cfg, and pass a pointer to it to rcc_configure_pll(). After that's done, you can use rcc_turn_on_clk(RCC_CLK_PLL) to turn on the main PLL, and busy-wait until rcc_is_clk_ready(RCC_CLK_PLL) is true to make sure the new configuration took effect. - libmaple/rcc.h: -- Add struct rcc_pll_cfg, which specifies a PLL configuration. This specifies a PLL source and a void pointer to series-specific PLL configuration data. -- Add rcc_configure_pll(), which takes a pointer to struct rcc_pll_cfg, and configures the main PLL. It's up to each series to define this function. - stm32f1/rcc.h: Add struct stm32f1_rcc_pll_data, to store F1-specific PLL configuration state. - stm32f1/rcc.c: Add an implementation for rcc_configure_pll(). - stm32f2/rcc.h: Add struct stm32f2_rcc_pll_data, to store F2-specific PLL configuration data. - stm32f2/rcc.c: Add an implementation for rcc_configure_pll(). Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* RCC: Clean up and sanitize interfaces across F1, F2 series.Marti Bolivar2012-04-112-11/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Additions: - rcc_switch_sysclk(): For changing the clock used as SYSCLK's source. - enum rcc_clk: One for each system and secondary clock source (e.g. HSE, LSE). These are defined on a per-series basis in each of the <series/rcc.h>. - rcc_turn_on_clk(), rcc_turn_off_clk(), rcc_is_clk_ready(): For turning on system and secondary clock sources, and checking whether or not they're ready. Uses enum rcc_clk. Removals: - rcc_clk_init(): There's no way to port this to F2. Move it to the F1 header. This also means we can remove the empty implementation and enum rcc_pll_multiplier from the F2 RCC header, where it doesn't make any sense. Also fix up some includes, and rewrite rcc_clk_init() in terms of the new clock source management functions. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Clean up Flash interface; add flash_enable_features().Marti Bolivar2012-04-113-40/+7
| | | | | | | | | | | | | | | | Make a single function, flash_enable_features(), to control the access characteristics of Flash memory (i.e. to write to the non-latency bits of ACR). In so doing, make everybody pretend to allow instruction and data caching. On STM32F1, trying to turn these on simply has no effect. This allows unconditionally trying to turn them on, which will simplify users' lives. This has the ancillary benefit of making the stm32f2- and stm32f1-specific flash.c files unnecessary; delete these. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* STM32F2 Flash support.Marti Bolivar2012-04-113-0/+236
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* stm32f2/stm32.h: Add support for STM32F207IG.Marti Bolivar2012-04-111-1/+1
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Initial STM32F2 series/stm32.h.Marti Bolivar2012-04-111-0/+83
| | | | | | This still has some FIXMEs, but it's enough to get going. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Initial STM32F2 GPIO support.Marti Bolivar2012-04-113-0/+380
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Initial STM32F2 RCC support.Marti Bolivar2012-04-113-1/+1088
| | | | | | Largely untested. Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* STM32F2 NVIC support.Marti Bolivar2012-04-111-0/+156
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* STM32F2: Add vector table and weak ISR definitions.Marti Bolivar2012-04-113-1/+458
| | | | Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
* Add skeleton libmaple/stm32f2/rules.mk.Marti Bolivar2012-04-111-0/+29
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>