| Commit message (Collapse) | Author | Age | Files | Lines |
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We can implement it in terms of _i2c_bus_clk() instead of hard-coding
STM32_PCLK1.
This might be overkill, since I2C peripherals are slow and thus likely
to be on APB1 for all STM32 devices (that is the case for F2/F4, for
instance), but if we're going to have _i2c_bus_clk(), we might as well
respect it.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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This won't work on F2, which at times has SDA and SCL on different
ports (e.g. I2C3 SDA on PC9, SCL on PA8). Add .sda_port and .scl_port
replacements, which are used when the now-deprecated .gpio_port is
null. Use them correctly everywhere, with some new i2c_private.h
helper functionality.
Sigh. The F1 I2C code tries too hard to guess what you wanted; it's
not porting well at all.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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This should help avoid surprising some users.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Do this via new private _i2c_set_ccr_trise().
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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This is ad-hoc and nonportable. If you really want I2C mapped
elsewhere, then mess with the I2C device fields and call afio_remap()
yourself. (This is also cleaner for F2).
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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The IRQ priority hack is unnecessary on targets with properly
functioning I2C IRQ handlers, so we shouldn't use it unless we have
to. Add a mechanism so a series header can provide such a hack if
necessary. Have the F1 series header use this mechanism.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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These are necessary to pull out some calls to gpio_set_mode().
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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i2c_set_input_clk()'s documentation says that the maximum peripheral
clock frequency is 36 MHz, but that's a hard-coded magic number. The
actual limit is the device's APB frequency or 46 MHz, whichever is
lower (F2 and F4 share the 46 MHz limit).
Fix the documentation to reflect that fact, and add an internal
series-provided function to get the maximum clock frequency for a
device. To help users porting to F2, have i2c_set_input_clk()
assert-check that the provided frequency is less than that maximum
value and the hard 46 MHz limit.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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This is necessary to add series-specific infrastructure to clean up
some F1-isms in <libmaple/i2c.h>'s inline functions.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Bring back <libmaple/i2c.h> support on STM32F1 with a view towards how
it'll be implemented on STM32F2. There are still many F1-isms in
libmaple/i2c.c and <libmaple/i2c.h>, to be dealt with subsequently.
Move device declarations and base pointer definitions to a new F1
<series/i2c.h>. The register maps and bit definitions themselves are
identical on both series, so leave them in the libmaple header.
Add i2c_private.h, which contains:
- I2C_DEV(), a convenience macro for defining an i2c_dev, and
- declarations for the event and error IRQ handlers.
The IRQ handlers are large, and I2C is slow anyway, so I see no reason
to make them inline in the private header (as we do for some other
peripherals). We just expose the existing ones that were formerly
static in libmaple/i2c.c, but prefix the names with underscore.
Move the device declarations and IRQ handlers into new
stm32f1/i2c.c. These use the i2c_private.h API.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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To prepare for STM32F2/F4 DMA support, introduce a new libmaple DMA
API, and move some code around to make priority level and interrupt
handling more generic.
The new API is based on a new set of types (dma_tube, struct
dma_tube_reg_map, enum dma_request_src, enum dma_cfg_flags, and struct
dma_tube_config).
The central abstraction is the dma_tube type. STM32F2/F4 use DMA
streams to control dataflow, and STM32F1 uses channels. dma_tube
stands for whichever is appropriate for the current target. Dealing
with tubes allows for configuring and using DMA with opaque tube
values in the same source, instead of (as with ST's firmware)
requiring two separate codebases.
The new API is also more user-friendly, as it doesn't require knowing
which DMA address registers to set and which configuration register
flags go along with them. It now suffices to specify the source and
destination for the DMA transfer, along with their sizes. This avoids
confusion (e.g. for memory-to-memory transfers, data flows from the
peripheral address register to the memory register, which might be
surprising on F2, which has two memory address registers).
The old API (based on enum dma_mode_flags and dma_setup_transfer()) is
still available on F1, but deprecate it.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Add a spi_private.h with a SPI_DEV(), for convenience. Use it in the
F1 and F2 implementations. We could probably unify these with an
STM32_HAVE_SPI(n) macro, but we'll leave that for the future.
Most everything from F1 is portable; F2 has some additional bit
definitions and a spi_get_af() routine, but that's about it.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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The addition of STM32_HAVE_TIMER() allows us to avoid some
repetition. There's still an issue with names on F1 preventing us from
moving the IRQ handlers to libmaple/timer.c, but once that's resolved,
we'll be able to remove even more.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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The current versions of DELARE_*_TIMER() don't play well with cscope,
which is a bad sign. Fix that.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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It's not important whether the MCU is specified. What's important is
that <libmaple/stm32.h> gets everything it needs -- which it now
ensures that it does. Requiring people to do things on a per-MCU basis
hurts hackability and is just asking for trouble.
On the other hand, it's nice to provide a clue as to why
<libmaple/stm32.h> might be giving #errors, so do leave the
warnings. People can always hack the header to shut them up if they
want.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Minor variations on F2: DMA underrun interrupts, and a status register
to hold the notification bits.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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I'm sure we can work the compatible subset of F1/F2 GPIO functionality
into the F1 gpio.h interface in a clean way. This is not that clean
way, but I'm short on time.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Add series headers to keep the base pointers, and (on F2) use SYSCFG
to tell exti_do_select() where the EXTI control registers are. No
surprises.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Those ugly Doxygen comments have been bothering me since forever. Fix
them up and throw some M-x align around.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Tested on Maple Mini with examples/mini-exti-test. Changes to Wirish
are minor: use the new EXTI types exti_num and exti_cfg (see below) in
place of now-deprecated variants in ext_interrupts.cpp.
The way I originally did libmaple/exti.h was stupid, and fixing it
turned out to be a little disruptive.
libmaple/exti.h depends on libmaple/gpio.h (for AFIO), but that's a
classic case of exposed implementation detail. So invert the
dependency: make gpio.h depend on exti.h. Do this by adding exti_num
and exti_cfg to exti.h; these respectively replace afio_exti_num and
afio_exti_port. The afio_* variants are now deprecated. (Throw in a
typedef and some macros at the bottom of the F1 series/gpio.h for
backwards compatibility).
Make exti_attach_interrupt() and exti_detach_interrupt() take
exti_num/exti_cfg arguments instead of the afio_* variants.
Make the EXTI dispatch routines __always_inline to defeat GCC -Os.
Many renames throughout libmaple/stm32f1/ to stop using the deprecated
names. Also move the previously F1-only gpio_exti_port() function into
the public libmaple header. Reimplementing it in terms of rcc_clk_ids
lets us deprecate the gpio_dev->exti_port field, which will save space
in the future.
While we're there, I notice that struct gpio_dev is defined once per
series. That's dumb, as it misses the entire point of having device
structs: they contain what's portable. So put the F1 version (which
has the extra EXTI port field) into libmaple/gpio.h, and add the
necessary exti_ports to libmaple/stm32f2/gpio.c. Sigh. We'll get rid
of it eventually, at least.
Clean up some other mistakes in gpio.h files as well (mostly removing
util.h dependency). Sorry for the messy commit.
For portability, add a new series-specific exti function,
exti_select(). The F1 version in (new) libmaple/stm32f1/exti.c uses
AFIO and some new private functionality in libmaple/exti.c and (new)
libmaple/exti_private.h to make this convenient. We'll be able to do
the SYSCFG equivalent on F2 without any trouble.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Now libmaple/stm32f1/rules.mk tries to pull in ISRs and a vector table
on a per-line basis. Move isrs_performance.S and
vector_table_performance.S to (new) libmaple/stm32f1/performance, and
rename them.
Add corresponding files for value line under (new)
libmaple/stm32f1/value. This helps clean up some
performance-line-isms, and allows implementing e.g. the CEC interrupt,
which is used by something else on performance line.
Untested (I don't have access to a value line MCU); hopefully this
works.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Stupidly, spi_gpio_cfg() didn't take a spi_dev* argument on F1,
because it doesn't matter there. On F2, where we need to set an
alternate function when configuring GPIOs for SPI, we need to know the
dev.
We can't add break backwards compatibility, so we need a new
function. However, we've since added a bunch of foo_gpio_cfg()
routines, and we don't want confusing asymmetry in the names. So a
global style change is needed. (Fortunately, the new functions weren't
part of a release, so it's no problem to change their names).
Change all foo_gpio_cfg() routines to foo_config_gpios() (or
foo_config_gpio(), if there's only one GPIO to configure). For
backwards compatibility, make spi_gpio_cfg() on F1 an __always_inline
call to spi_config_gpios().
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Only semi-alphabetically because peripherals are kept together (so the
UARTs sort as if they were USARTs). Advantages:
- It lets us play numeric comparison and lookup-table hacks, as we now
have the property that the rcc_clk_ids for a given peripheral are a
contiguous range of integers.
- It will hopefully let the compiler emit faster/smaller code for
switches over a dev->clk_id.
- It's better intuitively.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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That was dumb.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Feature-test macros for dealing with the fact that timer support has
holes. STM32_TIMER_MASK is a bitmask where bit n is set when TIMERn is
present. STM32_HAVE_TIMER(n) just tests whether bit n is set in
STM32_TIMER_MASK.
This is necessary because e.g. the STM32F100RB has timers 1-4, 6, 7,
and 15-17. Because of this, the usual STM32_NR_whatever won't work,
and we use a bitmask instead.
For F1 performance line (F103s), STM32_TIMER_MASK can be derived from
the density. For F1 value line, I'm not as sure, so just add it for
the single MCU we support (the STM32F100RB). Same story for F2: add it
for the STM32F207IC. We can fix this up later if necessary.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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The current implementation only disables the first 64 IRQ lines. This
covers all the chips we currently support, but it'll be a nasty
surprise if anyone decides to add e.g. connectivity line MCUs (which
have more IRQs) in the future. We already have the infrastructure to
fix it in a clean way, so we might as well do it now.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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This is a workaround for Breathe.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Having a separate struct is stupid.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Various changes to Doxygen structure, to help leaflabs-docs make sense
of everything.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Switch from BIT(...) to (1U << ...).
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Document FLASH_BASE once. This is due to restrictions in the
documentation build system.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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avr-gcc does it this way. Seems ok to me.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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This will let help us verify that we got the right thing when we pull
it out of of Doxygen XML for the official HTML documentation.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Fix @file in many places. Also fix up the descriptions where it's
appropriate. This standardizes the @file formatting across the library
to explicitly include any parent directories up to the repository
root.
Besides being nice, this will hopefully let us manage Doxygen's XML
output so as to make extracting series-specific pieces via Breathe in
the leaflabs-docs repo possible.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Change the values of the STM32_F1_LINE_xxx macros to match the part
number better (so performance line, or F103s, now have
STM32_F1_LINE_PERFORMANCE==3, F100s have STM32_F1_LINE_VALUE==0,
etc.). This will hopefully make debugging or error checking easier for
someone at some point.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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There are five F1 lines in total. The necessary infrastructure for USB
access line (STM32F102 MCUs) support is missing, so add it.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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We've got some value line values now.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
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