| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| ... | |
| |
|
|
|
|
|
|
|
|
| |
Whether or not a given peripheral is present on an F1 series MCU
doesn't matter. It doesn't take up any extra space to include these
enumerators, and it's convenient to have them defined so portable
libmaple routines can safely refer to them. This can prevent the need
for special series-specific versions of some functions.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
This function has been with us from the earliest days of libmaple.
It's showing its age, as the API it presents is tied to the
STM32F1. Deprecate it, and provide instructions for how to use newer,
more portable APIs. The new way is more verbose, but we can always add
a portable "just set up the PLL, dammit" convenience function later (a
nice candidate is to extract an interface from setup_clocks() in
boards.cpp).
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
| |
Standard refactoring: add series headers for F1 and F2, along with
series adc.c files. There are some issues relating to adc_extsel_event
to hammer out later, but this will do for now.
We also add some new portability interfaces to libmaple/adc.h in order
for Wirish to use the same code to initialize the ADCs at init() time.
As usual, F1 is untested.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
| |
Just add the missing register bit definitions in new series headers.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
| |
This is a feature test macro for the flexible static memory
controller (FSMC) peripheral.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
FIXME:
- Test F1 support
- Solve problem of duplicated bytes being TXed unless delay is
inserted after configuration but before first bytes are TXed.
Rip out nonportable bits from top-level interfaces. The USART register
maps are basically the same between F1 and F2, so leave these, but add
register bit definitions which had name changes to the libmaple header
to avoid needless repetition. There are also a few new bits in the F2
USART registers; add definitions for these in the F2 USART header. Add
Doxygen comments for all USART bit definitions.
Deprecate struct usart_dev's max_baud field. This is just bloat that
doesn't bring us much real benefit.
Add new series-specific USART files for F1 and F2:
- libmaple/stm32f[1,2]/usart.c
- libmaple/stm32f[1,2]/include/series/usart.h
These are standard series-specific files, providing register map base
pointers, defining devices, implementing nonportable routines, etc.
We need a portable way to configure the USART GPIOs. To this end, add
usart_async_gpio_cfg() to the top-level USART interface. This function
is implemented in new F1 and F2 USART backends to take the appropriate
action to configure the RX and TX pins for asynchronous full duplex
mode.
USART baud rate calculation is done differently on the different
series. Keep the usart_set_baud_rate() declaration in the top-level
USART header, but move the implementations into the series-specific
usart.c files.
In usart_set_baud_rate(), allow for deriving clock_speed automatically
by letting user tell us to figure out the peripheral clock speed by
mapping the device's rcc_clk_id onto an STM32_PCLK[1,2] value. This
preserves flexibility for users with non-default clock configurations,
but makes things easier on everyone else.
Add private USART files for portable private USART routines:
- libmaple/usart_private.h
- libmaple/usart_private.c
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The new style for configuring the PLL is to initialize
a (series-specific) struct rcc_pll_cfg, and pass a pointer to it to
rcc_configure_pll(). After that's done, you can use
rcc_turn_on_clk(RCC_CLK_PLL) to turn on the main PLL, and busy-wait
until rcc_is_clk_ready(RCC_CLK_PLL) is true to make sure the new
configuration took effect.
- libmaple/rcc.h:
-- Add struct rcc_pll_cfg, which specifies a PLL configuration. This
specifies a PLL source and a void pointer to series-specific PLL
configuration data.
-- Add rcc_configure_pll(), which takes a pointer to struct
rcc_pll_cfg, and configures the main PLL. It's up to each series
to define this function.
- stm32f1/rcc.h: Add struct stm32f1_rcc_pll_data, to store F1-specific
PLL configuration state.
- stm32f1/rcc.c: Add an implementation for rcc_configure_pll().
- stm32f2/rcc.h: Add struct stm32f2_rcc_pll_data, to store F2-specific
PLL configuration data.
- stm32f2/rcc.c: Add an implementation for rcc_configure_pll().
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
| |
We're going to replace this with a more portable mechanism.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Additions:
- rcc_switch_sysclk():
For changing the clock used as SYSCLK's source.
- enum rcc_clk:
One for each system and secondary clock source (e.g. HSE,
LSE). These are defined on a per-series basis in each of the
<series/rcc.h>.
- rcc_turn_on_clk(),
rcc_turn_off_clk(),
rcc_is_clk_ready():
For turning on system and secondary clock sources, and checking
whether or not they're ready. Uses enum rcc_clk.
Removals:
- rcc_clk_init(): There's no way to port this to F2. Move it to the F1
header. This also means we can remove the empty implementation and
enum rcc_pll_multiplier from the F2 RCC header, where it doesn't
make any sense.
Also fix up some includes, and rewrite rcc_clk_init() in terms of the
new clock source management functions.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Make a single function, flash_enable_features(), to control the access
characteristics of Flash memory (i.e. to write to the non-latency bits
of ACR).
In so doing, make everybody pretend to allow instruction and data
caching. On STM32F1, trying to turn these on simply has no
effect. This allows unconditionally trying to turn them on, which will
simplify users' lives.
This has the ancillary benefit of making the stm32f2- and
stm32f1-specific flash.c files unnecessary; delete these.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
| |
enum stm32_series gives a tag to each STM32 series, including the ones
we don't yet support.
STM32_MCU_SERIES is a define which the series stm32.h header must
provide, identifying the series of the MCU being targeted.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This is for greater consistency with the ST application notes, which
refer to migrating "across" series (e.g. F1 to F2), but compatibility
"within" a family (e.g. F1).
So:
- Move libmaple/stm32x/include/family to .../include/series/ and fix
up includes appropriately.
- Refer to "family" headers as "series" headers in comments.
- Make similar "find and replace"-style changes to build system
variable names and comments.
- Move support/ld/stm32/family to .../stm32/series.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
| |
This is the smallest wait state value that is safe for use when the
MCU is at its fastest rate, not considering overclocking. This
requires moving the FLASH_WAIT_STATE defines above the family include,
so do that, and add the missing #defines (for wait states up to 7).
For the STM32F1, the correct value for FLASH_SAFE_WAIT_STATES is
FLASH_WAIT_STATE_2; say so in the F1-family flash.h.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
| |
These go in a new family header, libmaple/stm32f1/include/family/stm32.h.
While we're at it, do some reorganizing.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Make a new family header, libmaple/stm32f1/include/family/gpio.h, and
supporting libmaple/stm32f1/gpio.c.
Beyond registers and devices, these also include anything mentioning
AFIO, which doesn't exist on F2.
Update libmaple/stm32f1/rules.mk for new gpio.c.
Alter gpio_write_bit() to use dev->regs->BSRR only. BRRs are not
present on STM32F2.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
| |
Backwards-compatible. Only the headers need to change.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
| |
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This is a backwards-compatible change.
The Flash registers on the STM32F2 line are different than on
STM32F1. Therefore, move the register map and bit definitions to new
libmaple/stm32f1/include/family/flash.h.
Move flash_enable_prefetch() from libmaple/flash.c to new
libmaple/stm32f1/flash.c. The remaining pieces of libmaple/flash.c use
a common subset of the Flash registers, so they're's portable to F2,
and that's all we're currently interested in.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
|
|
This is a backwards-compatible change.
Modify libmaple/rules.mk to include the family's include
directory. This allows libmaple/include/libmaple/rcc.h to include the
STM32F1 RCC header with #include <family/rcc.h>. We'll use this
convention henceforth to distinguish between top-level and
family-specific headers.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
|
