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-rw-r--r--wirish/boards.h154
-rw-r--r--wirish/ext_interrupts.c27
-rw-r--r--wirish/io.h51
-rw-r--r--wirish/pwm.c4
-rw-r--r--wirish/wirish.c8
-rw-r--r--wirish/wirish.h4
-rw-r--r--wirish/wirish_analog.c2
-rw-r--r--wirish/wirish_digital.c68
8 files changed, 165 insertions, 153 deletions
diff --git a/wirish/boards.h b/wirish/boards.h
new file mode 100644
index 0000000..6e24c51
--- /dev/null
+++ b/wirish/boards.h
@@ -0,0 +1,154 @@
+/* *****************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 Bryan Newbold.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ * ****************************************************************************/
+
+// This file contains BOARD-specific pin mapping tables. To add a new board
+// type, copy the "BOARD_maple" section below and edit it as needed, then
+// update your build toolchain with a new "BOARD" type. This must match the
+// seperate MCU type (which determines the ../libmaple configuration).
+
+#ifndef _BOARDS_H_
+#define _BOARDS_H_
+
+#include "libmaple.h"
+#include "gpio.h"
+#include "timers.h"
+#include "exti.h"
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+// Set of all possible digital pin names
+enum {
+ D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15, D16,
+ D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30, D31,
+ D32, D33, D34, D35, D36, D37, D38, D39,
+ // Maple Native only:
+ D40, D41, D42, D43, D44, D45, D46, D47, D48, D49, D50, D51, D52, D53, D54,
+ D55, D56, D57, D58, D59, D60, D61, D62, D63, D64, D65, D66, D67, D68, D69,
+ D70, D71, D72, D73, D74, D75, D76, D77, D78, D79, D80, D81, D82, D83, D84,
+ D85, D86, D87, D88, D89, D90, D91, D92, D93, D94, D95, D96, D97, D98, D99,
+ D100, D101, D102, D103, D104, D105, D106, D107, D108, D109, D110, D111,
+};
+
+// Set of all possible analog pin names
+enum {
+ ADC0, ADC1, ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, ADC10, ADC11,
+ ADC12, ADC13, ADC14, ADC15, ADC16,
+ // Maple Native only:
+ ADC17, ADC18, ADC19, ADC20,
+};
+
+#define ADC_INVALID 0xFFFFFFFF
+#define TIMER_INVALID (TimerCCR)0xFFFFFFFF
+
+// Types used for the tables below
+typedef struct PinMapping {
+ GPIO_Port *port;
+ uint32 pin;
+ uint32 adc;
+ TimerCCR timer_channel;
+} PinMapping;
+
+typedef struct ExtiInfo {
+ uint8 channel;
+ uint8 port;
+} ExtiInfo;
+
+// LeafLabs Maple rev3, rev4
+#ifdef BOARD_maple
+
+ static PinMapping PIN_MAP[NR_GPIO_PINS] = {
+ {GPIOA_BASE, 3, ADC3, TIMER2_CH4_CCR}, // D0/PA3
+ {GPIOA_BASE, 2, ADC2, TIMER2_CH3_CCR}, // D1/PA2
+ {GPIOA_BASE, 0, ADC0, TIMER2_CH1_CCR}, // D2/PA0
+ {GPIOA_BASE, 1, ADC1, TIMER2_CH2_CCR}, // D3/PA1
+ {GPIOB_BASE, 5, ADC_INVALID, TIMER_INVALID}, // D4/PB5
+ {GPIOB_BASE, 6, ADC_INVALID, TIMER4_CH1_CCR}, // D5/PB6
+ {GPIOA_BASE, 8, ADC_INVALID, TIMER1_CH1_CCR}, // D6/PA8
+ {GPIOA_BASE, 9, ADC_INVALID, TIMER1_CH2_CCR}, // D7/PA9
+ {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR}, // D8/PA10
+ {GPIOB_BASE, 7, ADC_INVALID, TIMER4_CH2_CCR}, // D9/PB7
+ {GPIOA_BASE, 4, ADC4, TIMER_INVALID}, // D10/PA4
+ {GPIOA_BASE, 7, ADC7, TIMER3_CH2_CCR}, // D11/PA7
+ {GPIOA_BASE, 6, ADC6, TIMER3_CH1_CCR}, // D12/PA6
+ {GPIOA_BASE, 5, ADC5, TIMER_INVALID}, // D13/PA5
+ {GPIOB_BASE, 8, ADC_INVALID, TIMER4_CH3_CCR}, // D14/PB8
+ /* Little header */
+ {GPIOC_BASE, 0, ADC10, TIMER_INVALID}, // D15/PC0
+ {GPIOC_BASE, 1, ADC11, TIMER_INVALID}, // D16/PC1
+ {GPIOC_BASE, 2, ADC12, TIMER_INVALID}, // D17/PC2
+ {GPIOC_BASE, 3, ADC13, TIMER_INVALID}, // D18/PC3
+ {GPIOC_BASE, 4, ADC14, TIMER_INVALID}, // D19/PC4
+ {GPIOC_BASE, 5, ADC15, TIMER_INVALID}, // D20/PC5
+ /* External header */
+ {GPIOC_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D21/PC13
+ {GPIOC_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D22/PC14
+ {GPIOC_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D23/PC15
+ {GPIOB_BASE, 9, ADC_INVALID, TIMER4_CH4_CCR}, // D24/PB9
+ {GPIOD_BASE, 2, ADC_INVALID, TIMER_INVALID}, // D25/PD2
+ {GPIOC_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D26/PC10
+ {GPIOB_BASE, 0, ADC8, TIMER3_CH3_CCR}, // D27/PB0
+ {GPIOB_BASE, 1, ADC9, TIMER3_CH4_CCR}, // D28/PB1
+ {GPIOB_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D29/PB10
+ {GPIOB_BASE, 11, ADC_INVALID, TIMER_INVALID}, // D30/PB11
+ {GPIOB_BASE, 12, ADC_INVALID, TIMER_INVALID}, // D31/PB12
+ {GPIOB_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D32/PB13
+ {GPIOB_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D33/PB14
+ {GPIOB_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D34/PB15
+ {GPIOC_BASE, 6, ADC_INVALID, TIMER_INVALID}, // D35/PC6
+ {GPIOC_BASE, 7, ADC_INVALID, TIMER_INVALID}, // D36/PC7
+ {GPIOC_BASE, 8, ADC_INVALID, TIMER_INVALID}, // D37/PC8
+ {GPIOC_BASE, 9, ADC_INVALID, TIMER_INVALID} // D38/PC9 (BUT)
+ };
+
+ static ExtiInfo PIN_TO_EXTI_CHANNEL[NR_GPIO_PINS] = {
+ {EXTI3, EXTI_CONFIG_PORTA}, // D0/PA3
+ {EXTI2, EXTI_CONFIG_PORTA}, // D1/PA2
+ {EXTI0, EXTI_CONFIG_PORTA}, // D2/PA0
+ {EXTI1, EXTI_CONFIG_PORTA}, // D3/PA1
+ {EXTI5, EXTI_CONFIG_PORTB}, // D4/PB5
+ {EXTI6, EXTI_CONFIG_PORTB}, // D5/PB6
+ {EXTI8, EXTI_CONFIG_PORTA}, // D6/PA8
+ {EXTI9, EXTI_CONFIG_PORTA}, // D7/PA9
+ {EXTI10, EXTI_CONFIG_PORTA}, // D8/PA10
+ {EXTI7, EXTI_CONFIG_PORTB}, // D9/PB7
+ {EXTI4, EXTI_CONFIG_PORTA}, // D10/PA4
+ {EXTI7, EXTI_CONFIG_PORTA}, // D11/PA7
+ {EXTI6, EXTI_CONFIG_PORTA}, // D12/PA6
+ {EXTI5, EXTI_CONFIG_PORTA}, // D13/PA5
+ };
+
+#endif
+
+// LeafLabs Maple Native (prototype)
+//#ifdef BOARD_maple-native
+//#endif
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+#endif
+
diff --git a/wirish/ext_interrupts.c b/wirish/ext_interrupts.c
index 1fa50fe..6ba1d05 100644
--- a/wirish/ext_interrupts.c
+++ b/wirish/ext_interrupts.c
@@ -32,29 +32,6 @@
#include "exti.h"
#include "ext_interrupts.h"
-typedef struct ExtiInfo {
- uint8 channel;
- uint8 port;
-} ExtiInfo;
-
-static ExtiInfo PIN_TO_EXTI_CHANNEL[NR_MAPLE_PINS] = {
- {EXTI3, EXTI_CONFIG_PORTA}, // D0/PA3
- {EXTI2, EXTI_CONFIG_PORTA}, // D1/PA2
- {EXTI0, EXTI_CONFIG_PORTA}, // D2/PA0
- {EXTI1, EXTI_CONFIG_PORTA}, // D3/PA1
- {EXTI5, EXTI_CONFIG_PORTB}, // D4/PB5
- {EXTI6, EXTI_CONFIG_PORTB}, // D5/PB6
- {EXTI8, EXTI_CONFIG_PORTA}, // D6/PA8
- {EXTI9, EXTI_CONFIG_PORTA}, // D7/PA9
- {EXTI10, EXTI_CONFIG_PORTA}, // D8/PA10
- {EXTI7, EXTI_CONFIG_PORTB}, // D9/PB7
- {EXTI4, EXTI_CONFIG_PORTA}, // D10/PA4
- {EXTI7, EXTI_CONFIG_PORTA}, // D11/PA7
- {EXTI6, EXTI_CONFIG_PORTA}, // D12/PA6
- {EXTI5, EXTI_CONFIG_PORTA}, // D13/PA5
-};
-
-
/**
* @brief Attach an interrupt handler to be triggered on a given
* transition on the pin. Runs in interrupt context
@@ -68,7 +45,7 @@ static ExtiInfo PIN_TO_EXTI_CHANNEL[NR_MAPLE_PINS] = {
int attachInterrupt(uint8 pin, voidFuncPtr handler, uint32 mode) {
uint8 outMode;
/* Parameter checking */
- if (pin >= NR_MAPLE_PINS) {
+ if (pin >= NR_GPIO_PINS) {
return EXT_INTERRUPT_INVALID_PIN;
}
@@ -100,7 +77,7 @@ int attachInterrupt(uint8 pin, voidFuncPtr handler, uint32 mode) {
}
int detachInterrupt(uint8 pin) {
- if (!(pin < NR_MAPLE_PINS)) {
+ if (!(pin < NR_GPIO_PINS)) {
return EXT_INTERRUPT_INVALID_PIN;
}
diff --git a/wirish/io.h b/wirish/io.h
index fff551c..e779604 100644
--- a/wirish/io.h
+++ b/wirish/io.h
@@ -38,48 +38,6 @@
extern "C"{
#endif
-/* stash these here for now */
-#define D0 0
-#define D1 1
-#define D2 2
-#define D3 3
-#define D4 4
-#define D5 5
-#define D6 6
-#define D7 7
-#define D8 8
-#define D9 9
-#define D10 10
-#define D11 11
-#define D12 12
-#define D13 13
-#define D14 14
-#define D15 15
-#define D16 16
-#define D16 16
-#define D17 17
-#define D18 18
-#define D19 19
-#define D20 20
-#define D21 21
-#define D22 22
-#define D23 23
-#define D24 24
-#define D25 25
-#define D26 26
-#define D27 27
-#define D28 28
-#define D29 29
-#define D30 30
-#define D31 31
-#define D32 32
-#define D33 33
-#define D34 34
-#define D35 35
-#define D36 36
-#define D37 37
-#define D38 38
-#define D39 39
typedef enum WiringPinMode {
OUTPUT,
@@ -92,15 +50,6 @@ typedef enum WiringPinMode {
PWM
} WiringPinMode;
-typedef struct PinMapping {
- GPIO_Port *port;
- uint32 pin;
- uint32 adc;
- TimerCCR timer_channel;
-} PinMapping;
-
-#define ADC_INVALID 0xFFFFFFFF
-#define TIMER_INVALID (TimerCCR)0xFFFFFFFF
/* Set pin to mode
* pinMode(pin, mode):
diff --git a/wirish/pwm.c b/wirish/pwm.c
index 40715b5..995e2c7 100644
--- a/wirish/pwm.c
+++ b/wirish/pwm.c
@@ -31,12 +31,10 @@
#include "io.h"
#include "pwm.h"
-extern const PinMapping PIN_MAP[NR_MAPLE_PINS];
-
void pwmWrite(uint8 pin, uint16 duty_cycle) {
TimerCCR ccr;
- if (pin >= NR_MAPLE_PINS) {
+ if (pin >= NR_GPIO_PINS) {
return;
}
diff --git a/wirish/wirish.c b/wirish/wirish.c
index 4281875..d439b23 100644
--- a/wirish/wirish.c
+++ b/wirish/wirish.c
@@ -56,9 +56,9 @@ void init(void) {
systick_init(MAPLE_RELOAD_VAL);
gpio_init();
adc_init();
- timer_init(1, 1);
- timer_init(2, 1);
- timer_init(3, 1);
- timer_init(4, 1);
+ short i = 1;
+ for(i = 1; i <= NR_TIMERS; i++) {
+ timer_init(i, 1);
+ }
setupUSB();
}
diff --git a/wirish/wirish.h b/wirish/wirish.h
index 431e529..dd99e5c 100644
--- a/wirish/wirish.h
+++ b/wirish/wirish.h
@@ -32,6 +32,7 @@
#define _WIRISH_H_
#include "libmaple.h"
+#include "boards.h"
#include "timers.h"
#include "io.h"
#include "bits.h"
@@ -80,8 +81,5 @@ void shiftOut(uint8 dataPin, uint8 clockPin, uint8 bitOrder, byte val);
} // extern "C"
#endif
-
-
-
#endif
diff --git a/wirish/wirish_analog.c b/wirish/wirish_analog.c
index f4c1204..2a8d662 100644
--- a/wirish/wirish_analog.c
+++ b/wirish/wirish_analog.c
@@ -30,8 +30,6 @@
#include "wirish.h"
#include "io.h"
-extern const PinMapping PIN_MAP[NR_MAPLE_PINS];
-
/* Assumes that the ADC has been initialized and
* that the pin is set to ANALOG_INPUT */
uint32 analogRead(uint8 pin) {
diff --git a/wirish/wirish_digital.c b/wirish/wirish_digital.c
index 33217b6..c93c786 100644
--- a/wirish/wirish_digital.c
+++ b/wirish/wirish_digital.c
@@ -29,72 +29,10 @@
#include "wirish.h"
#include "io.h"
-#define ADC0 0
-#define ADC1 1
-#define ADC2 2
-#define ADC3 3
-#define ADC4 4
-#define ADC5 5
-#define ADC6 6
-#define ADC7 7
-#define ADC8 8
-#define ADC9 9
-#define ADC10 10
-#define ADC11 11
-#define ADC12 12
-#define ADC13 13
-#define ADC14 14
-#define ADC15 15
-#define ADC16 16
-
-const PinMapping PIN_MAP[NR_MAPLE_PINS] = {
- {GPIOA_BASE, 3, ADC3, TIMER2_CH4_CCR}, // D0/PA3
- {GPIOA_BASE, 2, ADC2, TIMER2_CH3_CCR}, // D1/PA2
- {GPIOA_BASE, 0, ADC0, TIMER2_CH1_CCR}, // D2/PA0
- {GPIOA_BASE, 1, ADC1, TIMER2_CH2_CCR}, // D3/PA1
- {GPIOB_BASE, 5, ADC_INVALID, TIMER_INVALID}, // D4/PB5
- {GPIOB_BASE, 6, ADC_INVALID, TIMER4_CH1_CCR}, // D5/PB6
- {GPIOA_BASE, 8, ADC_INVALID, TIMER1_CH1_CCR}, // D6/PA8
- {GPIOA_BASE, 9, ADC_INVALID, TIMER1_CH2_CCR}, // D7/PA9
- {GPIOA_BASE, 10, ADC_INVALID, TIMER1_CH3_CCR}, // D8/PA10
- {GPIOB_BASE, 7, ADC_INVALID, TIMER4_CH2_CCR}, // D9/PB7
- {GPIOA_BASE, 4, ADC4, TIMER_INVALID}, // D10/PA4
- {GPIOA_BASE, 7, ADC7, TIMER3_CH2_CCR}, // D11/PA7
- {GPIOA_BASE, 6, ADC6, TIMER3_CH1_CCR}, // D12/PA6
- {GPIOA_BASE, 5, ADC5, TIMER_INVALID}, // D13/PA5
- {GPIOB_BASE, 8, ADC_INVALID, TIMER4_CH3_CCR}, // D14/PB8
- /* Little header */
- {GPIOC_BASE, 0, ADC10, TIMER_INVALID}, // D15/PC0
- {GPIOC_BASE, 1, ADC11, TIMER_INVALID}, // D16/PC1
- {GPIOC_BASE, 2, ADC12, TIMER_INVALID}, // D17/PC2
- {GPIOC_BASE, 3, ADC13, TIMER_INVALID}, // D18/PC3
- {GPIOC_BASE, 4, ADC14, TIMER_INVALID}, // D19/PC4
- {GPIOC_BASE, 5, ADC15, TIMER_INVALID}, // D20/PC5
- /* External header */
- {GPIOC_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D21/PC13
- {GPIOC_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D22/PC14
- {GPIOC_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D23/PC15
- {GPIOB_BASE, 9, ADC_INVALID, TIMER4_CH4_CCR}, // D24/PB9
- {GPIOD_BASE, 2, ADC_INVALID, TIMER_INVALID}, // D25/PD2
- {GPIOC_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D26/PC10
- {GPIOB_BASE, 0, ADC8, TIMER3_CH3_CCR}, // D27/PB0
- {GPIOB_BASE, 1, ADC9, TIMER3_CH4_CCR}, // D28/PB1
- {GPIOB_BASE, 10, ADC_INVALID, TIMER_INVALID}, // D29/PB10
- {GPIOB_BASE, 11, ADC_INVALID, TIMER_INVALID}, // D30/PB11
- {GPIOB_BASE, 12, ADC_INVALID, TIMER_INVALID}, // D31/PB12
- {GPIOB_BASE, 13, ADC_INVALID, TIMER_INVALID}, // D32/PB13
- {GPIOB_BASE, 14, ADC_INVALID, TIMER_INVALID}, // D33/PB14
- {GPIOB_BASE, 15, ADC_INVALID, TIMER_INVALID}, // D34/PB15
- {GPIOC_BASE, 6, ADC_INVALID, TIMER_INVALID}, // D35/PC6
- {GPIOC_BASE, 7, ADC_INVALID, TIMER_INVALID}, // D36/PC7
- {GPIOC_BASE, 8, ADC_INVALID, TIMER_INVALID}, // D37/PC8
- {GPIOC_BASE, 9, ADC_INVALID, TIMER_INVALID} // D38/PC9
-};
-
void pinMode(uint8 pin, WiringPinMode mode) {
uint8 outputMode;
- if (pin >= NR_MAPLE_PINS)
+ if (pin >= NR_GPIO_PINS)
return;
switch(mode) {
@@ -130,13 +68,13 @@ void pinMode(uint8 pin, WiringPinMode mode) {
uint32 digitalRead(uint8 pin) {
- if (pin >= NR_MAPLE_PINS)
+ if (pin >= NR_GPIO_PINS)
return 0;
return gpio_read_bit(PIN_MAP[pin].port, PIN_MAP[pin].pin);
}
void digitalWrite(uint8 pin, uint8 val) {
- if (pin >= NR_MAPLE_PINS)
+ if (pin >= NR_GPIO_PINS)
return;
gpio_write_bit(PIN_MAP[pin].port, PIN_MAP[pin].pin, val);
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-27 04:13:04 +0000