diff options
Diffstat (limited to 'wirish/boards/stm32f401c_discovery')
| -rw-r--r-- | wirish/boards/stm32f401c_discovery/board.cpp | 72 | ||||
| -rw-r--r-- | wirish/boards/stm32f401c_discovery/include/board/board.h | 23 |
2 files changed, 79 insertions, 16 deletions
diff --git a/wirish/boards/stm32f401c_discovery/board.cpp b/wirish/boards/stm32f401c_discovery/board.cpp index c4c9f1a..da9ecf1 100644 --- a/wirish/boards/stm32f401c_discovery/board.cpp +++ b/wirish/boards/stm32f401c_discovery/board.cpp @@ -65,11 +65,73 @@ void boardInit(void) { // - ADC device, or NULL if none // - ADC channel, or ADCx if none extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = { - PMAP_ROW(GPIOA, 0, TIMER2, 1, ADC1, 0), /* D0/PA0 */ - PMAP_ROW(GPIOD, 12, TIMER4, 1, NULL, ADCx), /* D1/PD12 */ - PMAP_ROW(GPIOD, 13, TIMER4, 1, NULL, ADCx), /* D2/PD13 */ - PMAP_ROW(GPIOD, 14, TIMER4, 1, NULL, ADCx), /* D8/PD14 */ - PMAP_ROW(GPIOD, 15, TIMER4, 1, NULL, ADCx), /* D9/PD15 */ + PMAP_ROW(GPIOA, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ + PMAP_ROW(GPIOA, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ + PMAP_ROW(GPIOA, 2, NULL, 0, NULL, ADCx), /* D2/PA2 */ + PMAP_ROW(GPIOA, 3, NULL, 0, NULL, ADCx), /* D3/PA3 */ + PMAP_ROW(GPIOA, 4, NULL, 0, NULL, ADCx), /* D4/PA4 */ + PMAP_ROW(GPIOA, 5, NULL, 0, NULL, ADCx), /* D5/PA5 */ + PMAP_ROW(GPIOA, 6, NULL, 0, NULL, ADCx), /* D6/PA6 */ + PMAP_ROW(GPIOA, 7, NULL, 0, NULL, ADCx), /* D7/PA7 */ + PMAP_ROW(GPIOA, 8, NULL, 0, NULL, ADCx), /* D8/PA8 */ + PMAP_ROW(GPIOA, 9, NULL, 0, NULL, ADCx), /* D9/PA9 */ + PMAP_ROW(GPIOA, 10, NULL, 0, NULL, ADCx), /* D10/PA10 */ + PMAP_ROW(GPIOA, 11, NULL, 0, NULL, ADCx), /* D11/PA11 */ + PMAP_ROW(GPIOA, 12, NULL, 0, NULL, ADCx), /* D12/PA12 */ + PMAP_ROW(GPIOA, 13, NULL, 0, NULL, ADCx), /* D13/PA13 */ + PMAP_ROW(GPIOA, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ + PMAP_ROW(GPIOA, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ + + PMAP_ROW(GPIOB, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ + PMAP_ROW(GPIOB, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ + PMAP_ROW(GPIOB, 2, NULL, 0, NULL, ADCx), /* D2/PA2 */ + PMAP_ROW(GPIOB, 3, NULL, 0, NULL, ADCx), /* D3/PA3 */ + PMAP_ROW(GPIOB, 4, NULL, 0, NULL, ADCx), /* D4/PA4 */ + PMAP_ROW(GPIOB, 5, NULL, 0, NULL, ADCx), /* D5/PA5 */ + PMAP_ROW(GPIOB, 6, NULL, 0, NULL, ADCx), /* D6/PA6 */ + PMAP_ROW(GPIOB, 7, NULL, 0, NULL, ADCx), /* D7/PA7 */ + PMAP_ROW(GPIOB, 8, NULL, 0, NULL, ADCx), /* D8/PA8 */ + PMAP_ROW(GPIOB, 9, NULL, 0, NULL, ADCx), /* D9/PA9 */ + PMAP_ROW(GPIOB, 10, NULL, 0, NULL, ADCx), /* D10/PA10 */ + PMAP_ROW(GPIOB, 11, NULL, 0, NULL, ADCx), /* D11/PA11 */ + PMAP_ROW(GPIOB, 12, NULL, 0, NULL, ADCx), /* D12/PA12 */ + PMAP_ROW(GPIOB, 13, NULL, 0, NULL, ADCx), /* D13/PA13 */ + PMAP_ROW(GPIOB, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ + PMAP_ROW(GPIOB, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ + + PMAP_ROW(GPIOC, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ + PMAP_ROW(GPIOC, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ + PMAP_ROW(GPIOC, 2, NULL, 0, NULL, ADCx), /* D2/PA2 */ + PMAP_ROW(GPIOC, 3, NULL, 0, NULL, ADCx), /* D3/PA3 */ + PMAP_ROW(GPIOC, 4, NULL, 0, NULL, ADCx), /* D4/PA4 */ + PMAP_ROW(GPIOC, 5, NULL, 0, NULL, ADCx), /* D5/PA5 */ + PMAP_ROW(GPIOC, 6, NULL, 0, NULL, ADCx), /* D6/PA6 */ + PMAP_ROW(GPIOC, 7, NULL, 0, NULL, ADCx), /* D7/PA7 */ + PMAP_ROW(GPIOC, 8, NULL, 0, NULL, ADCx), /* D8/PA8 */ + PMAP_ROW(GPIOC, 9, NULL, 0, NULL, ADCx), /* D9/PA9 */ + PMAP_ROW(GPIOC, 10, NULL, 0, NULL, ADCx), /* D10/PA10 */ + PMAP_ROW(GPIOC, 11, NULL, 0, NULL, ADCx), /* D11/PA11 */ + PMAP_ROW(GPIOC, 12, NULL, 0, NULL, ADCx), /* D12/PA12 */ + PMAP_ROW(GPIOC, 13, NULL, 0, NULL, ADCx), /* D13/PA13 */ + PMAP_ROW(GPIOC, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ + PMAP_ROW(GPIOC, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ + + PMAP_ROW(GPIOD, 0, NULL, 0, NULL, ADCx), /* D0/PA0 */ + PMAP_ROW(GPIOD, 1, NULL, 0, NULL, ADCx), /* D1/PA1 */ + PMAP_ROW(GPIOD, 2, NULL, 0, NULL, ADCx), /* D2/PA2 */ + PMAP_ROW(GPIOD, 3, NULL, 0, NULL, ADCx), /* D3/PA3 */ + PMAP_ROW(GPIOD, 4, NULL, 0, NULL, ADCx), /* D4/PA4 */ + PMAP_ROW(GPIOD, 5, NULL, 0, NULL, ADCx), /* D5/PA5 */ + PMAP_ROW(GPIOD, 6, NULL, 0, NULL, ADCx), /* D6/PA6 */ + PMAP_ROW(GPIOD, 7, NULL, 0, NULL, ADCx), /* D7/PA7 */ + PMAP_ROW(GPIOD, 8, NULL, 0, NULL, ADCx), /* D8/PA8 */ + PMAP_ROW(GPIOD, 9, NULL, 0, NULL, ADCx), /* D9/PA9 */ + PMAP_ROW(GPIOD, 10, NULL, 0, NULL, ADCx), /* D10/PA10 */ + PMAP_ROW(GPIOD, 11, NULL, 0, NULL, ADCx), /* D11/PA11 */ + PMAP_ROW(GPIOD, 12, NULL, 0, NULL, ADCx), /* D12/PA12 */ + PMAP_ROW(GPIOD, 13, NULL, 0, NULL, ADCx), /* D13/PA13 */ + PMAP_ROW(GPIOD, 14, NULL, 0, NULL, ADCx), /* D14/PA14 */ + PMAP_ROW(GPIOD, 15, NULL, 0, NULL, ADCx), /* D15/PA15 */ }; // Array of pins you can use for pwmWrite(). Keep it in Flash because diff --git a/wirish/boards/stm32f401c_discovery/include/board/board.h b/wirish/boards/stm32f401c_discovery/include/board/board.h index b727d1a..f10ef0a 100644 --- a/wirish/boards/stm32f401c_discovery/include/board/board.h +++ b/wirish/boards/stm32f401c_discovery/include/board/board.h @@ -33,25 +33,23 @@ #ifndef _BOARD_STM32F401_DISCOVERY_H_ #define _BOARD_STM32F401_DISCOVERY_H_ -/* 72 MHz -> 72 cycles per microsecond. */ -#define CYCLES_PER_MICROSECOND 72 +/* 84 MHz -> 84 cycles per microsecond. */ +#define CYCLES_PER_MICROSECOND 84 /* Pin number for the built-in button. */ #define BOARD_BUTTON_PIN 0 /* Pin number for the built-in LED. */ -#define BOARD_LED_PIN 1 +#define BOARD_LED_PIN 63 /* Number of USARTs/UARTs whose pins are broken out to headers. */ #define BOARD_NR_USARTS 3 /* USART pin numbers. */ -#define BOARD_USART1_TX_PIN 7 -#define BOARD_USART1_RX_PIN 8 -#define BOARD_USART2_TX_PIN 1 -#define BOARD_USART2_RX_PIN 0 -#define BOARD_USART3_TX_PIN 29 -#define BOARD_USART3_RX_PIN 30 +#define BOARD_USART1_TX_PIN 9 +#define BOARD_USART1_RX_PIN 10 +#define BOARD_USART2_TX_PIN 2 +#define BOARD_USART2_RX_PIN 3 /* Number of SPI ports broken out to headers. */ #define BOARD_NR_SPI 2 @@ -69,7 +67,7 @@ /* Total number of GPIO pins that are broken out to headers and * intended for use. This includes pins like the LED, button, and * debug port (JTAG/SWD) pins. */ -#define BOARD_NR_GPIO_PINS 5 +#define BOARD_NR_GPIO_PINS 64 /* Number of pins capable of PWM output. */ #define BOARD_NR_PWM_PINS 5 @@ -98,7 +96,10 @@ * enum. These are optional, but recommended. They make it easier to * write code using low-level GPIO functionality. */ enum { - PA0, PD12, PD13, PD14, PD15 + PA0, PA1, PA2, PA3, PA4, PA5, PA6, PA7, PA8, PA9, PA10, PA11, PA12, PA13, PA14, PA15, + PB0, PB1, PB2, PB3, PB4, PB5, PB6, PB7, PB8, PB9, PB10, PB11, PB12, PB13, PB14, PB15, + PC0, PC1, PC2, PC3, PC4, PC5, PC6, PC7, PC8, PC9, PC10, PC11, PC12, PC13, PC14, PC15, + PD0, PD1, PD2, PD3, PD4, PD5, PD6, PD7, PD8, PD9, PD10, PD11, PD12, PD13, PD14, PD15, }; #endif |