diff options
Diffstat (limited to 'src/stm32lib/examples/NVIC/VectorTable_Relocation/linker')
5 files changed, 609 insertions, 0 deletions
diff --git a/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv4/lnkarm_flash_offset.xcl b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv4/lnkarm_flash_offset.xcl new file mode 100755 index 0000000..fcb8787 --- /dev/null +++ b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv4/lnkarm_flash_offset.xcl @@ -0,0 +1,191 @@ +/*;******************** (C) COPYRIGHT 2008 STMicroelectronics ******************
+;* File Name : lnkarm_flash.xcl
+;* Author : MCD Application Team
+;* Version : V2.0.1
+;* Date : 06/13/2008
+;* Description : XLINK command file template for EWARM/ICCARM
+;* Usage : xlink -f lnkarm <your_object_file(s)>
+;* : -s <program start label> <C/C++ runtime library>
+;*******************************************************************************
+; THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+; WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
+; AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
+; INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
+; CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
+; INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+;******************************************************************************/
+
+// Code memory in FLASH
+-DROMSTART=0x8002000
+-DROMEND=0x807FFFF
+
+// Data in RAM
+-DRAMSTART=0x20000000
+-DRAMEND=0x2000FFFF
+
+//*************************************************************************
+// -------------
+// Code segments - may be placed anywhere in memory.
+// -------------
+//
+// INTVEC -- Exception vector table.
+// SWITAB -- Software interrupt vector table.
+// ICODE -- Startup (cstartup) and exception code.
+// DIFUNCT -- Dynamic initialization vectors used by C++.
+// CODE -- Compiler generated code.
+// CODE_I -- Compiler generated code declared __ramfunc (executes in RAM)
+// CODE_ID -- Initializer for CODE_I (ROM).
+//
+// -------------
+// Data segments - may be placed anywhere in memory.
+// -------------
+//
+// CSTACK -- The stack used by C/C++ programs (system and user mode).
+// HEAP -- The heap used by malloc and free in C and new and
+// delete in C++.
+// INITTAB -- Table containing addresses and sizes of segments that
+// need to be initialized at startup (by cstartup).
+// CHECKSUM -- The linker places checksum byte(s) in this segment,
+// when the -J linker command line option is used.
+// DATA_y -- Data objects.
+//
+// Where _y can be one of:
+//
+// _AN -- Holds uninitialized located objects, i.e. objects with
+// an absolute location given by the @ operator or the
+// #pragma location directive. Since these segments
+// contain objects which already have a fixed address,
+// they should not be mentioned in this linker command
+// file.
+// _C -- Constants (ROM).
+// _I -- Initialized data (RAM).
+// _ID -- The original content of _I (copied to _I by cstartup) (ROM).
+// _N -- Uninitialized data (RAM).
+// _Z -- Zero initialized data (RAM).
+//
+// Note: Be sure to use end values for the defined address ranges.
+// Otherwise, the linker may allocate space outside the
+// intended memory range.
+//*************************************************************************
+
+
+//************************************************
+// Inform the linker about the CPU family used.
+//************************************************
+
+-carm
+
+//*************************************************************************
+// Segment placement - General information
+//
+// All numbers in the segment placement command lines below are interpreted
+// as hexadecimal unless they are immediately preceded by a '.', which
+// denotes decimal notation.
+//
+// When specifying the segment placement using the -P instead of the -Z
+// option, the linker is free to split each segment into its segment parts
+// and randomly place these parts within the given ranges in order to
+// achieve a more efficient memory usage. One disadvantage, however, is
+// that it is not possible to find the start or end address (using
+// the assembler operators .sfb./.sfe.) of a segment which has been split
+// and reformed.
+//
+// When generating an output file which is to be used for programming
+// external ROM/Flash devices, the -M linker option is very useful
+// (see xlink.pdf for details).
+//*************************************************************************
+
+
+//*************************************************************************
+// Read-only segments mapped to ROM.
+//*************************************************************************
+
+//************************************************
+// Address range for reset and exception
+// vectors (INTVEC).
+//************************************************
+
+-Z(CODE)INTVEC=ROMSTART-ROMEND
+
+//************************************************
+// Startup code and exception routines (ICODE).
+//************************************************
+
+-Z(CODE)ICODE,DIFUNCT=ROMSTART-ROMEND
+-Z(CODE)SWITAB=ROMSTART-ROMEND
+
+//************************************************
+// Code segments may be placed anywhere.
+//************************************************
+
+-Z(CODE)CODE=ROMSTART-ROMEND
+
+//************************************************
+// Original ROM location for __ramfunc code copied
+// to and executed from RAM.
+//************************************************
+
+-Z(CONST)CODE_ID=ROMSTART-ROMEND
+
+//************************************************
+// Various constants and initializers.
+//************************************************
+
+-Z(CONST)INITTAB,DATA_ID,DATA_C=ROMSTART-ROMEND
+-Z(CONST)CHECKSUM=ROMSTART-ROMEND
+
+
+//*************************************************************************
+// Read/write segments mapped to RAM.
+//*************************************************************************
+
+//************************************************
+// Data segments.
+//************************************************
+
+-Z(DATA)DATA_I,DATA_Z,DATA_N=RAMSTART-RAMEND
+
+//************************************************
+// __ramfunc code copied to and executed from RAM.
+//************************************************
+
+-Z(DATA)CODE_I=RAMSTART-RAMEND
+
+//************************************************
+// ICCARM produces code for __ramfunc functions in
+// CODE_I segments. The -Q XLINK command line
+// option redirects XLINK to emit the code in the
+// CODE_ID segment instead, but to keep symbol and
+// debug information associated with the CODE_I
+// segment, where the code will execute.
+//************************************************
+
+-QCODE_I=CODE_ID
+
+//*************************************************************************
+// Stack and heap segments.
+//*************************************************************************
+
+-D_CSTACK_SIZE=400
+-D_HEAP_SIZE=200
+
+-Z(DATA)CSTACK+_CSTACK_SIZE=RAMSTART-RAMEND
+-Z(DATA)HEAP+_HEAP_SIZE=RAMSTART-RAMEND
+
+//*************************************************************************
+// ELF/DWARF support.
+//
+// Uncomment the line "-Felf" below to generate ELF/DWARF output.
+// Available format specifiers are:
+//
+// "-yn": Suppress DWARF debug output
+// "-yp": Multiple ELF program sections
+// "-yas": Format suitable for debuggers from ARM Ltd (also sets -p flag)
+//
+// "-Felf" and the format specifiers can also be supplied directly as
+// command line options, or selected from the Xlink Output tab in the
+// IAR Embedded Workbench.
+//*************************************************************************
+
+// -Felf
+
diff --git a/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5/stm32f10x_flash_offset.icf b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5/stm32f10x_flash_offset.icf new file mode 100755 index 0000000..ac30a01 --- /dev/null +++ b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/EWARMv5/stm32f10x_flash_offset.icf @@ -0,0 +1,31 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\a_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08002000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08002000 ;
+define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__ = 0x2000FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x400;
+define symbol __ICFEDIT_size_heap__ = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
+define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
+define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
+
+initialize by copy { readwrite };
+do not initialize { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region { readonly };
+place in RAM_region { readwrite,
+ block CSTACK, block HEAP };
diff --git a/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32F10x_offset.lsl b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32F10x_offset.lsl new file mode 100755 index 0000000..164cf72 --- /dev/null +++ b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/HiTOP/STM32F10x_offset.lsl @@ -0,0 +1,132 @@ +// define rom size
+#define __ROM_SIZE 512k
+#define __ROM_ADDR 0x08002000
+// define ram size
+#define __RAM_SIZE 64k
+#define __RAM_ADDR 0x20000000
+
+#define __NR_OF_VECTORS 42
+#define __VECTOR_TABLE_SIZE (__NR_OF_VECTORS * 4)
+#define __VECTOR_TABLE_ROM_ADDR 0x08002000
+#define _Vectors 0x08002000
+
+#define _ENTRYADDR (0x08002001 + __VECTOR_TABLE_SIZE + 80) /* xB0 */
+
+#define _START max(_ENTRYADDR, 0x08002165)
+
+#define __RESET 0x08002004
+
+#define __STACK 0x400
+#define __STACKADDR (__RAM_ADDR + __RAM_SIZE - __STACK)
+#define __HEAP 2k
+
+#define __TABLE_RAM_SIZE 20
+#define __TABLE_RAM_ADDR (__STACKADDR - __STACK - __TABLE_RAM_SIZE)
+
+
+#define __MEMORY
+
+#define __PROCESSOR_MODE 0x10 /* User mode */
+#define __IRQ_BIT 0x80 /* IRQ interrupts disabled */
+#define __FIQ_BIT 0x40 /* FIQ interrupts disabled */
+#define __APPLICATION_MODE (__PROCESSOR_MODE | __IRQ_BIT | __FIQ_BIT)
+
+
+architecture ARM
+{
+ endianness
+ {
+ little;
+ big;
+ }
+ space linear
+ {
+ id = 1;
+ mau = 8;
+ align = 4;
+ map (size = 4G, dest = bus:local_bus);
+
+ copytable
+ (
+ align = 4,
+ copy_unit = 1,
+ dest = linear
+ );
+ start_address
+ (
+ // It is not strictly necessary to define a run_addr for _START
+ // because hardware starts execution at address 0x0 which should
+ // be the vector table with a jump to the relocatable _START, but
+ // an absolute address can prevent the branch to be out-of-range.
+ // Or _START may be the entry point at reset and the reset handler
+ // copies the vector table to address 0x0 after some ROM/RAM memory
+ // re-mapping. In that case _START should be at a fixed address
+ // in ROM, specifically the alias of address 0x0 before memory
+ // re-mapping.
+ run_addr = _START,
+ symbol = "_START"
+ );
+
+ stack "stack"
+ (
+
+ align = 4,
+ min_size = __STACK,
+ grows = high_to_low
+ );
+ heap "heap"
+ (
+ align = 4,
+ min_size=__HEAP
+ );
+ section_layout
+ {
+ "_lc_ub_vector_table" = __VECTOR_TABLE_ROM_ADDR;
+ "_lc_ue_vector_table" = __VECTOR_TABLE_ROM_ADDR + __VECTOR_TABLE_SIZE + 8;
+// "_lc_ub_table" = __TABLE_RAM_ADDR;
+// "_lc_ue_table" = __TABLE_RAM_ADDR + __TABLE_RAM_SIZE;
+ "_lc_ub_vector_table_copy" := "_lc_ub_vector_table";
+ "_lc_ue_vector_table_copy" := "_lc_ue_vector_table";
+
+ group ( ordered, run_addr=__VECTOR_TABLE_ROM_ADDR )
+ {
+ select ".text.vector";
+
+ }
+
+#ifdef __HEAPADDR
+ group ( ordered, run_addr=__HEAPADDR )
+ {
+ select "heap";
+ }
+#endif
+ group ( ordered, run_addr=__STACKADDR)
+ {
+ select "stack";
+ }
+ }
+ }
+ bus local_bus
+ {
+ mau = 8;
+ width = 32;
+ }
+}
+///////////////////////////////////////////////////////////////////
+
+
+memory flash
+{
+ mau = 8;
+ type = rom;
+ size = __ROM_SIZE;
+ map ( size = __ROM_SIZE, dest_offset = __ROM_ADDR, dest = bus:ARM:local_bus );
+}
+
+memory sram
+{
+ mau = 8;
+ type = ram;
+ size = __RAM_SIZE;
+ map ( size = __RAM_SIZE, dest_offset = __RAM_ADDR, dest = bus:ARM:local_bus );
+}
diff --git a/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/HiTOP/link_offset.lnk b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/HiTOP/link_offset.lnk new file mode 100755 index 0000000..5bfdd21 --- /dev/null +++ b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/HiTOP/link_offset.lnk @@ -0,0 +1,5 @@ +-d"./settings/STM32F10x_offset.lsl"
+--optimize=0
+--map-file-format=2
+$(LinkObjects)
+--output=.\Objects\$(Target)
\ No newline at end of file diff --git a/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/RIDE/stm32f10x_flash_offset.ld b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/RIDE/stm32f10x_flash_offset.ld new file mode 100755 index 0000000..0fb109f --- /dev/null +++ b/src/stm32lib/examples/NVIC/VectorTable_Relocation/linker/RIDE/stm32f10x_flash_offset.ld @@ -0,0 +1,250 @@ +/*
+Default linker script for STM32F10x_512K_64K
+Copyright RAISONANCE S.A.S. 2008
+*/
+
+/* include the common STM32F10x sub-script */
+
+/* Common part of the linker scripts for STM32 devices*/
+
+
+/* default stack sizes.
+
+These are used by the startup in order to allocate stacks for the different modes.
+*/
+
+__Stack_Size = 1024 ;
+
+PROVIDE ( _Stack_Size = __Stack_Size ) ;
+
+__Stack_Init = _estack - __Stack_Size ;
+
+/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/
+PROVIDE ( _Stack_Init = __Stack_Init ) ;
+
+/*
+There will be a link error if there is not this amount of RAM free at the end.
+*/
+_Minimum_Stack_Size = 0x100 ;
+
+
+/* include the memory spaces definitions sub-script */
+/*
+Linker subscript for STM32F10x definitions with 512K Flash and 64K RAM */
+
+/* Memory Spaces Definitions */
+
+MEMORY
+{
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K
+ FLASH (rx) : ORIGIN = 0x8002000, LENGTH = 512K-0x2000
+ FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
+ EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0
+ EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0
+ EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0
+ EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0
+}
+
+/* higher address of the user mode stack */
+_estack = 0x20010000;
+
+
+
+/* include the sections management sub-script for FLASH mode */
+/*
+Common part of the linker scripts for STR71x devices in FLASH mode
+(that is, the FLASH is seen at 0)
+Copyright RAISONANCE 2005
+You can use, modify and distribute thisfile freely, but without any waranty.
+*/
+
+
+
+/* Sections Definitions */
+
+SECTIONS
+{
+ /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */
+ .isr_vector :
+ {
+ . = ALIGN(4);
+ KEEP(*(.isr_vector)) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+ /* for some STRx devices, the beginning of the startup code is stored in the .flashtext section, which goes to FLASH */
+ .flashtext :
+ {
+ . = ALIGN(4);
+ *(.flashtext) /* Startup code */
+ . = ALIGN(4);
+ } >FLASH
+
+
+ /* the program code is stored in the .text section, which goes to Flash */
+ .text :
+ {
+ . = ALIGN(4);
+
+ *(.text) /* remaining code */
+ *(.text.*) /* remaining code */
+ *(.rodata) /* read-only data (constants) */
+ *(.rodata*)
+ *(.glue_7)
+ *(.glue_7t)
+
+ . = ALIGN(4);
+ _etext = .;
+ /* This is used by the startup in order to initialize the .data secion */
+ _sidata = _etext;
+ } >FLASH
+
+
+
+ /* This is the initialized data section
+ The program executes knowing that the data is in the RAM
+ but the loader puts the initial values in the FLASH (inidata).
+ It is one task of the startup to copy the initial values from FLASH to RAM. */
+ .data : AT ( _sidata )
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _sdata = . ;
+
+ *(.data)
+ *(.data.*)
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .data secion */
+ _edata = . ;
+ } >RAM
+
+
+
+ /* This is the uninitialized data section */
+ .bss :
+ {
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _sbss = .;
+
+ *(.bss)
+ *(COMMON)
+
+ . = ALIGN(4);
+ /* This is used by the startup in order to initialize the .bss secion */
+ _ebss = . ;
+ } >RAM
+
+ PROVIDE ( end = _ebss );
+ PROVIDE ( _end = _ebss );
+
+ /* This is the user stack section
+ This is just to check that there is enough RAM left for the User mode stack
+ It should generate an error if it's full.
+ */
+ ._usrstack :
+ {
+ . = ALIGN(4);
+ _susrstack = . ;
+
+ . = . + _Minimum_Stack_Size ;
+
+ . = ALIGN(4);
+ _eusrstack = . ;
+ } >RAM
+
+
+
+ /* this is the FLASH Bank1 */
+ /* the C or assembly source must explicitly place the code or data there
+ using the "section" attribute */
+ .b1text :
+ {
+ *(.b1text) /* remaining code */
+ *(.b1rodata) /* read-only data (constants) */
+ *(.b1rodata*)
+ } >FLASHB1
+
+ /* this is the EXTMEM */
+ /* the C or assembly source must explicitly place the code or data there
+ using the "section" attribute */
+
+ /* EXTMEM Bank0 */
+ .eb0text :
+ {
+ *(.eb0text) /* remaining code */
+ *(.eb0rodata) /* read-only data (constants) */
+ *(.eb0rodata*)
+ } >EXTMEMB0
+
+ /* EXTMEM Bank1 */
+ .eb1text :
+ {
+ *(.eb1text) /* remaining code */
+ *(.eb1rodata) /* read-only data (constants) */
+ *(.eb1rodata*)
+ } >EXTMEMB1
+
+ /* EXTMEM Bank2 */
+ .eb2text :
+ {
+ *(.eb2text) /* remaining code */
+ *(.eb2rodata) /* read-only data (constants) */
+ *(.eb2rodata*)
+ } >EXTMEMB2
+
+ /* EXTMEM Bank0 */
+ .eb3text :
+ {
+ *(.eb3text) /* remaining code */
+ *(.eb3rodata) /* read-only data (constants) */
+ *(.eb3rodata*)
+ } >EXTMEMB3
+
+
+
+ /* after that it's only debugging information. */
+
+ /* remove the debugging information from the standard libraries */
+ DISCARD :
+ {
+ libc.a ( * )
+ libm.a ( * )
+ libgcc.a ( * )
+ }
+
+ /* Stabs debugging sections. */
+ .stab 0 : { *(.stab) }
+ .stabstr 0 : { *(.stabstr) }
+ .stab.excl 0 : { *(.stab.excl) }
+ .stab.exclstr 0 : { *(.stab.exclstr) }
+ .stab.index 0 : { *(.stab.index) }
+ .stab.indexstr 0 : { *(.stab.indexstr) }
+ .comment 0 : { *(.comment) }
+ /* DWARF debug sections.
+ Symbols in the DWARF debugging sections are relative to the beginning
+ of the section so we begin them at 0. */
+ /* DWARF 1 */
+ .debug 0 : { *(.debug) }
+ .line 0 : { *(.line) }
+ /* GNU DWARF 1 extensions */
+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
+ .debug_sfnames 0 : { *(.debug_sfnames) }
+ /* DWARF 1.1 and DWARF 2 */
+ .debug_aranges 0 : { *(.debug_aranges) }
+ .debug_pubnames 0 : { *(.debug_pubnames) }
+ /* DWARF 2 */
+ .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
+ .debug_abbrev 0 : { *(.debug_abbrev) }
+ .debug_line 0 : { *(.debug_line) }
+ .debug_frame 0 : { *(.debug_frame) }
+ .debug_str 0 : { *(.debug_str) }
+ .debug_loc 0 : { *(.debug_loc) }
+ .debug_macinfo 0 : { *(.debug_macinfo) }
+ /* SGI/MIPS DWARF 2 extensions */
+ .debug_weaknames 0 : { *(.debug_weaknames) }
+ .debug_funcnames 0 : { *(.debug_funcnames) }
+ .debug_typenames 0 : { *(.debug_typenames) }
+ .debug_varnames 0 : { *(.debug_varnames) }
+}
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