5 files changed, 233 insertions, 0 deletions
diff --git a/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash
new file mode 100755
index 0000000..b9de87a
--- /dev/null
+++ b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash
diff --git a/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash.cfg b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash.cfg
new file mode 100755
index 0000000..fd6a90b
--- /dev/null
+++ b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash.cfg
@@ -0,0 +1,69 @@
+# Open On-Chip Debugger
+# (c) 2005 by Dominic Rath
+# (snapshot r247 from SVN tree + giveio, no official release, compiled my mifi)
+#
+# --help       | -h       display this help
+# --file       | -f       use configuration file <name>
+# --debug      | -d       set debug level <0-3>
+# --log_output | -l       redirect log output to file <name>
+
+
+# daemon configuration
+
+# logging
+#debug 3
+
+# default ports
+telnet_port 4444
+gdb_port 3333
+
+daemon_startup reset
+
+#gdb_flash_program enable
+
+
+# interface configuration
+
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG A"
+#ft2232_device_desc "Olimex OpenOCD JTAG TINY A"
+ft2232_layout olimex-jtag
+jtag_speed 10
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+reset_config trst_and_srst
+
+
+# scan chain configuration
+
+# jtag_device L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+jtag_device 5 0x1 0x1 0x1e
+
+
+# target configuration
+
+# target <type> <startup mode>
+# target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
+#target cortex_m3 little reset_halt 0
+#target cortex_m3 little run_and_halt 0
+#target cortex_m3 little reset_init 0 (this causes scripted flash write_image to fail)
+target cortex_m3 little run_and_init 0
+
+# run_and_halt_time <target> <time_in_ms>
+run_and_halt_time 0 0
+
+# working_area <target> <address> <size> <backup|nobackup>
+working_area 0 0x20000000 0x5000 nobackup
+
+# flash bank <driver> <base> <size> <chip_width> <bus_width> <target> [options]
+# flash bank stm32x <base> <size> 0 0 <target>
+flash bank stm32x 0x08000000 0x20000 0 0 0
+
+
+# script configuration
+
+# target_script <target> <event> <script_file>
+target_script 0 reset flash.script
diff --git a/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash.script b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash.script
new file mode 100755
index 0000000..54eb165
--- /dev/null
+++ b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/flash.script
@@ -0,0 +1,11 @@
+wait_halt
+sleep 10
+#poll
+#sleep 10
+stm32x mass_erase 0
+sleep 10
+flash write_image flash
+sleep 10
+reset run
+sleep 10
+shutdown
diff --git a/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/openocd.cfg b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/openocd.cfg
new file mode 100755
index 0000000..34d57ff
--- /dev/null
+++ b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/openocd.cfg
@@ -0,0 +1,60 @@
+# Open On-Chip Debugger
+# (c) 2005 by Dominic Rath
+# (snapshot r247 from SVN tree + giveio, no official release, compiled my mifi)
+#
+# --help       | -h       display this help
+# --file       | -f       use configuration file <name>
+# --debug      | -d       set debug level <0-3>
+# --log_output | -l       redirect log output to file <name>
+
+
+# daemon configuration
+
+# logging
+#debug 3
+
+# default ports
+telnet_port 4444
+gdb_port 3333
+
+daemon_startup reset
+
+#gdb_flash_program enable
+
+
+# interface configuration
+
+interface ft2232
+ft2232_device_desc "Olimex OpenOCD JTAG"
+ft2232_layout olimex-jtag
+ft2232_vid_pid 0x15ba 0x0003
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+reset_config trst_and_srst
+
+
+# scan chain configuration
+
+# jtag_device L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+jtag_device 5 0x1 0x1 0x1e
+
+
+# target configuration
+
+# target <type> <startup mode>
+# target cortex_m3 <endianness> <reset mode> <chainpos> <variant>
+target cortex_m3 little reset_halt 0
+#target cortex_m3 little run_and_halt 0
+
+# run_and_halt_time <target> <time_in_ms>
+#run_and_halt_time 0 0
+
+# working_area <target> <address> <size> <backup|nobackup>
+working_area 0 0x20000000 0x5000 nobackup
+
+# flash bank <driver> <base> <size> <chip_width> <bus_width> <target> [options]
+# flash bank stm32x <base> <size> 0 0 <target>
+flash bank stm32x 0x08000000 0x20000 0 0 0
diff --git a/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/target.ini b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/target.ini
new file mode 100755
index 0000000..da18158
--- /dev/null
+++ b/src/stm32lib/examples/DAC/DualModeDMA_SineWave/jtag/target.ini
@@ -0,0 +1,93 @@
+#
+# GDB init file for STM32x family
+#
+
+set complaints 1
+set output-radix 16
+set input-radix 16
+
+# GDB must be set to big endian mode first if needed.
+#set endian little
+
+# add str9lib src to gdb search path
+#dir /cygdrive/c/progra~1/anglia/idealist/examples/stm32/libstr32x/src
+#dir C:/Progra~1/Anglia/IDEaliST/examples/stm32/libstm32x/src
+
+# change gdb prompt
+set prompt (arm-gdb)
+
+# You will need to change this to reflect the address of your jtag interface.
+#target remote localhost:2000
+
+# The libremote daemon must be set to big endian before the
+# executable is loaded.
+#monitor endian little
+
+# Increase the packet size to improve download speed.
+# to view current setting use:
+# show remote memory-write-packet-size
+
+set remote memory-write-packet-size 1024
+set remote memory-write-packet-size fixed
+
+set remote memory-read-packet-size 1024
+set remote memory-read-packet-size fixed
+set remote hardware-watchpoint-limit 6
+set remote hardware-breakpoint-limit 6
+
+# Load the program executable (ram only)
+#load
+
+# Set a breakpoint at main().
+#b main
+
+# Run to the breakpoint.
+#c
+
+#
+# GDB command helpers
+#
+
+#
+# reset and map 0 to internal ram
+#
+
+define ramreset
+reset
+set *(int*)0xE000ED08 = 0x20000000
+echo Internal RAM set to address 0x0.
+end
+
+#
+# reset and map 0 to flash
+#
+
+define flashreset
+reset
+thb main
+echo Internal Flash set to address 0x0.
+end
+
+#
+# reset target
+#
+
+define reset
+monitor reset
+end
+
+document ramreset
+ramreset
+Causes a target reset, remaps Internal RAM to address 0x0.
+end
+
+document flashreset
+flashreset
+Causes a target reset, remaps Internal Flash to address 0x0.
+A temporary breakpoint is set at start of function main
+end
+
+document reset
+reset
+Causes a target reset.
+end