diff options
Diffstat (limited to 'src/lib')
-rw-r--r-- | src/lib/adc.c | 9 | ||||
-rw-r--r-- | src/lib/gpio.c | 12 | ||||
-rw-r--r-- | src/lib/rcc.c | 19 | ||||
-rw-r--r-- | src/lib/rcc.h | 19 | ||||
-rw-r--r-- | src/lib/timers.c | 11 | ||||
-rw-r--r-- | src/lib/usart.c | 7 |
6 files changed, 57 insertions, 20 deletions
diff --git a/src/lib/adc.c b/src/lib/adc.c index 7169824..ee2b17a 100644 --- a/src/lib/adc.c +++ b/src/lib/adc.c @@ -23,7 +23,6 @@ * @brief Analog to digital converter routines */ -#include "stm32f10x_rcc.h" #include "adc.h" #include <stdio.h> #include <inttypes.h> @@ -60,14 +59,14 @@ void adc_init(void) { /* PCLK2 is the APB2 clock */ - RCC_ADCCLKConfig(RCC_PCLK2_Div6); +// RCC_ADCCLKConfig(RCC_PCLK2_Div6); /* Enable ADC1 clock so that we can talk to it */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); +// RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE); /* Put everything back to power-on defaults */ - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE); - RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE); +// RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE); +// RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE); ADC_CR1 = 0; ADC_CR2 = CR2_EXTSEL_SWSTART | CR2_EXTTRIG; // Software triggers conversions diff --git a/src/lib/gpio.c b/src/lib/gpio.c index facb514..0335a51 100644 --- a/src/lib/gpio.c +++ b/src/lib/gpio.c @@ -29,12 +29,12 @@ void gpio_init(void) { /* Turn on clocks for GPIO */ - RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | - RCC_APB2Periph_GPIOB | - RCC_APB2Periph_GPIOC | - RCC_APB2Periph_GPIOD | - RCC_APB2Periph_AFIO, - ENABLE); +// RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | +// RCC_APB2Periph_GPIOB | +// RCC_APB2Periph_GPIOC | +// RCC_APB2Periph_GPIOD | +// RCC_APB2Periph_AFIO, +// ENABLE); } void gpio_set_mode(GPIO_Port* port, uint8 gpio_pin, uint8 mode) { diff --git a/src/lib/rcc.c b/src/lib/rcc.c new file mode 100644 index 0000000..e29b010 --- /dev/null +++ b/src/lib/rcc.c @@ -0,0 +1,19 @@ +#include "libmaple.h" +#include "rcc.h" + +typedef struct RCC { + volatile uint32 CR; + volatile uint32 CFGR; + volatile uint32 CIR; + volatile uint32 APB2STR; + volatile uint32 APB1RSTR; + volatile uint32 AHBENR; + volatile uint32 APB2ENR; + volatile uint32 APB1ENR; + volatile uint32 BDCR; + volatile uint32 CSR; +} RCC; + +void rcc_enable(uint32 p) { + +} diff --git a/src/lib/rcc.h b/src/lib/rcc.h new file mode 100644 index 0000000..2338593 --- /dev/null +++ b/src/lib/rcc.h @@ -0,0 +1,19 @@ +/** + * @file rcc.h + * + * @brief + */ + +#ifndef _RCC_H_ +#define _RCC_H_ + +#define RCC_TIMER1 +#define RCC_TIMER2 +#define RCC_TIMER3 +#define RCC_TIMER4 + +void rcc_enable(uint32 p); + +#endif + + diff --git a/src/lib/timers.c b/src/lib/timers.c index 773ae36..a248235 100644 --- a/src/lib/timers.c +++ b/src/lib/timers.c @@ -24,7 +24,7 @@ */ #include "libmaple.h" -#include "stm32f10x_rcc.h" +#include "rcc.h" #include "timers.h" typedef struct { @@ -79,20 +79,21 @@ void timer_init(uint8_t timer_num, uint16_t prescale) { switch(timer_num) { case 1: timer = (Timer*)TIMER1_BASE; - RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE); +// rcc_enable(RCC_TIMER1); is_advanced = 1; break; case 2: timer = (Timer*)TIMER2_BASE; - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); +// rcc_enable(RCC_TIMER2); + //RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM2, ENABLE); break; case 3: timer = (Timer*)TIMER3_BASE; - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM3, ENABLE); +// rcc_enable(RCC_TIMER3); break; case 4: timer = (Timer*)TIMER4_BASE; - RCC_APB1PeriphClockCmd(RCC_APB1Periph_TIM4, ENABLE); + // rcc_enable(RCC_TIMER4); break; } diff --git a/src/lib/usart.c b/src/lib/usart.c index 9987641..b7c3ea8 100644 --- a/src/lib/usart.c +++ b/src/lib/usart.c @@ -24,7 +24,6 @@ */ #include "libmaple.h" -#include "stm32f10x_rcc.h" #include "usart.h" #include "nvic.h" @@ -123,21 +122,21 @@ void usart_init(uint8 usart_num, uint32 baud) { port = (usart_port*)USART1_BASE; ring_buf = &ring_buf1; clk_speed = USART1_CLK; - RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); +// RCC_APB2PeriphClockCmd(RCC_APB2Periph_USART1, ENABLE); REG_SET(NVIC_ISER1, BIT(5)); break; case 2: port = (usart_port*)USART2_BASE; ring_buf = &ring_buf2; clk_speed = USART2_CLK; - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); +// RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE); REG_SET(NVIC_ISER1, BIT(6)); break; case 3: port = (usart_port*)USART3_BASE; ring_buf = &ring_buf3; clk_speed = USART3_CLK; - RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); +// RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE); REG_SET(NVIC_ISER1, BIT(7)); break; default: |