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-rw-r--r--notes/native-pin-definitions.txt201
-rw-r--r--notes/pin-mapping.txt28
2 files changed, 223 insertions, 6 deletions
diff --git a/notes/native-pin-definitions.txt b/notes/native-pin-definitions.txt
new file mode 100644
index 0000000..b871f89
--- /dev/null
+++ b/notes/native-pin-definitions.txt
@@ -0,0 +1,201 @@
+Maple Native (STM32F103ZE) pin definitions, by GPIO bank.
+
+Source: ST DOC ID 14611, Datasheet for STM32F103xC, STM32F103xD,
+STM32F103xE, Table 5, pp. 30--35.
+
+Some peripherals and extra functionality with less/no libmaple
+relevance (at time of writing) are given in "Other" following each
+bank's main table. Non-default alternate functions are not listed. If
+wirish will/does remap the pin's main function after reset, the main
+function is listed under "Other".
+
+This document was prepared carefully and is believed to be complete
+and correct, but the final arbiter of truth is the ST datasheet.
+
+*** NB: UART 4 and 5 are NOT USART (columns are labeled appropriately).
+
+---------------------------------------------------------------------------
+STM32 ADC Timer FSMC I2S I2C USART SPI DAC 5v?
+---------------------------------------------------------------------------
+PA0 123in0 2ch1etr - - - 2cts - - -
+ 5ch1
+ 8etr
+PA1 123in1 5ch2 - - - 2rts - - -
+ 2ch2
+PA2 123in2 5ch3 - - - 2tx - - -
+ 2ch3
+PA3 123in3 5ch4 - - - 2rx - - -
+ 2ch4
+PA4 12in4 - - - - 2ck 1nss out1 -
+PA5 12in5 - - - - - 1sck out2 -
+PA6 12in6 8bkin - - - - 1miso - -
+ 3ch1
+PA7 12in7 8ch1n - - - - 1mosi - -
+ 3ch2
+PA8 - 1ch1 - - - 1ck - - Y
+PA9 - 1ch2 - - - 1tx - - Y
+PA10 - 1ch3 - - - 1rx - - Y
+PA11 - 1ch4 - - - 1cts - - Y
+PA12 - 1etr - - - 1rts - - Y
+PA13 - - - - - - - - Y
+PA14 - - - - - - - - Y
+PA15 - - - 3ws - - 3nss - Y
+
+Other:
+
+PA0: WKUP
+PA8: MCO
+PA11: USBDM, CAN_RX
+PA12: USBDP, CAN_TX
+PA13: JTMS-SWDIO (default)
+PA14: JTCK-SWCLK (default)
+PA15: JTDI (default)
+
+-------------------------------------------------------------------------------
+STM32 ADC Timer FSMC I2S I2C USART SPI DAC 5v? SDIO
+-------------------------------------------------------------------------------
+PB0 12in8 3ch3 - - - - - - - -
+ 8ch2n
+PB1 12in9 3ch4 - - - - - - - -
+ 8ch3n
+PB2 - - - - - - - - Y -
+PB3 - - - 3ck - - 3sck - Y -
+PB4 - - - - - - 3miso - Y -
+PB5 - - - 3sd 1smba - 3mosi - - -
+PB6 - 4ch1 - - 1scl - - - Y -
+PB7 - 4ch2 NADV - 1sda - - - Y -
+PB8 - 4ch3 - - - - - - Y D4
+PB9 - 4ch4 - - - - - - Y D5
+PB10 - - - - 2scl 3tx - - Y -
+PB11 - - - - 2sda 3rx - - Y -
+PB12 - 1bkin - 2ws 2smba 3ck 2nss - Y -
+PB13 - 1ch1n - 2ck - 3cts 2sck - Y -
+PB14 - 1ch2n - - - 3rts 2miso - Y -
+PB15 - 1ch3n - 2sd - - 2mosi - Y -
+
+Other:
+
+PB2: BOOT1
+PB3: JTDO (default)
+PB4: NJTRST (default)
+
+-------------------------------------------------------------------------------
+STM32 ADC Timer FSMC I2S I2C UART SPI DAC 5v? SDIO
+-------------------------------------------------------------------------------
+PC0 123in10 - - - - - - - - -
+PC1 123in11 - - - - - - - - -
+PC2 123in12 - - - - - - - - -
+PC3 123in13 - - - - - - - - -
+PC4 12in14 - - - - - - - - -
+PC5 12in15 - - - - - - - - -
+PC6 - 8ch1 - 2mck - - - - Y D6
+PC7 - 8ch2 - 3mck - - - - Y D7
+PC8 - 8ch3 - - - - - - Y D0
+PC9 - 8ch4 - - - - - - Y D1
+PC10 - - - - - 4tx - - Y D2
+PC11 - - - - - 4rx - - Y D3
+PC12 - - - - - 5tx - - Y CK
+PC13 - - - - - - - - - -
+PC14 - - - - - - - - - -
+PC15 - - - - - - - - - -
+
+Other:
+
+PC13: TAMPER_RTC
+PC14: OSC32_IN
+PC15: OSC32_OUT
+
+-------------------------------------------------------------------------------
+STM32 ADC Timer FSMC I2S I2C UART SPI DAC 5v? SDIO
+-------------------------------------------------------------------------------
+PD0 - - D2 - - - - - Y -
+PD1 - - D3 - - - - - Y -
+PD2 - 3etr - - - 5rx - - Y CMD
+PD3 - - CLK - - - - - Y -
+PD4 - - NOE - - - - - Y -
+PD5 - - NWE - - - - - Y -
+PD6 - - NWAIT - - - - - Y -
+PD7 - - NE1 - - - - - Y -
+ NCE2
+PD8 - - D13 - - - - - Y -
+PD9 - - D14 - - - - - Y -
+PD10 - - D15 - - - - - Y -
+PD11 - - A16 - - - - - Y -
+PD12 - - A17 - - - - - Y -
+PD13 - - A18 - - - - - Y -
+PD14 - - D0 - - - - - Y -
+PD15 - - D1 - - - - - Y -
+
+Other:
+
+PD0: OSC_IN (default)
+PD1: OSC_OUT (default)
+
+---------------------------------------------------------------------------
+STM32 ADC Timer FSMC I2S I2C USART SPI DAC 5v?
+---------------------------------------------------------------------------
+PE0 - 4etr NBL0 - - - - - Y
+PE1 - - NBL1 - - - - - Y
+PE2 - - A23 - - - - - Y
+PE3 - - A19 - - - - - Y
+PE4 - - A20 - - - - - Y
+PE5 - - A21 - - - - - Y
+PE6 - - A22 - - - - - Y
+PE7 - - D4 - - - - - Y
+PE8 - - D5 - - - - - Y
+PE9 - - D6 - - - - - Y
+PE10 - - D7 - - - - - Y
+PE11 - - D8 - - - - - Y
+PE12 - - D9 - - - - - Y
+PE13 - - D10 - - - - - Y
+PE14 - - D11 - - - - - Y
+PE15 - - D12 - - - - - Y
+
+Other:
+PE2: TRACECK
+PE3: TRACED0
+PE4: TRACED1
+PE5: TRACED2
+PE6: TRACED3
+
+---------------------------------------------------------------------------
+STM32 ADC Timer FSMC I2S I2C USART SPI DAC 5v?
+---------------------------------------------------------------------------
+PF0 - - A0 - - - - - Y
+PF1 - - A1 - - - - - Y
+PF2 - - A2 - - - - - Y
+PF3 - - A3 - - - - - Y
+PF4 - - A4 - - - - - Y
+PF5 - - A5 - - - - - Y
+PF6 3in4 - NIORD - - - - - -
+PF7 3in5 - NREG - - - - - -
+PF8 3in6 - NIOWR - - - - - -
+PF9 3in7 - CD - - - - - -
+PF10 3in8 - INTR - - - - - -
+PF11 - - NIOS16 - - - - - Y
+PF12 - - A6 - - - - - Y
+PF13 - - A7 - - - - - Y
+PF14 - - A8 - - - - - Y
+PF15 - - A9 - - - - - Y
+
+---------------------------------------------------------------------------
+STM32 ADC Timer FSMC I2S I2C USART SPI DAC 5v?
+---------------------------------------------------------------------------
+PG0 - - A10 - - - - - Y
+PG1 - - A11 - - - - - Y
+PG2 - - A12 - - - - - Y
+PG3 - - A13 - - - - - Y
+PG4 - - A14 - - - - - Y
+PG5 - - A15 - - - - - Y
+PG6 - - INT2 - - - - - Y
+PG7 - - INT3 - - - - - Y
+PG8 - - - - - - - - Y
+PG9 - - NE2 - - - - - Y
+ NCE3
+PG10 - - NCE4_1 - - - - - Y
+ NE3
+PG11 - - NCE4_2 - - - - - Y
+PG12 - - NE4 - - - - - Y
+PG13 - - A24 - - - - - Y
+PG14 - - A25 - - - - - Y
+PG15 - - - - - - - - Y
diff --git a/notes/pin-mapping.txt b/notes/pin-mapping.txt
index 6bf8cb6..24402ed 100644
--- a/notes/pin-mapping.txt
+++ b/notes/pin-mapping.txt
@@ -21,8 +21,12 @@ PC12 DISC
PD0 OSC_IN
PD1 OSC_OUT
+Alternate function remaps:
+
+None?
+
-------------------------------------------------------------------------------
-Pin STM32 PIN ADC Timer I2C UART SPI F/T
+Pin STM32 PIN ADC Timer I2C UART SPI 5v?
-------------------------------------------------------------------------------
D0 PA3 ADC3 TIM2_CH4 - USART2_RX - -
D1 PA2 ADC2 TIM2_CH3 - USART2_TX - -
@@ -90,7 +94,7 @@ PB9 DISC
PD0 OSC_IN
PD1 OSC_OUT
-Alternate function remaps (in ../wirish/boards.h BOARD_INIT):
+Alternate function remaps:
Pin Default Remap
--- ------- -----
@@ -101,7 +105,7 @@ PA14 JTCK GPIO
PA13 JTMS GPIO
-------------------------------------------------------------------------------
-Pin STM32 PIN ADC Timer I2C USART SPI F/T
+Pin STM32 PIN ADC Timer I2C USART SPI 5v?
-------------------------------------------------------------------------------
D0 PB11 - - I2C2_SDA USART3_RX - Y
D1 PB10 - - I2C2_SCL USART3_TX - Y
@@ -126,9 +130,6 @@ D19 PB3 - - - - - Y
D20 PA15 - - - - - Y
D21 PA14 - - - - - Y
D22 PA13 - - - - - Y
--------------------------------------------------------------------------------
-Pin STM32 PIN ADC Timer I2C USART SPI F/T
--------------------------------------------------------------------------------
# D23 is USBDP, but supports:
PA12 - - - - - Y
# D24 is USBDM, but supports:
@@ -145,3 +146,18 @@ D33 PB1 ADC9 TIM3_CH4 - - - -
TODO:
- [?] JTAG pins for GPIO
+
+============
+Maple Native
+============
+
+Reserved pins:
+
+TODO
+
+Alternate function remaps:
+
+TODO
+
+The pin map on Maple Native is in flux. However, the bank/port pin
+definitions are available in notes/native-pin-definitions.txt.
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-22 12:39:11 +0000