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Diffstat (limited to 'notes/pin-mapping.txt')
| -rw-r--r-- | notes/pin-mapping.txt | 101 |
1 files changed, 97 insertions, 4 deletions
diff --git a/notes/pin-mapping.txt b/notes/pin-mapping.txt index 67a675c..24402ed 100644 --- a/notes/pin-mapping.txt +++ b/notes/pin-mapping.txt @@ -1,3 +1,11 @@ +The pin maps in this document are included for informational purposes +only. The final arbiters of truth are the PIN_MAP definitions in +../wirish/boards.h and the STM32 datasheets. + +==== +Maple +==== + Reserved Pins: Function PA11 USBDM PA12 USBDP @@ -13,8 +21,12 @@ PC12 DISC PD0 OSC_IN PD1 OSC_OUT +Alternate function remaps: + +None? + ------------------------------------------------------------------------------- -Pin STM32 PIN ADC Timer I2C UART SPI F/T +Pin STM32 PIN ADC Timer I2C UART SPI 5v? ------------------------------------------------------------------------------- D0 PA3 ADC3 TIM2_CH4 - USART2_RX - - D1 PA2 ADC2 TIM2_CH3 - USART2_TX - - @@ -64,7 +76,88 @@ D37 PC8 - - - - - Y Note: former pin D38 (PC9) is now attached to the BUT button and there is a GND connection where D38 was. -todo: -adc pin check -jtag pins for gpio +TODO: +- [?] JTAG pins for GPIO + +========== +Maple Mini +========== + +Reserved pins: + +Pin Function +--- -------- +PA11 USBDM +PA12 USBDP +PB8 BUT button +PB9 DISC +PD0 OSC_IN +PD1 OSC_OUT + +Alternate function remaps: + +Pin Default Remap +--- ------- ----- +PB4 JNTRST GPIO +PB3 JTDO GPIO +PA15 JTDI GPIO +PA14 JTCK GPIO +PA13 JTMS GPIO + +------------------------------------------------------------------------------- +Pin STM32 PIN ADC Timer I2C USART SPI 5v? +------------------------------------------------------------------------------- +D0 PB11 - - I2C2_SDA USART3_RX - Y +D1 PB10 - - I2C2_SCL USART3_TX - Y +D2 PB2 - - - - - Y +D3 PB0 ADC8 TIM3_CH3 - - - - +D4 PA7 ADC7 TIM3_CH2 - - SPI1_MOSI - +D5 PA6 ADC6 TIM3_CH1 - - SPI1_MISO - +D6 PA5 ADC5 - - - SPI1_SCK - +D7 PA4 ADC4 - - USART2_CK SPI1_NSS - +D8 PA3 ADC3 TIM2_CH4 - USART2_RX - - +D9 PA2 ADC2 TIM2_CH3 - USART2_TX - - +D10 PA1 ADC1 TIM2_CH2 - USART2_RTS - - +D11 PA0 ADC0 TIM2_CH1_ETR - USART2_CTS - - +D12 PC15 - - - - - - +D13 PC14 - - - - - - +D14 PC13 - - - - - - +D15 PB7 - TIM4_CH2 I2C1_SDA - - Y +D16 PB6 - TIM4_CH1 I2C1_SCL - - Y +D17 PB5 - - I2C1_SMBA - - - +D18 PB4 - - - - - Y +D19 PB3 - - - - - Y +D20 PA15 - - - - - Y +D21 PA14 - - - - - Y +D22 PA13 - - - - - Y +# D23 is USBDP, but supports: + PA12 - - - - - Y +# D24 is USBDM, but supports: + PA11 - - - - - Y +D25 PA10 - TIM1_CH3 - USART1_RX - Y +D26 PA9 - TIM1_CH2 - USART1_TX - Y +D27 PA8 - TIM1_CH1 - USART1_CK - Y +D28 PB15 - TIM1_CH3N - - SPI2_MOSI Y +D29 PB14 - TIM1_CH2N - USART3_RTS SPI2_MISO Y +D30 PB13 - TIM1_CH1N - USART3_CTS SPI2_SCK Y +D31 PB12 - TIM1_BKIN I2C2_SMBAL USART3_CK SPI2_NSS Y +D32 PB8 0 TIM4_CH3 - - - Y +D33 PB1 ADC9 TIM3_CH4 - - - - + +TODO: +- [?] JTAG pins for GPIO + +============ +Maple Native +============ + +Reserved pins: + +TODO + +Alternate function remaps: + +TODO +The pin map on Maple Native is in flux. However, the bank/port pin +definitions are available in notes/native-pin-definitions.txt. |