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-rw-r--r--libmaple/adc.c42
-rw-r--r--libmaple/adc.h34
2 files changed, 42 insertions, 34 deletions
diff --git a/libmaple/adc.c b/libmaple/adc.c
index adadc63..17d63b8 100644
--- a/libmaple/adc.c
+++ b/libmaple/adc.c
@@ -38,26 +38,26 @@
#include "adc.h"
adc_dev adc1 = {
- .regs = (adc_reg_map*)ADC1_BASE,
+ .regs = ADC1_BASE,
.clk_id = RCC_ADC1
};
const adc_dev *ADC1 = &adc1;
adc_dev adc2 = {
- .regs = (adc_reg_map*)ADC2_BASE,
+ .regs = ADC2_BASE,
.clk_id = RCC_ADC2
};
const adc_dev *ADC2 = &adc2;
#if NR_ADCS >= 3
adc_dev adc3 = {
- .regs = (adc_reg_map*)ADC3_BASE,
+ .regs = ADC3_BASE,
.clk_id = RCC_ADC3
};
const adc_dev *ADC3 = &adc3;
#endif
-static void adc_calibrate(adc_reg_map *regs);
+static void adc_calibrate(const adc_dev *dev);
/**
* @brief Initialize an ADC peripheral. Only supports software triggered
@@ -72,39 +72,40 @@ void adc_init(const adc_dev *dev, uint32 flags) {
rcc_reset_dev(dev->clk_id);
/* Software triggers conversions, conversion on external events */
- adc_set_extsel(dev->regs, 7);
- adc_set_exttrig(dev->regs, 1);
+ adc_set_extsel(dev, 7);
+ adc_set_exttrig(dev, 1);
/* Enable the ADC */
- adc_enable(dev->regs);
+ adc_enable(dev);
/* Calibrate ADC */
- adc_calibrate(dev->regs);
+ adc_calibrate(dev);
}
/**
* @brief Set external event select for regular group
- * @param regs adc register map
+ * @param dev adc device
* @param trigger event to select. See ADC_CR2 EXTSEL[2:0] bits.
*/
-void adc_set_extsel(adc_reg_map *regs, uint8 trigger) {
- uint32 cr2 = regs->CR2;
+void adc_set_extsel(const adc_dev *dev, uint8 trigger) {
+ uint32 cr2 = dev->regs->CR2;
cr2 &= ~ADC_CR2_EXTSEL;
cr2 |= (trigger & 0x7) << 17;
- regs->CR2 = cr2;
+ dev->regs->CR2 = cr2;
}
/**
* @brief Turn the given sample rate into values for ADC_SMPRx. Don't
* call this during conversion.
- * @param regs adc register map
+ * @param dev adc device
* @param smp_rate sample rate to set
* @see adc_smp_rate
*/
-void adc_set_sample_rate(adc_reg_map *regs, adc_smp_rate smp_rate) {
+void adc_set_sample_rate(const adc_dev *dev, adc_smp_rate smp_rate) {
uint32 adc_smpr1_val = 0, adc_smpr2_val = 0;
int i;
+
for (i = 0; i < 10; i++) {
if (i < 8) {
/* ADC_SMPR1 determines sample time for channels [10,17] */
@@ -113,17 +114,18 @@ void adc_set_sample_rate(adc_reg_map *regs, adc_smp_rate smp_rate) {
/* ADC_SMPR2 determines sample time for channels [0,9] */
adc_smpr2_val |= smp_rate << (i * 3);
}
- regs->SMPR1 = adc_smpr1_val;
- regs->SMPR2 = adc_smpr2_val;
+
+ dev->regs->SMPR1 = adc_smpr1_val;
+ dev->regs->SMPR2 = adc_smpr2_val;
}
/**
* @brief Calibrate an ADC peripheral
- * @param regs adc register map
+ * @param dev adc device
*/
-static void adc_calibrate(adc_reg_map *regs) {
- __io uint32 *rstcal_bit = (__io uint32*)BITBAND_PERI(&(regs->CR2), 3);
- __io uint32 *cal_bit = (__io uint32*)BITBAND_PERI(&(regs->CR2), 2);
+static void adc_calibrate(const adc_dev *dev) {
+ __io uint32 *rstcal_bit = (__io uint32*)BITBAND_PERI(&(dev->regs->CR2), 3);
+ __io uint32 *cal_bit = (__io uint32*)BITBAND_PERI(&(dev->regs->CR2), 2);
*rstcal_bit = 1;
while (*rstcal_bit)
diff --git a/libmaple/adc.h b/libmaple/adc.h
index 4997d14..ab6e643 100644
--- a/libmaple/adc.h
+++ b/libmaple/adc.h
@@ -75,9 +75,9 @@ extern const adc_dev *ADC3;
/*
* ADC peripheral base addresses
*/
-#define ADC1_BASE 0x40012400
-#define ADC2_BASE 0x40012800
-#define ADC3_BASE 0x40013C00
+#define ADC1_BASE ((adc_reg_map*)0x40012400)
+#define ADC2_BASE ((adc_reg_map*)0x40012800)
+#define ADC3_BASE ((adc_reg_map*)0x40013C00)
/*
* Register bit definitions
@@ -120,7 +120,7 @@ extern const adc_dev *ADC3;
#define ADC_CR2_TSEREFE BIT(23)
void adc_init(const adc_dev *dev, uint32 flags);
-void adc_set_extsel(adc_reg_map *regs, uint8 trigger);
+void adc_set_extsel(const adc_dev *dev, uint8 trigger);
/** ADC per-sample conversion times, in ADC clock cycles */
typedef enum {
@@ -134,7 +134,7 @@ typedef enum {
ADC_SMPR_239_5 ///< 239.5 ADC cycles
} adc_smp_rate;
-void adc_set_sample_rate(adc_reg_map *regs, adc_smp_rate smp_rate);
+void adc_set_sample_rate(const adc_dev *dev, adc_smp_rate smp_rate);
/**
* @brief Perform a single synchronous software triggered conversion on a
@@ -143,7 +143,9 @@ void adc_set_sample_rate(adc_reg_map *regs, adc_smp_rate smp_rate);
* @param channel channel to convert
* @return conversion result
*/
-static inline uint32 adc_read(adc_reg_map *regs, uint8 channel) {
+static inline uint32 adc_read(const adc_dev *dev, uint8 channel) {
+ adc_reg_map *regs = dev->regs;
+
/* Set target channel */
regs->SQR3 = channel;
@@ -159,34 +161,38 @@ static inline uint32 adc_read(adc_reg_map *regs, uint8 channel) {
/**
* @brief Set external trigger conversion mode event for regular channels
- * @param regs adc register map
+ * @param dev adc device
* @param enable if 1, conversion on external events is enabled, 0 to disable
*/
-static inline void adc_set_exttrig(adc_reg_map *regs, uint8 enable) {
- __write(BITBAND_PERI(&(regs->CR2), 20), enable);
+static inline void adc_set_exttrig(const adc_dev *dev, uint8 enable) {
+ __write(BITBAND_PERI(&(dev->regs->CR2), 20), enable);
}
/**
* @brief Enable an adc peripheral
* @param regs register map of peripheral to enable
*/
-static inline void adc_enable(adc_reg_map *regs) {
- __write(BITBAND_PERI(&(regs->CR2), 0), 1);
+static inline void adc_enable(const adc_dev *dev) {
+ __write(BITBAND_PERI(&(dev->regs->CR2), 0), 1);
}
/**
* @brief Disable an adc peripheral
* @param regs register map of peripheral to disable
*/
-static inline void adc_disable(adc_reg_map *regs) {
- __write(BITBAND_PERI(&(regs->CR2), 0), 0);
+static inline void adc_disable(const adc_dev *dev) {
+ __write(BITBAND_PERI(&(dev->regs->CR2), 0), 0);
}
/**
* @brief Disable all ADCs
*/
static inline void adc_disable_all(void) {
- adc_disable(ADC1->regs);
+ adc_disable(ADC1);
+ adc_disable(ADC2);
+#if NR_ADCS >= 3
+ adc_disable(ADC3);
+#endif
}
#ifdef __cplusplus
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-29 05:08:01 +0000