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-rw-r--r--libmaple/timers.c4
-rw-r--r--libmaple/timers.h54
2 files changed, 27 insertions, 31 deletions
diff --git a/libmaple/timers.c b/libmaple/timers.c
index 5b97e20..334ec0b 100644
--- a/libmaple/timers.c
+++ b/libmaple/timers.c
@@ -103,19 +103,15 @@ void timer_init(uint8 timer_num, uint16 prescale) {
* we'll worry about that later. */
timer->CCR1 = 0x8FFF; // PWM start value
timer->CCMR1 |= 0x68; // PWM mode 1, enable preload register.
- timer->CCER |= 0x001; // enable ch
timer->CCR2 = 0x8FFF; // PWM start value
timer->CCMR1 |= (0x68 << 8);// PWM mode 1, enable preload register.
- timer->CCER |= 0x010; // enable ch
timer->CCR3 = 0x8FFF; // PWM start value
timer->CCMR2 |= 0x68; // PWM mode 1, enable preload register.
- timer->CCER |= 0x100; // enable ch
timer->CCR4 = 0x8FFF; // PWM start value
timer->CCMR2 |= (0x68 << 8);// PWM mode 1, enable preload register.
- timer->CCER |= 0x1000; // enable ch
/* Advanced timer? */
if (is_advanced) {
diff --git a/libmaple/timers.h b/libmaple/timers.h
index cbdf088..ba8245c 100644
--- a/libmaple/timers.h
+++ b/libmaple/timers.h
@@ -98,39 +98,39 @@ typedef volatile uint32* TimerCCR;
#define TIMER_CCR(NUM,CHAN) TIMER ## NUM ## _CH ## CHAN ## _CRR
-#define TIMER1_CH1_CCR (TimerCCR)(TIMER1_BASE + 0x34)
-#define TIMER1_CH2_CCR (TimerCCR)(TIMER1_BASE + 0x38)
-#define TIMER1_CH3_CCR (TimerCCR)(TIMER1_BASE + 0x3C)
-#define TIMER1_CH4_CCR (TimerCCR)(TIMER1_BASE + 0x40)
-
-#define TIMER2_CH1_CCR (TimerCCR)(TIMER2_BASE + 0x34)
-#define TIMER2_CH2_CCR (TimerCCR)(TIMER2_BASE + 0x38)
-#define TIMER2_CH3_CCR (TimerCCR)(TIMER2_BASE + 0x3C)
-#define TIMER2_CH4_CCR (TimerCCR)(TIMER2_BASE + 0x40)
-
-#define TIMER3_CH1_CCR (TimerCCR)(TIMER3_BASE + 0x34)
-#define TIMER3_CH2_CCR (TimerCCR)(TIMER3_BASE + 0x38)
-#define TIMER3_CH3_CCR (TimerCCR)(TIMER3_BASE + 0x3C)
-#define TIMER3_CH4_CCR (TimerCCR)(TIMER3_BASE + 0x40)
-
-#define TIMER4_CH1_CCR (TimerCCR)(TIMER4_BASE + 0x34)
-#define TIMER4_CH2_CCR (TimerCCR)(TIMER4_BASE + 0x38)
-#define TIMER4_CH3_CCR (TimerCCR)(TIMER4_BASE + 0x3C)
-#define TIMER4_CH4_CCR (TimerCCR)(TIMER4_BASE + 0x40)
+#define TIMER1_CH1_CCR TIMER1_BASE + 0x34
+#define TIMER1_CH2_CCR TIMER1_BASE + 0x38
+#define TIMER1_CH3_CCR TIMER1_BASE + 0x3C
+#define TIMER1_CH4_CCR TIMER1_BASE + 0x40
+
+#define TIMER2_CH1_CCR TIMER2_BASE + 0x34
+#define TIMER2_CH2_CCR TIMER2_BASE + 0x38
+#define TIMER2_CH3_CCR TIMER2_BASE + 0x3C
+#define TIMER2_CH4_CCR TIMER2_BASE + 0x40
+
+#define TIMER3_CH1_CCR TIMER3_BASE + 0x34
+#define TIMER3_CH2_CCR TIMER3_BASE + 0x38
+#define TIMER3_CH3_CCR TIMER3_BASE + 0x3C
+#define TIMER3_CH4_CCR TIMER3_BASE + 0x40
+
+#define TIMER4_CH1_CCR TIMER4_BASE + 0x34
+#define TIMER4_CH2_CCR TIMER4_BASE + 0x38
+#define TIMER4_CH3_CCR TIMER4_BASE + 0x3C
+#define TIMER4_CH4_CCR TIMER4_BASE + 0x40
/* Timer5 and Timer8 are in high-density devices only (such as Maple
Native). Timer6 and Timer7 in these devices have no output compare
pins. */
-#define TIMER5_CH1_CCR (TimerCCR)(TIMER5_BASE + 0x34)
-#define TIMER5_CH2_CCR (TimerCCR)(TIMER5_BASE + 0x38)
-#define TIMER5_CH3_CCR (TimerCCR)(TIMER5_BASE + 0x3C)
-#define TIMER5_CH4_CCR (TimerCCR)(TIMER5_BASE + 0x40)
+#define TIMER5_CH1_CCR TIMER5_BASE + 0x34
+#define TIMER5_CH2_CCR TIMER5_BASE + 0x38
+#define TIMER5_CH3_CCR TIMER5_BASE + 0x3C
+#define TIMER5_CH4_CCR TIMER5_BASE + 0x40
-#define TIMER8_CH1_CCR (TimerCCR)(TIMER8_BASE + 0x34)
-#define TIMER8_CH2_CCR (TimerCCR)(TIMER8_BASE + 0x38)
-#define TIMER8_CH3_CCR (TimerCCR)(TIMER8_BASE + 0x3C)
-#define TIMER8_CH4_CCR (TimerCCR)(TIMER8_BASE + 0x40)
+#define TIMER8_CH1_CCR TIMER8_BASE + 0x34
+#define TIMER8_CH2_CCR TIMER8_BASE + 0x38
+#define TIMER8_CH3_CCR TIMER8_BASE + 0x3C
+#define TIMER8_CH4_CCR TIMER8_BASE + 0x40
#define TIMER_DISABLED 0
#define TIMER_PWM 1