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-rw-r--r--libmaple/dac.c67
-rw-r--r--libmaple/dac.h108
-rw-r--r--libmaple/fsmc.c128
-rw-r--r--libmaple/fsmc.h86
-rw-r--r--libmaple/libmaple.h18
-rw-r--r--libmaple/rcc.c4
-rw-r--r--libmaple/rcc.h2
-rw-r--r--libmaple/rules.mk2
-rw-r--r--libmaple/usb/usb.c3
-rw-r--r--libmaple/usb/usb_config.h4
-rw-r--r--libmaple/util.c3
11 files changed, 414 insertions, 11 deletions
diff --git a/libmaple/dac.c b/libmaple/dac.c
new file mode 100644
index 0000000..ffc34f8
--- /dev/null
+++ b/libmaple/dac.c
@@ -0,0 +1,67 @@
+
+/* *****************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 Bryan Newbold.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ * ****************************************************************************/
+
+#include "libmaple.h"
+#include "rcc.h"
+#include "gpio.h"
+#include "dac.h"
+
+// Only one, so global to this file
+DAC_Map *dac = (DAC_Map*)(DAC_BASE);
+
+// This numbering follows the registers (1-indexed)
+#define DAC_CHA 1
+#define DAC_CHB 2
+
+// Sets up the DAC peripheral
+void dac_init(void) {
+
+ // First turn on the clock
+ rcc_clk_enable(RCC_DAC);
+
+ // Then setup ANALOG mode on PA4 and PA5
+ gpio_set_mode(GPIOA_BASE, 4, CNF_INPUT_ANALOG);
+ gpio_set_mode(GPIOA_BASE, 5, CNF_INPUT_ANALOG);
+
+ // Then do register stuff.
+ // Default does no triggering, and buffered output, so all good.
+ dac->CR |= DAC_CR_EN1;
+ dac->CR |= DAC_CR_EN2;
+
+}
+
+void dac_write(uint8 chan, uint16 val) {
+
+ switch(chan) {
+ case DAC_CHA:
+ dac->DHR12R1 = 0x0FFF & val;
+ break;
+ case DAC_CHB:
+ dac->DHR12R2 = 0x0FFF & val;
+ break;
+ default:
+ ASSERT(0); // Shouldn't get here
+ }
+}
diff --git a/libmaple/dac.h b/libmaple/dac.h
new file mode 100644
index 0000000..de1fd3f
--- /dev/null
+++ b/libmaple/dac.h
@@ -0,0 +1,108 @@
+/* *****************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 Bryan Newbold.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ * ****************************************************************************/
+
+/*
+ * See ../notes/dac.txt for more info
+ */
+
+#ifndef _DAC_H_
+#define _DAC_H_
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+#define DAC_BASE 0x40007400
+
+typedef struct {
+ volatile uint32 CR;
+ volatile uint32 SWTRIGR;
+ volatile uint32 DHR12R1;
+ volatile uint32 DHR12L1;
+ volatile uint32 DHR8R1;
+ volatile uint32 DHR12R2;
+ volatile uint32 DHR12L2;
+ volatile uint32 DHR8R2;
+ volatile uint32 DHR12RD;
+ volatile uint32 DHR12LD;
+ volatile uint32 DHR8RD;
+ volatile uint32 DOR1;
+ volatile uint32 DOR2;
+} DAC_Map;
+
+
+// And here are the register bit ranges
+#define DAC_CR_EN1 BIT(0)
+#define DAC_CR_BOFF1 BIT(1)
+#define DAC_CR_TEN1 BIT(2)
+#define DAC_CR_TSEL1 (BIT(3) | BIT(4) | BIT(5))
+#define DAC_CR_WAVE1 (BIT(6) | BIT(7))
+#define DAC_CR_MAMP1 (BIT(8) | BIT(9) | BIT(10) | BIT(11))
+#define DAC_CR_DMAEN1 BIT(12)
+#define DAC_CR_EN2 BIT(16)
+#define DAC_CR_BOFF2 BIT(17)
+#define DAC_CR_TEN2 BIT(18)
+#define DAC_CR_TSEL2 (BIT(19) | BIT(20) | BIT(21))
+#define DAC_CR_WAVE2 (BIT(22) | BIT(23))
+#define DAC_CR_MAMP2 (BIT(24) | BIT(25) | BIT(26) | BIT(27))
+#define DAC_CR_DMAEN2 BIT(28)
+
+#define DAC_SWTRIGR_SWTRIG1 BIT(0)
+#define DAC_SWTRIGR_SWTRIG2 BIT(1)
+
+#define DAC_DHR12R1_DACC1DHR 0x00000FFF
+
+#define DAC_DHR12L1_DACC1DHR 0x0000FFF0
+
+#define DAC_DHR8R1_DACC1DHR 0x000000FF
+
+#define DAC_DHR12R2_DACC2DHR 0x00000FFF
+
+#define DAC_DHR12L2_DACC2DHR 0x0000FFF0
+
+#define DAC_DHR8R2_DACC2DHR 0x000000FF
+
+#define DAC_DHR12RD_DACC1DHR 0x00000FFF
+#define DAC_DHR12RD_DACC2DHR 0x0FFF0000
+
+#define DAC_DHR12LD_DACC1DHR 0x0000FFF0
+#define DAC_DHR12LD_DACC2DHR 0xFFF00000
+
+#define DAC_DHR8RD_DACC1DHR 0x000000FF
+#define DAC_DHR8RD_DACC2DHR 0x0000FF00
+
+#define DAC_DOR1 0x00000FFF
+
+#define DAC_DOR2 0x00000FFF
+
+
+void dac_init(void);
+void dac_write(uint8 chan, uint16 val);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+
+#endif
diff --git a/libmaple/fsmc.c b/libmaple/fsmc.c
new file mode 100644
index 0000000..502b7b4
--- /dev/null
+++ b/libmaple/fsmc.c
@@ -0,0 +1,128 @@
+
+/* *****************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 Bryan Newbold.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ * ****************************************************************************/
+
+#include "libmaple.h"
+#include "rcc.h"
+#include "gpio.h"
+#include "fsmc.h"
+
+// These values determined for a particular SRAM chip by following the
+// calculations in the ST FSMC application note.
+#define FSMC_ADDSET 0x0
+#define FSMC_DATAST 0x3
+
+// Sets up the FSMC peripheral to use the SRAM chip on the maple native as an
+// external segment of system memory space.
+// This implementation is for the IS62WV51216BLL 8mbit chip (55ns timing)
+void fsmc_native_sram_init(void) {
+ FSMC_Bank *bank;
+
+ // First we setup all the GPIO pins.
+ // Data lines...
+ gpio_set_mode(GPIOD_BASE, 0, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 1, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 8, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 9, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 10, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 14, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 15, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 7, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 8, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 9, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 10, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 11, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 12, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 13, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 14, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOE_BASE, 15, MODE_AF_OUTPUT_PP);
+ // Address lines...
+ gpio_set_mode(GPIOD_BASE, 11, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 12, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOD_BASE, 13, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 0, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 1, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 2, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 3, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 4, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 5, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 12, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 13, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 14, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOF_BASE, 15, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOG_BASE, 0, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOG_BASE, 1, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOG_BASE, 2, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOG_BASE, 3, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOG_BASE, 4, MODE_AF_OUTPUT_PP);
+ gpio_set_mode(GPIOG_BASE, 5, MODE_AF_OUTPUT_PP);
+ // And control lines...
+ gpio_set_mode(GPIOD_BASE, 4, MODE_AF_OUTPUT_PP); // NOE
+ gpio_set_mode(GPIOD_BASE, 5, MODE_AF_OUTPUT_PP); // NWE
+
+ gpio_set_mode(GPIOD_BASE, 7, MODE_AF_OUTPUT_PP); // NE1
+ gpio_set_mode(GPIOG_BASE, 9, MODE_AF_OUTPUT_PP); // NE2
+ gpio_set_mode(GPIOG_BASE, 10, MODE_AF_OUTPUT_PP); // NE3
+ gpio_set_mode(GPIOG_BASE, 12, MODE_AF_OUTPUT_PP); // NE4
+
+ gpio_set_mode(GPIOE_BASE, 0, MODE_AF_OUTPUT_PP); // NBL0
+ gpio_set_mode(GPIOE_BASE, 1, MODE_AF_OUTPUT_PP); // NBL1
+
+ // Next enable the clock
+ rcc_clk_enable(RCC_FSMC);
+
+ // Then we configure channel 1 the FSMC SRAM peripheral
+ // (all SRAM channels are in "Bank 1" of the FSMC)
+ bank = (FSMC_Bank*)(FSMC1_BASE);
+
+ // Everything else is cleared (BCR1)
+ bank->BCR = 0x0000;
+
+ // Memory type is SRAM
+ bank->BCR &= ~(FSMC_BCR_MTYP); // '00'
+
+ // Databus width is 16bits
+ bank->BCR &= ~(FSMC_BCR_MWID);
+ bank->BCR |= 0x1 << 4; // '01'
+
+ // Memory is nonmultiplexed
+ bank->BCR &= ~(FSMC_BCR_MUXEN); // '0'
+
+ // Need write enable to write to the chip
+ bank->BCR |= FSMC_BCR_WREN;
+
+ // Set ADDSET
+ bank->BTR &= ~(FSMC_BTR_ADDSET);
+ bank->BTR |= (FSMC_BTR_ADDSET | FSMC_ADDSET);
+
+ // Set DATAST
+ bank->BTR &= ~(FSMC_BTR_DATAST);
+ bank->BTR |= (FSMC_BTR_DATAST | (FSMC_DATAST << 8));
+
+ // Enable channel 1
+ bank->BCR |= FSMC_BCR_MBKEN; // '1'
+
+ // FSMC_BWTR3 not used for this simple configuration.
+}
+
diff --git a/libmaple/fsmc.h b/libmaple/fsmc.h
new file mode 100644
index 0000000..0ac4084
--- /dev/null
+++ b/libmaple/fsmc.h
@@ -0,0 +1,86 @@
+/* *****************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2010 Bryan Newbold.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ * ****************************************************************************/
+
+/*
+ * See ../notes/fsmc.txt for more info
+ */
+
+#ifndef _FSMC_H_
+#define _FSMC_H_
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+// There are 4 FSMC chip-select devices; here are the SRAM-specific registers
+// for each
+
+#define FSMC1_BASE 0xA0000000
+#define FSMC2_BASE 0xA0000008
+#define FSMC3_BASE 0xA0000010
+#define FSMC4_BASE 0xA0000018
+
+typedef struct {
+ volatile uint32 BCR;
+ volatile uint32 BTR;
+ //uint32 pad[62]; // double check this?
+ //__io uint32 BWTR;
+} FSMC_Bank;
+
+// And here are the register bit ranges
+#define FSMC_BCR_MBKEN 0b00000000000000000000000000000001
+#define FSMC_BCR_MUXEN 0b00000000000000000000000000000010
+#define FSMC_BCR_MTYP 0b00000000000000000000000000001100
+#define FSMC_BCR_MWID 0b00000000000000000000000000110000
+#define FSMC_BCR_FACCEN 0b00000000000000000000000001000000
+#define FSMC_BCR_BURSTEN 0b00000000000000000000000100000000
+#define FSMC_BCR_WAITPOL 0b00000000000000000000001000000000
+#define FSMC_BCR_WRAPMOD 0b00000000000000000000010000000000
+#define FSMC_BCR_WAITCFG 0b00000000000000000000100000000000
+#define FSMC_BCR_WREN 0b00000000000000000001000000000000
+#define FSMC_BCR_WAITEN 0b00000000000000000010000000000000
+#define FSMC_BCR_EXTMOD 0b00000000000000000100000000000000
+#define FSMC_BCR_CBURSTRW 0b00000000000010000000000000000000
+#define FSMC_BTR_ADDSET 0b00000000000000000000000000001111
+#define FSMC_BTR_ADDHOLD 0b00000000000000000000000011110000
+#define FSMC_BTR_DATAST 0b00000000000000001111111100000000
+#define FSMC_BTR_BUSTURN 0b00000000000011110000000000000000
+#define FSMC_BTR_CLKDIV 0b00000000111100000000000000000000
+#define FSMC_BTR_DATALAT 0b00001111000000000000000000000000
+#define FSMC_BTR_ACCMOD 0b00110000000000000000000000000000
+#define FSMC_BWTR_ADDSET 0b00000000000000000000000000001111
+#define FSMC_BWTR_ADDHLD 0b00000000000000000000000011110000
+#define FSMC_BWTR_DATAST 0b00000000000000001111111100000000
+#define FSMC_BWTR_CLKDIV 0b00000000111100000000000000000000
+#define FSMC_BWTR_DATLAT 0b00001111000000000000000000000000
+#define FSMC_BWTR_ACCMOD 0b00110000000000000000000000000000
+
+void fsmc_native_sram_init(void);
+
+#ifdef __cplusplus
+} // extern "C"
+#endif
+
+
+#endif
diff --git a/libmaple/libmaple.h b/libmaple/libmaple.h
index a481e63..8e072c3 100644
--- a/libmaple/libmaple.h
+++ b/libmaple/libmaple.h
@@ -49,7 +49,10 @@
#define NR_TIMERS 4
// Has an FSMC bus?
- //#define HAS_FSMC // Maple does not
+ #define NR_FSMC 1
+
+ // Has an FSMC bus?
+ #define NR_DAC_PINS 2
// USB Identifier numbers
// Descriptor strings must be modified by hand in usb/descriptors.c for now
@@ -95,7 +98,10 @@
#define NR_TIMERS 8
// Has an FSMC bus?
- #define HAS_FSMC
+ #define NR_FSMC 1
+
+ // Has an FSMC bus?
+ #define NR_DAC_PINS 2
// USB Identifier numbers
// Descriptor strings must be modified by hand in usb/descriptors.c for now
@@ -110,11 +116,11 @@
#define STACK_TOP 0x20000800
// Debug port settings (from ASSERT)
- #define ERROR_LED_PORT GPIOA_BASE
- #define ERROR_LED_PIN 5
- #define ERROR_USART_NUM 2
+ #define ERROR_LED_PORT GPIOC_BASE
+ #define ERROR_LED_PIN 15
+ #define ERROR_USART_NUM 1
#define ERROR_USART_BAUD 9600
- #define ERROR_TX_PIN 2
+ #define ERROR_TX_PIN 10
#define ERROR_TX_PORT GPIOA_BASE
// Just in case, most boards have at least some memory
diff --git a/libmaple/rcc.c b/libmaple/rcc.c
index 848f59e..9bd2663 100644
--- a/libmaple/rcc.c
+++ b/libmaple/rcc.c
@@ -66,9 +66,11 @@ static const struct rcc_dev_info rcc_dev_table[] = {
[RCC_TIMER5] = { .clk_domain = APB1, .line_num = 3 }, // High-density devices only
[RCC_TIMER6] = { .clk_domain = APB1, .line_num = 4 }, // High-density devices only
[RCC_TIMER7] = { .clk_domain = APB1, .line_num = 5 }, // High-density devices only
- [RCC_TIMER8] = { .clk_domain = APB2, .line_num = 13 }, // High-density devices only
+ [RCC_TIMER8] = { .clk_domain = APB2, .line_num = 13 }, // High-density devices only
[RCC_SPI1] = { .clk_domain = APB2, .line_num = 12 },
[RCC_SPI2] = { .clk_domain = APB1, .line_num = 14 },
+ [RCC_FSMC] = { .clk_domain = AHB, .line_num = 8 }, // High-density devices only
+ [RCC_DAC] = { .clk_domain = APB1, .line_num = 9 }, // High-density devices only
};
/**
diff --git a/libmaple/rcc.h b/libmaple/rcc.h
index 3f55b4f..3651945 100644
--- a/libmaple/rcc.h
+++ b/libmaple/rcc.h
@@ -166,6 +166,8 @@ enum {
RCC_TIMER8, // High-density devices only (Maple Native)
RCC_SPI1,
RCC_SPI2,
+ RCC_FSMC, // High-density devices only (Maple Native)
+ RCC_DAC, // High-density devices only (Maple Native)
};
diff --git a/libmaple/rules.mk b/libmaple/rules.mk
index 60673fe..8428277 100644
--- a/libmaple/rules.mk
+++ b/libmaple/rules.mk
@@ -25,6 +25,8 @@ cSRCS_$(d) := systick.c \
rcc.c \
flash.c \
spi.c \
+ fsmc.c \
+ dac.c \
usb/usb.c \
usb/usb_callbacks.c \
usb/usb_hardware.c \
diff --git a/libmaple/usb/usb.c b/libmaple/usb/usb.c
index 23cde00..026d7f0 100644
--- a/libmaple/usb/usb.c
+++ b/libmaple/usb/usb.c
@@ -118,7 +118,8 @@ void setupUSB (void) {
pRCC->APB1ENR |= 0x00800000;
/* initialize the usb application */
- gpio_write_bit(USB_DISC_BANK,USB_DISC_PIN,0); /* present ourselves to the host */
+ gpio_write_bit(USB_DISC_BANK, USB_DISC_PIN, 0); /* present ourselves to the host */
+
USB_Init(); /* low level init routine provided by st lib */
}
diff --git a/libmaple/usb/usb_config.h b/libmaple/usb/usb_config.h
index 3aa01d5..27294dc 100644
--- a/libmaple/usb/usb_config.h
+++ b/libmaple/usb/usb_config.h
@@ -40,8 +40,8 @@
CNTR_ESOFM | \
CNTR_RESETM )
-#define USB_DISC_BANK GPIOC_BASE
-#define USB_DISC_PIN 12
+#define USB_DISC_BANK GPIOB_BASE
+#define USB_DISC_PIN 8
#define F_SUSPEND_ENABLED 1
diff --git a/libmaple/util.c b/libmaple/util.c
index 08e29fc..61beab8 100644
--- a/libmaple/util.c
+++ b/libmaple/util.c
@@ -67,7 +67,8 @@ void _fail(const char* file, int line, const char* exp) {
usart_putstr(ERROR_USART_NUM, ": ");
usart_putudec(ERROR_USART_NUM, line);
usart_putc(ERROR_USART_NUM, '\n');
-
+ usart_putc(ERROR_USART_NUM, '\r');
+
/* Turn on the error LED */
gpio_set_mode(ERROR_LED_PORT, ERROR_LED_PIN, GPIO_MODE_OUTPUT_PP);
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-06 06:35:21 +0000