2 files changed, 30 insertions, 0 deletions
diff --git a/libmaple/stm32f1/include/series/rcc.h b/libmaple/stm32f1/include/series/rcc.h
index 68a79d4..b72c5cf 100644
--- a/libmaple/stm32f1/include/series/rcc.h
+++ b/libmaple/stm32f1/include/series/rcc.h
@@ -576,6 +576,17 @@ void rcc_clk_init(rcc_sysclk_src sysclk_src,
                   rcc_pllsrc pll_src,
                   rcc_pll_multiplier pll_mul);
 
+/**
+ * @brief STM32F1-specific PLL configuration values.
+ *
+ * Use this as the "data" field in a struct rcc_pll_cfg.
+ *
+ * @see struct rcc_pll_cfg.
+ */
+typedef struct stm32f1_rcc_pll_data {
+     rcc_pll_multiplier pll_mul; /**< PLL multiplication factor. */
+} stm32f1_rcc_pll_data;
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/libmaple/stm32f1/rcc.c b/libmaple/stm32f1/rcc.c
index 2d31482..a9c9c3a 100644
--- a/libmaple/stm32f1/rcc.c
+++ b/libmaple/stm32f1/rcc.c
@@ -127,6 +127,25 @@ void rcc_clk_init(rcc_sysclk_src sysclk_src,
 }
 
 /**
+ * @brief Configure the main PLL.
+ *
+ * You may only call this function while the PLL is disabled.
+ *
+ * @param pll_cfg Desired PLL configuration. The data field must point
+ *                to a valid struct stm32f1_rcc_pll_data.
+ */
+void rcc_configure_pll(rcc_pll_cfg *pll_cfg) {
+    stm32f1_rcc_pll_data *data = pll_cfg->data;
+    rcc_pll_multiplier pll_mul = data->pll_mul;
+    uint32 cfgr;
+
+    cfgr = RCC_BASE->CFGR;
+    cfgr &= ~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL);
+    cfgr |= pll_cfg->pllsrc | pll_mul;
+    RCC_BASE->CFGR = cfgr;
+}
+
+/**
  * @brief Turn on the clock line on a peripheral
  * @param id Clock ID of the peripheral to turn on.
  */