diff options
Diffstat (limited to 'libmaple/exti.h')
| -rw-r--r-- | libmaple/exti.h | 77 |
1 files changed, 42 insertions, 35 deletions
diff --git a/libmaple/exti.h b/libmaple/exti.h index 97cb4aa..89cd986 100644 --- a/libmaple/exti.h +++ b/libmaple/exti.h @@ -1,4 +1,4 @@ -/* ***************************************************************************** +/****************************************************************************** * The MIT License * * Copyright (c) 2010 Perry Hung. @@ -20,7 +20,7 @@ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN * THE SOFTWARE. - * ****************************************************************************/ + *****************************************************************************/ /** @@ -34,47 +34,54 @@ /* Notes: * - * To generate the interrupt, the interrupt line should be configured and - * enabled. This is done by programming the two trigger registers with the - * desired edge detection and by enabling the interrupt request by writing a - * '1' to the corresponding bit in the interrupt mask register. When the - * selected edge occurs on the external interrupt line, an interrupt request is - * generated. The pending bit corresponding to the interrupt line is also set. - * This request is reset by writing a '1' in the pending register. + * To generate the interrupt, the interrupt line should be configured + * and enabled. This is done by programming the two trigger registers + * with the desired edge detection and by enabling the interrupt + * request by writing a '1' to the corresponding bit in the interrupt + * mask register. When the selected edge occurs on the external + * interrupt line, an interrupt request is generated. The pending bit + * corresponding to the interrupt line is also set. This request is + * reset by writing a '1' in the pending register. * * Hardware interrupt selection: - * To configure the 20 lines as interrupt sources, use the following procedure: - * 1) Configure AFIO_EXTIICR[y] to select the source input for EXTIx external - * interrupt + * + * To configure the 20 lines as interrupt sources, use the following + * procedure: + * + * 1) Configure AFIO_EXTIICR[y] to select the source input for EXTIx + * external interrupt * 2) Configure the mask bits of the 20 interrupt lines (EXTI_IMR) - * 3) Configure the trigger selection bits of the interrupt lines (EXTI_RTSR and EXTI_FTSR) - * 4) Configure the enable and mask bits that control the NVIC_IRQ channel mapped to the External - * Interrupt Controller (EXTI) so that an inerrupt coming from one of the 20 lines - * can be correctly acknowledged. + * 3) Configure the trigger selection bits of the interrupt lines + * (EXTI_RTSR and EXTI_FTSR) + * 4) Configure the enable and mask bits that control the NVIC_IRQ + * channel mapped to the External + * + * Interrupt Controller (EXTI) so that an inerrupt coming from one of + * the 20 lines can be correctly acknowledged. * * AFIO clock must be on. * - * RM0008, page 107: "PD0, PD1 cannot be used for external interrupt/event generation - * on 36, 48, 64-bin packages." + * RM0008, page 107: "PD0, PD1 cannot be used for external + * interrupt/event generation on 36, 48, 64-bin packages." * * ---------------------------------------------------------------------------- * Pin to EXTI Line Mappings: - * EXTI0 EXTI1 EXTI2 EXTI3 EXTI4 - * ---------------------------------------------------------------------------- - * D2/PA0 D3/PA1 D1/PA2 D0/A6/PA3 D10/A10/PA4 - * D26/EXT7/PB0 D27/EXT8/PB1 D16/A2/PC2 D17/A3/PC3 D18/A4/PC4 + * EXTI0 EXTI1 EXTI2 EXTI3 EXTI4 + * -------------------------------------------------------------------------- + * D2/PA0 D3/PA1 D1/PA2 D0/A6/PA3 D10/A10/PA4 + * D26/EXT7/PB0 D27/EXT8/PB1 D16/A2/PC2 D17/A3/PC3 D18/A4/PC4 * D14/A0/PC0 D15/PC1 D25/EXT5/PD2 * - * EXTI5 EXTI6 EXTI7 EXTI8 EXTI9 + * EXTI5 EXTI6 EXTI7 EXTI8 EXTI9 * ---------------------------------------------------------------------------- - * D13/A13/PA5 D12/A12/PA6 D11/A11/PA7 D6/PA8 D7/PA9 - * D4/PB5 D5/PB6 D9/PB7 D38/PB8 D23/EXT4/PB9 - * D19/A5/PC5 D34/EXTI15/PC6 D35/EXT16/PC7 D36/PC8 D37/EXT18/PC9 + * D13/A13/PA5 D12/A12/PA6 D11/A11/PA7 D6/PA8 D7/PA9 + * D4/PB5 D5/PB6 D9/PB7 D38/PB8 D23/EXT4/PB9 + * D19/A5/PC5 D34/EXTI15/PC6 D35/EXT16/PC7 D36/PC8 D37/EXT18/PC9 * - * EXTI10 EXTI11 EXTI12 EXTI13 EXTI14 + * EXTI10 EXTI11 EXTI12 EXTI13 EXTI14 * ---------------------------------------------------------------------------- - * D8/PA10 D29/EXT10/PB11 D30/EXTI1/PB12 D31/EXTI12/PB13 D32/EXT13/PB14 - * D28/PB10 D20/EXTI1/PC13 D21/EXT2/PC14 + * D8/PA10 D29/EXT10/PB11 D30/EXTI1/PB12 D31/EXTI12/PB13 D32/EXT13/PB14 + * D28/PB10 D20/EXTI1/PC13 D21/EXT2/PC14 * D25/PC10 * * EXTI15 @@ -104,12 +111,12 @@ #define EXTI_FALLING 1 #define EXTI_RISING_FALLING 2 -#define EXTI_IMR 0x40010400 // Interrupt mask register -#define EXTI_EMR (EXTI_IMR + 0x04) // Event mask register -#define EXTI_RTSR (EXTI_IMR + 0x08) // Rising trigger selection register -#define EXTI_FTSR (EXTI_IMR + 0x0C) // Falling trigger selection register -#define EXTI_SWIER (EXTI_IMR + 0x10) // Software interrupt event register -#define EXTI_PR (EXTI_IMR + 0x14) // Pending register +#define EXTI_IMR 0x40010400 // Interrupt mask register +#define EXTI_EMR (EXTI_IMR + 0x04) // Event mask register +#define EXTI_RTSR (EXTI_IMR + 0x08) // Rising trigger selection register +#define EXTI_FTSR (EXTI_IMR + 0x0C) // Falling trigger selection register +#define EXTI_SWIER (EXTI_IMR + 0x10) // Software interrupt event register +#define EXTI_PR (EXTI_IMR + 0x14) // Pending register #define AFIO_EVCR 0x40010000 #define AFIO_EXTICR1 (AFIO_EVCR + 0x08) |