diff options
| -rw-r--r-- | Makefile | 1 | ||||
| -rw-r--r-- | core/wiring.c | 10 | ||||
| -rw-r--r-- | libmaple/libmaple_types.h | 2 | ||||
| -rw-r--r-- | libmaple/rcc.h | 4 | ||||
| -rw-r--r-- | libmaple/spi.c | 132 | ||||
| -rw-r--r-- | libmaple/spi.h | 106 | ||||
| -rw-r--r-- | notes/pin-mapping.txt | 4 |
7 files changed, 254 insertions, 5 deletions
@@ -70,6 +70,7 @@ CSRC = libmaple/systick.c \ libmaple/usb.c \ libmaple/rcc.c \ libmaple/flash.c \ + libmaple/spi.c \ core/wiring.c \ core/wiring_shift.c \ core/wiring_analog.c \ diff --git a/core/wiring.c b/core/wiring.c index 803b571..290cca1 100644 --- a/core/wiring.c +++ b/core/wiring.c @@ -40,11 +40,11 @@ void init(void) { nvic_init(); systick_init(); gpio_init(); - adc_init(); - timer_init(1, 1); - timer_init(2, 1); - timer_init(3, 1); - timer_init(4, 1); +// adc_init(); +// timer_init(1, 1); +// timer_init(2, 1); +// timer_init(3, 1); +// timer_init(4, 1); } void nvic_init(void) { diff --git a/libmaple/libmaple_types.h b/libmaple/libmaple_types.h index ca98f6f..d49f95a 100644 --- a/libmaple/libmaple_types.h +++ b/libmaple/libmaple_types.h @@ -43,5 +43,7 @@ typedef long long int64; typedef void (*voidFuncPtr)(void); +#define __io volatile + #endif diff --git a/libmaple/rcc.h b/libmaple/rcc.h index 8f786ee..9973bca 100644 --- a/libmaple/rcc.h +++ b/libmaple/rcc.h @@ -100,6 +100,10 @@ #define RCC_APB1ENR_TIM4EN BIT(2) #define RCC_APB1ENR_USART2EN BIT(17) #define RCC_APB1ENR_USART3EN BIT(18) +#define RCC_APB1ENR_SPI2EN BIT(14) + +#define rcc_enable_clk_spi1() __set_bits(RCC_APB2ENR, RCC_APB2ENR_SPI1EN) +#define rcc_enable_clk_spi2() __set_bits(RCC_APB1ENR, RCC_APB1ENR_SPI2EN) #define rcc_enable_clk_timer1() __set_bits(RCC_APB2ENR, RCC_APB2ENR_TIM1EN) #define rcc_enable_clk_timer2() __set_bits(RCC_APB1ENR, RCC_APB1ENR_TIM2EN) diff --git a/libmaple/spi.c b/libmaple/spi.c new file mode 100644 index 0000000..5a77b03 --- /dev/null +++ b/libmaple/spi.c @@ -0,0 +1,132 @@ +/* ***************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Perry Hung. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * ****************************************************************************/ + +/** + * @brief libmaple serial peripheral interface (SPI) definitions + * + * Initial implementation for the SPI interface. + * + * This driver implements only the bare essentials of a polling driver at the + * moment. Master mode only, 8-bit data frames, and polling. + * + * The caller is responsible for controlling the chip select line. + * + * TODO: interrupt based driver, DMA. + * + */ + +#include "libmaple.h" +#include "gpio.h" +#include "rcc.h" +#include "spi.h" + +typedef struct spi_dev { + SPI *base; + GPIO_Port *port; + uint8 sck_pin; + uint8 miso_pin; + uint8 mosi_pin; +} spi_dev; + +static const spi_dev spi_dev1 = { + .base = (SPI*)SPI1_BASE, + .port = GPIOA_BASE, + .sck_pin = 5, + .miso_pin = 6, + .mosi_pin = 7 +}; + +static const spi_dev spi_dev2 = { + .base = (SPI*)SPI2_BASE, + .port = GPIOB_BASE, + .sck_pin = 13, + .miso_pin = 14, + .mosi_pin = 15 +}; + +static void spi_gpio_cfg(spi_dev *dev); + +/** + * @brief Initialize a spi peripheral + * @param spi_num which spi to turn on, SPI1 or SPI2? + * @param prescale prescale factor on the input clock. + * @param endian data frame format (LSBFIRST?) + * @param mode SPI mode number + */ +void spi_init(uint32 spi_num, + uint32 prescale, + uint32 endian, + uint32 mode) { + ASSERT(spi_num == 1 || spi_num == 2); + ASSERT(mode < 4); + + SPI *spi; + uint32 cr1 = 0; + + switch (spi_num) { + case 1: + /* limit to 18 mhz max speed */ + ASSERT(prescale != CR1_BR_PRESCALE_2); + spi = (SPI*)SPI1_BASE; + rcc_enable_clk_spi1(); + spi_gpio_cfg(&spi_dev1); + break; + case 2: + spi = (SPI*)SPI2_BASE; + rcc_enable_clk_spi2(); + spi_gpio_cfg(&spi_dev2); + break; + } + + cr1 = prescale | endian | mode | CR1_MSTR | CR1_SSI | CR1_SSM; + spi->CR1 = cr1; + + /* Peripheral enable */ + spi->CR1 |= CR1_SPE; +} + + +/** + * @brief SPI synchronous 8-bit write, blocking. + * @param spi_num which spi to send on + * @return data shifted back from the slave + */ +void spi_tx(uint32 spi_num, uint8 data) { + SPI *spi; + + ASSERT(spi_num == 1 || spi_num == 2); + + spi = (spi_num == 1) ? (SPI*)SPI1_BASE : (SPI*)SPI2_BASE; + + spi->DR = data; + + while (!(spi->SR & SR_TXE) || (spi->SR & SR_BSY)) + ; +} + +static void spi_gpio_cfg(spi_dev *dev) { + gpio_set_mode(dev->port, dev->sck_pin, GPIO_MODE_AF_OUTPUT_PP); + gpio_set_mode(dev->port, dev->miso_pin, GPIO_MODE_AF_OUTPUT_PP); + gpio_set_mode(dev->port, dev->mosi_pin, GPIO_MODE_AF_OUTPUT_PP); +} diff --git a/libmaple/spi.h b/libmaple/spi.h new file mode 100644 index 0000000..457f39b --- /dev/null +++ b/libmaple/spi.h @@ -0,0 +1,106 @@ +/* ***************************************************************************** + * The MIT License + * + * Copyright (c) 2010 Perry Hung. + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * ****************************************************************************/ + +/** + * @brief libmaple serial peripheral interface (SPI) prototypes and declarations + */ + +#ifndef _SPI_H_ +#define _SPI_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* peripheral addresses */ +#define SPI1_BASE 0x40013000 +#define SPI2_BASE 0x40003800 + +/* baud rate prescaler bits */ +#define CR1_BR 0x00000038 +#define CR1_BR_PRESCALE_2 0x00000000 +#define CR1_BR_PRESCALE_4 0x00000008 +#define CR1_BR_PRESCALE_8 0x00000010 +#define CR1_BR_PRESCALE_16 0x00000018 +#define CR1_BR_PRESCALE_32 0x00000020 +#define CR1_BR_PRESCALE_64 0x00000028 +#define CR1_BR_PRESCALE_128 0x00000030 +#define CR1_BR_PRESCALE_256 0x00000038 + +#define CR1_LSBFIRST BIT(7 // data frame format +#define CR1_MSTR BIT(2) // master selection +#define CR1_SSM BIT(9) // software slave management +#define CR1_SSI BIT(8) // internal slave select +#define CR1_SPE BIT(6) // peripheral enable + +/* Status register bits */ +#define SR_RXNE BIT(0) // rx buffer not empty +#define SR_TXE BIT(1) // transmit buffer empty +#define SR_BSY BIT(7) // busy flag + +typedef struct SPI { + __io uint16 CR1; + uint16 pad0; + __io uint8 CR2; + uint8 pad1[3]; + __io uint8 SR; + uint8 pad2[3]; + __io uint16 DR; + uint16 pad3; + __io uint16 CRCPR; + uint16 pad4; + __io uint16 RXCRCR; + uint16 pad5; + __io uint16 TXCRCR; + uint16 pad6; +} SPI; + +enum { + SPI_MSBFIRST = 0, + SPI_LSBFIRST = BIT(7), +}; + +enum { + SPI_PRESCALE_2 = (0x0 << 3), + SPI_PRESCALE_4 = (0x1 << 3), + SPI_PRESCALE_8 = (0x2 << 3), + SPI_PRESCALE_16 = (0x3 << 3), + SPI_PRESCALE_32 = (0x4 << 3), + SPI_PRESCALE_64 = (0x5 << 3), + SPI_PRESCALE_128 = (0x6 << 3), + SPI_PRESCALE_256 = (0x7 << 3) +}; + +void spi_init(uint32 spi_num, + uint32 prescale, + uint32 endian, + uint32 mode); +void spi_tx(uint32 spi_num, uint8 data); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/notes/pin-mapping.txt b/notes/pin-mapping.txt index c1709e8..e6debf7 100644 --- a/notes/pin-mapping.txt +++ b/notes/pin-mapping.txt @@ -63,3 +63,7 @@ D38 PC9 - - - - - Y ------------------------------------------------------------------------------- +todo: +adc pin check +jtag pins for gpio + |