diff options
-rw-r--r-- | examples/test-session.cpp | 2 | ||||
-rw-r--r-- | libmaple/gpio.c | 35 | ||||
-rw-r--r-- | libmaple/gpio.h | 59 | ||||
-rw-r--r-- | wirish/boards.cpp | 268 | ||||
-rw-r--r-- | wirish/boards.h | 144 | ||||
-rw-r--r-- | wirish/boards/maple.cpp | 94 | ||||
-rw-r--r-- | wirish/boards/maple.h | 59 | ||||
-rw-r--r-- | wirish/boards/maple_RET6.cpp | 88 | ||||
-rw-r--r-- | wirish/boards/maple_RET6.h | 61 | ||||
-rw-r--r-- | wirish/boards/maple_mini.cpp | 87 | ||||
-rw-r--r-- | wirish/boards/maple_mini.h | 60 | ||||
-rw-r--r-- | wirish/boards/maple_native.cpp | 155 | ||||
-rw-r--r-- | wirish/boards/maple_native.h | 64 | ||||
-rw-r--r-- | wirish/ext_interrupts.cpp | 6 | ||||
-rw-r--r-- | wirish/rules.mk | 10 | ||||
-rw-r--r-- | wirish/wirish.cpp | 3 | ||||
-rw-r--r-- | wirish/wirish.h | 1 | ||||
-rw-r--r-- | wirish/wirish_analog.cpp | 2 | ||||
-rw-r--r-- | wirish/wirish_digital.cpp | 8 | ||||
-rw-r--r-- | wirish/wirish_types.h | 51 |
20 files changed, 840 insertions, 417 deletions
diff --git a/examples/test-session.cpp b/examples/test-session.cpp index 9b4bce4..28c02f3 100644 --- a/examples/test-session.cpp +++ b/examples/test-session.cpp @@ -351,7 +351,7 @@ void cmd_everything(void) { // TODO void fast_gpio(int maple_pin) { gpio_dev *dev = PIN_MAP[maple_pin].gpio_device; - uint32 pin = PIN_MAP[maple_pin].pin; + uint32 pin = PIN_MAP[maple_pin].gpio_pin; gpio_write_bit(dev, pin, 1); gpio_write_bit(dev, pin, 0); gpio_write_bit(dev, pin, 1); gpio_write_bit(dev, pin, 0); diff --git a/libmaple/gpio.c b/libmaple/gpio.c index 18b856b..5484e21 100644 --- a/libmaple/gpio.c +++ b/libmaple/gpio.c @@ -34,45 +34,52 @@ */ gpio_dev gpioa = { - .regs = GPIOA_BASE, - .clk_id = RCC_GPIOA + .regs = GPIOA_BASE, + .clk_id = RCC_GPIOA, + .exti_port = AFIO_EXTI_PA, }; gpio_dev* const GPIOA = &gpioa; gpio_dev gpiob = { - .regs = GPIOB_BASE, - .clk_id = RCC_GPIOB + .regs = GPIOB_BASE, + .clk_id = RCC_GPIOB, + .exti_port = AFIO_EXTI_PB, }; gpio_dev* const GPIOB = &gpiob; gpio_dev gpioc = { - .regs = GPIOC_BASE, - .clk_id = RCC_GPIOC + .regs = GPIOC_BASE, + .clk_id = RCC_GPIOC, + .exti_port = AFIO_EXTI_PC, }; gpio_dev* const GPIOC = &gpioc; gpio_dev gpiod = { - .regs = GPIOD_BASE, - .clk_id = RCC_GPIOD + .regs = GPIOD_BASE, + .clk_id = RCC_GPIOD, + .exti_port = AFIO_EXTI_PD, }; gpio_dev* const GPIOD = &gpiod; #ifdef STM32_HIGH_DENSITY gpio_dev gpioe = { - .regs = GPIOE_BASE, - .clk_id = RCC_GPIOE + .regs = GPIOE_BASE, + .clk_id = RCC_GPIOE, + .exti_port = AFIO_EXTI_PE, }; gpio_dev* const GPIOE = &gpioe; gpio_dev gpiof = { - .regs = GPIOF_BASE, - .clk_id = RCC_GPIOF + .regs = GPIOF_BASE, + .clk_id = RCC_GPIOF, + .exti_port = AFIO_EXTI_PF, }; gpio_dev* const GPIOF = &gpiof; gpio_dev gpiog = { - .regs = GPIOG_BASE, - .clk_id = RCC_GPIOG + .regs = GPIOG_BASE, + .clk_id = RCC_GPIOG, + .exti_port = AFIO_EXTI_PG, }; gpio_dev* const GPIOG = &gpiog; #endif diff --git a/libmaple/gpio.h b/libmaple/gpio.h index a8a4985..63ba0d5 100644 --- a/libmaple/gpio.h +++ b/libmaple/gpio.h @@ -47,19 +47,37 @@ extern "C"{ /** GPIO register map type */ typedef struct gpio_reg_map { - __io uint32 CRL; ///< Port configuration register low - __io uint32 CRH; ///< Port configuration register high - __io uint32 IDR; ///< Port input data register - __io uint32 ODR; ///< Port output data register - __io uint32 BSRR; ///< Port bit set/reset register - __io uint32 BRR; ///< Port bit reset register - __io uint32 LCKR; ///< Port configuration lock register + __io uint32 CRL; /**< Port configuration register low */ + __io uint32 CRH; /**< Port configuration register high */ + __io uint32 IDR; /**< Port input data register */ + __io uint32 ODR; /**< Port output data register */ + __io uint32 BSRR; /**< Port bit set/reset register */ + __io uint32 BRR; /**< Port bit reset register */ + __io uint32 LCKR; /**< Port configuration lock register */ } gpio_reg_map; + +/** + * External interrupt line port selector. Used to determine which + * GPIO port to map an external interrupt line onto. */ +/* (See AFIO sections, below) */ +typedef enum { + AFIO_EXTI_PA, /**< Use PAx pin. */ + AFIO_EXTI_PB, /**< Use PBx pin. */ + AFIO_EXTI_PC, /**< Use PCx pin. */ + AFIO_EXTI_PD, /**< Use PDx pin. */ +#ifdef STM32_HIGH_DENSITY + AFIO_EXTI_PE, /**< Use PEx pin. */ + AFIO_EXTI_PF, /**< Use PFx pin. */ + AFIO_EXTI_PG, /**< Use PGx pin. */ +#endif +} afio_exti_port; + /** GPIO device type */ typedef struct gpio_dev { - gpio_reg_map *regs; ///< Register map - rcc_clk_id clk_id; ///< RCC clock information + gpio_reg_map *regs; /**< Register map */ + rcc_clk_id clk_id; /**< RCC clock information */ + afio_exti_port exti_port; /**< AFIO external interrupt port value */ } gpio_dev; extern gpio_dev gpioa; @@ -145,6 +163,14 @@ void gpio_init_all(void); void gpio_set_mode(gpio_dev *dev, uint8 pin, gpio_pin_mode mode); /** + * @brief Get a GPIO port's corresponding afio_exti_port. + * @param dev GPIO device whose afio_exti_port to return. + */ +static inline afio_exti_port gpio_exti_port(gpio_dev *dev) { + return dev->exti_port; +} + +/** * Set or reset a GPIO pin. * * Pin must have previously been configured to output mode. @@ -260,21 +286,6 @@ typedef struct afio_reg_map { /* External interrupt configuration registers */ /** - * External interrupt line port selector. Used to determine which - * GPIO port to map an external interrupt line onto. */ -typedef enum { - AFIO_EXTI_PA, /**< Use PAx pin. */ - AFIO_EXTI_PB, /**< Use PBx pin. */ - AFIO_EXTI_PC, /**< Use PCx pin. */ - AFIO_EXTI_PD, /**< Use PDx pin. */ -#ifdef STM32_HIGH_DENSITY - AFIO_EXTI_PE, /**< Use PEx pin. */ - AFIO_EXTI_PF, /**< Use PFx pin. */ - AFIO_EXTI_PG, /**< Use PGx pin. */ -#endif -} afio_exti_port; - -/** * External interrupt line numbers. */ typedef enum { diff --git a/wirish/boards.cpp b/wirish/boards.cpp deleted file mode 100644 index d99b019..0000000 --- a/wirish/boards.cpp +++ /dev/null @@ -1,268 +0,0 @@ -#include "boards.h" - -// For concision -#define ADCx ADC_INVALID - -#if defined(BOARD_maple) - -PinMapping PIN_MAP[NR_GPIO_PINS] = { - {GPIOA, 3, 3, TIMER2, 4, AFIO_EXTI_PA}, /* D0/PA3 */ - {GPIOA, 2, 2, TIMER2, 3, AFIO_EXTI_PA}, /* D1/PA2 */ - {GPIOA, 0, 0, TIMER2, 1, AFIO_EXTI_PA}, /* D2/PA0 */ - {GPIOA, 1, 1, TIMER2, 2, AFIO_EXTI_PA}, /* D3/PA1 */ - {GPIOB, 5, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D4/PB5 */ - {GPIOB, 6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D5/PB6 */ - {GPIOA, 8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D6/PA8 */ - {GPIOA, 9, ADCx, TIMER1, 2, AFIO_EXTI_PA}, /* D7/PA9 */ - {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D8/PA10 */ - {GPIOB, 7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D9/PB7 */ - {GPIOA, 4, 4, NULL, 0, AFIO_EXTI_PA}, /* D10/PA4 */ - {GPIOA, 7, 7, TIMER3, 2, AFIO_EXTI_PA}, /* D11/PA7 */ - {GPIOA, 6, 6, TIMER3, 1, AFIO_EXTI_PA}, /* D12/PA6 */ - {GPIOA, 5, 5, NULL, 0, AFIO_EXTI_PA}, /* D13/PA5 (LED) */ - {GPIOB, 8, ADCx, TIMER4, 3, AFIO_EXTI_PB}, /* D14/PB8 */ - - /* Little header */ - - {GPIOC, 0, 10, NULL, 0, AFIO_EXTI_PC}, /* D15/PC0 */ - {GPIOC, 1, 11, NULL, 0, AFIO_EXTI_PC}, /* D16/PC1 */ - {GPIOC, 2, 12, NULL, 0, AFIO_EXTI_PC}, /* D17/PC2 */ - {GPIOC, 3, 13, NULL, 0, AFIO_EXTI_PC}, /* D18/PC3 */ - {GPIOC, 4, 14, NULL, 0, AFIO_EXTI_PC}, /* D19/PC4 */ - {GPIOC, 5, 15, NULL, 0, AFIO_EXTI_PC}, /* D20/PC5 */ - - /* External header */ - - {GPIOC, 13, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D21/PC13 */ - {GPIOC, 14, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D22/PC14 */ - {GPIOC, 15, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D23/PC15 */ - {GPIOB, 9, ADCx, TIMER4, 4, AFIO_EXTI_PB}, /* D24/PB9 */ - {GPIOD, 2, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D25/PD2 */ - {GPIOC, 10, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D26/PC10 */ - {GPIOB, 0, 8, TIMER3, 3, AFIO_EXTI_PB}, /* D27/PB0 */ - {GPIOB, 1, 9, TIMER3, 4, AFIO_EXTI_PB}, /* D28/PB1 */ - {GPIOB, 10, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D29/PB10 */ - {GPIOB, 11, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D30/PB11 */ - {GPIOB, 12, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D31/PB12 */ - {GPIOB, 13, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D32/PB13 */ - {GPIOB, 14, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D33/PB14 */ - {GPIOB, 15, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D34/PB15 */ - {GPIOC, 6, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D35/PC6 */ - {GPIOC, 7, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D36/PC7 */ - {GPIOC, 8, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D37/PC8 */ - {GPIOC, 9, ADCx, NULL, 0, AFIO_EXTI_PC} /* D38/PC9 (BUT) */ -}; - -#elif defined(BOARD_maple_native) - -PinMapping PIN_MAP[NR_GPIO_PINS] = { - /* Top header */ - - {GPIOB, 10, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D0/PB10 */ - {GPIOB, 2, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D1/PB2 */ - {GPIOB, 12, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D2/PB12 */ - {GPIOB, 13, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D3/PB13 */ - {GPIOB, 14, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D4/PB14 */ - {GPIOB, 15, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D5/PB15 */ - {GPIOC, 0, 10, NULL, 0, AFIO_EXTI_PC}, /* D6/PC0 */ - {GPIOC, 1, 11, NULL, 0, AFIO_EXTI_PC}, /* D7/PC1 */ - {GPIOC, 2, 12, NULL, 0, AFIO_EXTI_PC}, /* D8/PC2 */ - {GPIOC, 3, 13, NULL, 0, AFIO_EXTI_PC}, /* D9/PC3 */ - {GPIOC, 4, 14, NULL, 0, AFIO_EXTI_PC}, /* D10/PC4 */ - {GPIOC, 5, 15, NULL, 0, AFIO_EXTI_PC}, /* D11/PC5 */ - {GPIOC, 6, ADCx, TIMER8, 1, AFIO_EXTI_PC}, /* D12/PC6 */ - {GPIOC, 7, ADCx, TIMER8, 2, AFIO_EXTI_PC}, /* D13/PC7 */ - {GPIOC, 8, ADCx, TIMER8, 3, AFIO_EXTI_PC}, /* D14/PC8 */ - {GPIOC, 9, ADCx, TIMER8, 4, AFIO_EXTI_PC}, /* D15/PC9 */ - {GPIOC, 10, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D16/PC10 */ - {GPIOC, 11, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D17/PC11 */ - {GPIOC, 12, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D18/PC12 */ - {GPIOC, 13, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D19/PC13 */ - {GPIOC, 14, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D20/PC14 */ - {GPIOC, 15, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D21/PC15 */ - {GPIOA, 8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D22/PA8 */ - {GPIOA, 9, ADCx, TIMER1, 2, AFIO_EXTI_PA}, /* D23/PA9 */ - {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D24/PA10 */ - {GPIOB, 9, ADCx, TIMER4, 4, AFIO_EXTI_PB}, /* D25/PB9 */ - - /* Bottom header */ - /* FIXME (?) What about D48--D50 also being TIMER2_CH[234]? */ - - {GPIOD, 2, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D26/PD2 */ - {GPIOD, 3, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D27/PD3 */ - {GPIOD, 6, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D28/PD6 */ - {GPIOG, 11, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D29/PG11 */ - {GPIOG, 12, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D30/PG12 */ - {GPIOG, 13, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D31/PG13 */ - {GPIOG, 14, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D32/PG14 */ - {GPIOG, 8, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D33/PG8 */ - {GPIOG, 7, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D34/PG7 */ - {GPIOG, 6, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D35/PG6 */ - {GPIOB, 5, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D36/PB5 */ - {GPIOB, 6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D37/PB6 */ - {GPIOB, 7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D38/PB7 */ - {GPIOF, 6, 4, NULL, 0, AFIO_EXTI_PF}, /* D39/PF6 */ - {GPIOF, 7, 5, NULL, 0, AFIO_EXTI_PF}, /* D40/PF7 */ - {GPIOF, 8, 6, NULL, 0, AFIO_EXTI_PF}, /* D41/PF8 */ - {GPIOF, 9, 7, NULL, 0, AFIO_EXTI_PF}, /* D42/PF9 */ - {GPIOF, 10, 8, NULL, 0, AFIO_EXTI_PF}, /* D43/PF10 */ - {GPIOF, 11, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D44/PF11 */ - {GPIOB, 1, 9, TIMER3, 4, AFIO_EXTI_PB}, /* D45/PB1 */ - {GPIOB, 0, 8, TIMER3, 3, AFIO_EXTI_PB}, /* D46/PB0 */ - {GPIOA, 0, 0, TIMER5, 1, AFIO_EXTI_PA}, /* D47/PA0 */ - {GPIOA, 1, 1, TIMER5, 2, AFIO_EXTI_PA}, /* D48/PA1 */ - {GPIOA, 2, 2, TIMER5, 3, AFIO_EXTI_PA}, /* D49/PA2 */ - {GPIOA, 3, 3, TIMER5, 4, AFIO_EXTI_PA}, /* D50/PA3 */ - {GPIOA, 4, 4, NULL, 0, AFIO_EXTI_PA}, /* D51/PA4 */ - {GPIOA, 5, 5, NULL, 0, AFIO_EXTI_PA}, /* D52/PA5 */ - {GPIOA, 6, 6, TIMER3, 1, AFIO_EXTI_PA}, /* D53/PA6 */ - {GPIOA, 7, 7, TIMER3, 2, AFIO_EXTI_PA}, /* D54/PA7 */ - - /* Right (triple) header */ - - {GPIOF, 0, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D55/PF0 */ - {GPIOD, 11, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D56/PD11 */ - {GPIOD, 14, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D57/PD14 */ - {GPIOF, 1, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D58/PF1 */ - {GPIOD, 12, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D59/PD12 */ - {GPIOD, 15, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D60/PD15 */ - {GPIOF, 2, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D61/PF2 */ - {GPIOD, 13, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D62/PD13 */ - {GPIOD, 0, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D63/PD0 */ - {GPIOF, 3, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D64/PF3 */ - {GPIOE, 3, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D65/PE3 */ - {GPIOD, 1, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D66/PD1 */ - {GPIOF, 4, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D67/PF4 */ - {GPIOE, 4, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D68/PE4 */ - {GPIOE, 7, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D69/PE7 */ - {GPIOF, 5, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D70/PF5 */ - {GPIOE, 5, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D71/PE5 */ - {GPIOE, 8, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D72/PE8 */ - {GPIOF, 12, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D73/PF12 */ - {GPIOE, 6, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D74/PE6 */ - {GPIOE, 9, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D75/PE9 */ - {GPIOF, 13, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D76/PF13 */ - {GPIOE, 10, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D77/PE10 */ - {GPIOF, 14, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D78/PF14 */ - {GPIOG, 9, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D79/PG9 */ - {GPIOE, 11, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D80/PE11 */ - {GPIOF, 15, ADCx, NULL, 0, AFIO_EXTI_PF}, /* D81/PF15 */ - {GPIOG, 10, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D82/PG10 */ - {GPIOE, 12, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D83/PE12 */ - {GPIOG, 0, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D84/PG0 */ - {GPIOD, 5, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D85/PD5 */ - {GPIOE, 13, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D86/PE13 */ - {GPIOG, 1, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D87/PG1 */ - {GPIOD, 4, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D88/PD4 */ - {GPIOE, 14, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D89/PE14 */ - {GPIOG, 2, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D90/PG2 */ - {GPIOE, 1, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D91/PE1 */ - {GPIOE, 15, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D92/PE15 */ - {GPIOG, 3, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D93/PG3 */ - {GPIOE, 0, ADCx, NULL, 0, AFIO_EXTI_PE}, /* D94/PE0 */ - {GPIOD, 8, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D95/PD8 */ - {GPIOG, 4, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D96/PG4 */ - {GPIOD, 9, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D97/PD9 */ - {GPIOG, 5, ADCx, NULL, 0, AFIO_EXTI_PG}, /* D98/PG5 */ - {GPIOD, 10, ADCx, NULL, 0, AFIO_EXTI_PD} /* D99/PD10 */ -}; - -#elif defined(BOARD_maple_mini) - -PinMapping PIN_MAP[NR_GPIO_PINS] = { - /* Top header */ - - {GPIOB, 11, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D0/PB11 */ - {GPIOB, 10, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D1/PB10 */ - {GPIOB, 2, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D2/PB2 */ - {GPIOB, 0, 8, TIMER3, 3, AFIO_EXTI_PB}, /* D3/PB0 */ - {GPIOA, 7, 7, TIMER3, 2, AFIO_EXTI_PA}, /* D4/PA7 */ - {GPIOA, 6, 6, TIMER3, 1, AFIO_EXTI_PA}, /* D5/PA6 */ - {GPIOA, 5, 5, NULL, 0, AFIO_EXTI_PA}, /* D6/PA5 */ - {GPIOA, 4, 4, NULL, 0, AFIO_EXTI_PA}, /* D7/PA4 */ - {GPIOA, 3, 3, TIMER2, 4, AFIO_EXTI_PA}, /* D8/PA3 */ - {GPIOA, 2, 2, TIMER2, 3, AFIO_EXTI_PA}, /* D9/PA2 */ - {GPIOA, 1, 1, TIMER2, 2, AFIO_EXTI_PA}, /* D10/PA1 */ - {GPIOA, 0, 0, TIMER2, 1, AFIO_EXTI_PA}, /* D11/PA0 */ - {GPIOC, 15, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D12/PC15 */ - {GPIOC, 14, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D13/PC14 */ - {GPIOC, 13, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D14/PC13 */ - - /* Bottom header */ - - {GPIOB, 7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D15/PB7 */ - {GPIOB, 6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D16/PB6 */ - {GPIOB, 5, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D17/PB5 */ - {GPIOB, 4, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D18/PB4 */ - {GPIOB, 3, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D19/PB3 */ - {GPIOA, 15, ADCx, NULL, 0, AFIO_EXTI_PA}, /* D20/PA15 */ - {GPIOA, 14, ADCx, NULL, 0, AFIO_EXTI_PA}, /* D21/PA14 */ - {GPIOA, 13, ADCx, NULL, 0, AFIO_EXTI_PA}, /* D22/PA13 */ - {GPIOA, 12, ADCx, NULL, 0, AFIO_EXTI_PA}, /* D23/PA12 */ - {GPIOA, 11, ADCx, TIMER1, 4, AFIO_EXTI_PA}, /* D24/PA11 */ - {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D25/PA10 */ - {GPIOA, 9, ADCx, TIMER2, 2, AFIO_EXTI_PA}, /* D26/PA9 */ - {GPIOA, 8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D27/PA8 */ - {GPIOB, 15, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D28/PB15 */ - {GPIOB, 14, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D29/PB14 */ - {GPIOB, 13, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D30/PB13 */ - {GPIOB, 12, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D31/PB12 */ - {GPIOB, 8, ADCx, TIMER4, 3, AFIO_EXTI_PB}, /* D32/PB8 */ - {GPIOB, 1, 9, TIMER3, 4, AFIO_EXTI_PB}, /* D33/PB1 */ -}; - -#elif defined(BOARD_maple_RET6) - -PinMapping PIN_MAP[NR_GPIO_PINS] = { - {GPIOA, 3, 3, TIMER2, 4, AFIO_EXTI_PA}, /* D0/PA3 */ - {GPIOA, 2, 2, TIMER2, 3, AFIO_EXTI_PA}, /* D1/PA2 */ - {GPIOA, 0, 0, TIMER2, 1, AFIO_EXTI_PA}, /* D2/PA0 */ - {GPIOA, 1, 1, TIMER2, 2, AFIO_EXTI_PA}, /* D3/PA1 */ - {GPIOB, 5, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D4/PB5 */ - {GPIOB, 6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D5/PB6 */ - {GPIOA, 8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D6/PA8 */ - {GPIOA, 9, ADCx, TIMER1, 2, AFIO_EXTI_PA}, /* D7/PA9 */ - {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D8/PA10 */ - {GPIOB, 7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D9/PB7 */ - {GPIOA, 4, 4, NULL, 0, AFIO_EXTI_PA}, /* D10/PA4 */ - {GPIOA, 7, 7, TIMER3, 2, AFIO_EXTI_PA}, /* D11/PA7 */ - {GPIOA, 6, 6, TIMER3, 1, AFIO_EXTI_PA}, /* D12/PA6 */ - {GPIOA, 5, 5, NULL, 0, AFIO_EXTI_PA}, /* D13/PA5 (LED) */ - {GPIOB, 8, ADCx, TIMER4, 3, AFIO_EXTI_PB}, /* D14/PB8 */ - - /* Little header */ - - {GPIOC, 0, 10, NULL, 0, AFIO_EXTI_PC}, /* D15/PC0 */ - {GPIOC, 1, 11, NULL, 0, AFIO_EXTI_PC}, /* D16/PC1 */ - {GPIOC, 2, 12, NULL, 0, AFIO_EXTI_PC}, /* D17/PC2 */ - {GPIOC, 3, 13, NULL, 0, AFIO_EXTI_PC}, /* D18/PC3 */ - {GPIOC, 4, 14, NULL, 0, AFIO_EXTI_PC}, /* D19/PC4 */ - {GPIOC, 5, 15, NULL, 0, AFIO_EXTI_PC}, /* D20/PC5 */ - - /* External header */ - - {GPIOC, 13, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D21/PC13 */ - {GPIOC, 14, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D22/PC14 */ - {GPIOC, 15, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D23/PC15 */ - {GPIOB, 9, ADCx, TIMER4, 4, AFIO_EXTI_PB}, /* D24/PB9 */ - {GPIOD, 2, ADCx, NULL, 0, AFIO_EXTI_PD}, /* D25/PD2 */ - {GPIOC, 10, ADCx, NULL, 0, AFIO_EXTI_PC}, /* D26/PC10 */ - {GPIOB, 0, 8, TIMER3, 3, AFIO_EXTI_PB}, /* D27/PB0 */ - {GPIOB, 1, 9, TIMER3, 4, AFIO_EXTI_PB}, /* D28/PB1 */ - {GPIOB, 10, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D29/PB10 */ - {GPIOB, 11, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D30/PB11 */ - {GPIOB, 12, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D31/PB12 */ - {GPIOB, 13, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D32/PB13 */ - {GPIOB, 14, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D33/PB14 */ - {GPIOB, 15, ADCx, NULL, 0, AFIO_EXTI_PB}, /* D34/PB15 */ - {GPIOC, 6, ADCx, TIMER8, 1, AFIO_EXTI_PC}, /* D35/PC6 */ - {GPIOC, 7, ADCx, TIMER8, 2, AFIO_EXTI_PC}, /* D36/PC7 */ - {GPIOC, 8, ADCx, TIMER8, 3, AFIO_EXTI_PC}, /* D37/PC8 */ - {GPIOC, 9, ADCx, TIMER8, 4, AFIO_EXTI_PC} /* D38/PC9 (BUT) */ -}; - -#else - -#error "Board type has not been selected correctly." - -#endif diff --git a/wirish/boards.h b/wirish/boards.h index d186dc4..b72609d 100644 --- a/wirish/boards.h +++ b/wirish/boards.h @@ -3,29 +3,37 @@ * * Copyright (c) 2010 Bryan Newbold. * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is * furnished to do so, subject to the following conditions: * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. *****************************************************************************/ -/* This file contains board-specific pin mapping tables. To add a new board - * type, copy the "BOARD_maple" section below and edit it as needed, then - * update your build toolchain with a new "BOARD" type. This must match the - * separate MCU type (which determines the ../libmaple configuration). +/** + * @file boards.h + * @author Bryan Newbold <bnewbold@leaflabs.com>, + * Marti Bolivar <mbolivar@leaflabs.com> + * @brief Board-specific pin information. + * + * To add a new board type, add a new pair of files to + * /wirish/boards/, update the section below with a new "BOARD" type, + * and update /wirish/rules.mk to include your boards/your_board.cpp + * file in the top-level Makefile build. */ #ifndef _BOARDS_H_ @@ -34,12 +42,13 @@ #include "libmaple.h" #include "gpio.h" #include "timer.h" -#include "native_sram.h" + +#include "wirish_types.h" /* Set of all possible pin names; not all boards have all these (note - that we use the Dx convention since all of the Maple's pins are - "digital" pins (e.g. can be used with digitalRead() and - digitalWrite()), but not all of them are connected to ADCs. */ + * that we use the Dx convention since all of the Maple's pins are + * "digital" pins (e.g. can be used with digitalRead() and + * digitalWrite()), but not all of them are connected to ADCs. */ enum { D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15, D16, D17, D18, D19, D20, D21, D22, D23, D24, D25, D26, D27, D28, D29, D30, D31, @@ -50,89 +59,30 @@ enum { D92, D93, D94, D95, D96, D97, D98, D99, D100, D101, D102, D103, D104, D105, D106, D107, D108, D109, D110, D111, }; -#define ADC_INVALID 0xFFFFFFFF - -/* Pin mapping: pin number -> STM32 info */ -typedef struct PinMapping { - gpio_dev *gpio_device; - uint32 pin; - uint32 adc_channel; - timer_dev* timer_device; - uint8 timer_chan; - afio_exti_port ext_port; -} PinMapping; +/** + * @brief Maps each pin to a corresponding struct stm32_pin_info. + * @see struct stm32_pin_info + */ +extern stm32_pin_info PIN_MAP[]; -/* Maps every digital pin to a PinMapping */ -extern PinMapping PIN_MAP[]; +/** Board-specific initialization function. */ +extern void boardInit(void); -/* LeafLabs Maple rev3, rev5 */ #ifdef BOARD_maple - - #define CYCLES_PER_MICROSECOND 72 - #define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ - - #define BOARD_BUTTON_PIN 38 - #define BOARD_LED_PIN 13 - - /* Total number of GPIO pins that are broken out to headers and - intended for general use. */ - #define NR_GPIO_PINS 39 - - #define BOARD_INIT do { \ - } while(0) - +#include "boards/maple.h" #elif defined(BOARD_maple_native) - - /* LeafLabs Maple Native (prototype) */ - - #define CYCLES_PER_MICROSECOND 72 - #define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ - - #define BOARD_LED_PIN D21 - #define BOARD_BUTTON_PIN D18 - - #define NR_GPIO_PINS 100 - - #define BOARD_INIT do { \ - initNativeSRAM(); - } while(0) - +#include "boards/maple_native.h" #elif defined(BOARD_maple_mini) - - #define CYCLES_PER_MICROSECOND 72 - #define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ - - #define BOARD_BUTTON_PIN 32 - #define BOARD_LED_PIN 33 - - #define NR_GPIO_PINS 34 - - /* Since we want the Serial Wire/JTAG pins as GPIOs, disable both - * SW and JTAG debug support */ - #define BOARD_INIT \ - do { \ - afio_mapr_swj_config(AFIO_MAPR_SWJ_NO_JTAG_NO_SW); \ - } while (0) - +#include "boards/maple_mini.h" #elif defined(BOARD_maple_RET6) - - #define CYCLES_PER_MICROSECOND 72 - #define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ - - #define BOARD_BUTTON_PIN 38 - #define BOARD_LED_PIN 13 - - /* Total number of GPIO pins that are broken out to headers and - intended for general use. */ - #define NR_GPIO_PINS 39 - - #define BOARD_INIT do { \ - } while(0) - +/* + * **NOT** MAPLE REV6. This the **Maple RET6 EDITION**, which is a + * Maple with an STM32F103RET6 (...RET6) instead of an STM32F103RBT6 + * (...RBT6) on it. Maple Rev6 (as of March 2011) DOES NOT EXIST. + */ +#include "boards/maple_RET6.h" #else - #error "Board type has not been selected correctly." - #endif #endif diff --git a/wirish/boards/maple.cpp b/wirish/boards/maple.cpp new file mode 100644 index 0000000..cebd222 --- /dev/null +++ b/wirish/boards/maple.cpp @@ -0,0 +1,94 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple.cpp + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Maple PIN_MAP and boardInit(). + */ + +#include "gpio.h" +#include "timer.h" + +#include "maple.h" + +#ifdef BOARD_maple + +void boardInit(void) { +} + +stm32_pin_info PIN_MAP[NR_GPIO_PINS] = { + + /* Top header */ + + {GPIOA, TIMER2, 3, 4, 3}, /* D0/PA3 */ + {GPIOA, TIMER2, 2, 3, 2}, /* D1/PA2 */ + {GPIOA, TIMER2, 0, 1, 0}, /* D2/PA0 */ + {GPIOA, TIMER2, 1, 2, 1}, /* D3/PA1 */ + {GPIOB, NULL, 5, 0, ADCx}, /* D4/PB5 */ + {GPIOB, TIMER4, 6, 1, ADCx}, /* D5/PB6 */ + {GPIOA, TIMER1, 8, 1, ADCx}, /* D6/PA8 */ + {GPIOA, TIMER1, 9, 2, ADCx}, /* D7/PA9 */ + {GPIOA, TIMER1, 10, 3, ADCx}, /* D8/PA10 */ + {GPIOB, TIMER4, 7, 2, ADCx}, /* D9/PB7 */ + {GPIOA, NULL, 4, 0, 4}, /* D10/PA4 */ + {GPIOA, TIMER3, 7, 2, 7}, /* D11/PA7 */ + {GPIOA, TIMER3, 6, 1, 6}, /* D12/PA6 */ + {GPIOA, NULL, 5, 0, 5}, /* D13/PA5 (LED) */ + {GPIOB, TIMER4, 8, 3, ADCx}, /* D14/PB8 */ + + /* Little header */ + + {GPIOC, NULL, 0, 0, 10}, /* D15/PC0 */ + {GPIOC, NULL, 1, 0, 11}, /* D16/PC1 */ + {GPIOC, NULL, 2, 0, 12}, /* D17/PC2 */ + {GPIOC, NULL, 3, 0, 13}, /* D18/PC3 */ + {GPIOC, NULL, 4, 0, 14}, /* D19/PC4 */ + {GPIOC, NULL, 5, 0, 15}, /* D20/PC5 */ + + /* External header */ + + {GPIOC, NULL, 13, 0, ADCx}, /* D21/PC13 */ + {GPIOC, NULL, 14, 0, ADCx}, /* D22/PC14 */ + {GPIOC, NULL, 15, 0, ADCx}, /* D23/PC15 */ + {GPIOB, TIMER4, 9, 4, ADCx}, /* D24/PB9 */ + {GPIOD, NULL, 2, 0, ADCx}, /* D25/PD2 */ + {GPIOC, NULL, 10, 0, ADCx}, /* D26/PC10 */ + {GPIOB, TIMER3, 0, 3, 8}, /* D27/PB0 */ + {GPIOB, TIMER3, 1, 4, 9}, /* D28/PB1 */ + {GPIOB, NULL, 10, 0, ADCx}, /* D29/PB10 */ + {GPIOB, NULL, 11, 0, ADCx}, /* D30/PB11 */ + {GPIOB, NULL, 12, 0, ADCx}, /* D31/PB12 */ + {GPIOB, NULL, 13, 0, ADCx}, /* D32/PB13 */ + {GPIOB, NULL, 14, 0, ADCx}, /* D33/PB14 */ + {GPIOB, NULL, 15, 0, ADCx}, /* D34/PB15 */ + {GPIOC, NULL, 6, 0, ADCx}, /* D35/PC6 */ + {GPIOC, NULL, 7, 0, ADCx}, /* D36/PC7 */ + {GPIOC, NULL, 8, 0, ADCx}, /* D37/PC8 */ + {GPIOC, NULL, 9, 0, ADCx} /* D38/PC9 (BUT) */ +}; + +#endif diff --git a/wirish/boards/maple.h b/wirish/boards/maple.h new file mode 100644 index 0000000..519698b --- /dev/null +++ b/wirish/boards/maple.h @@ -0,0 +1,59 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple.h + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Private include file for Maple in boards.h + */ + +#include "wirish_types.h" + +#ifndef _BOARD_MAPLE_H_ +#define _BOARD_MAPLE_H_ + +#define CYCLES_PER_MICROSECOND 72 +#define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ + +#define BOARD_BUTTON_PIN 38 +#define BOARD_LED_PIN 13 + +/* Number of USARTs/UARTs whose pins are broken out to headers */ +#define NR_USARTS 3 + +/* Default USART pin numbers (not considering AFIO remap) */ +#define BOARD_USART1_TX_PIN 7 +#define BOARD_USART1_RX_PIN 8 +#define BOARD_USART2_TX_PIN 1 +#define BOARD_USART2_RX_PIN 0 +#define BOARD_USART3_TX_PIN 29 +#define BOARD_USART3_RX_PIN 30 + +/* Total number of GPIO pins that are broken out to headers and + intended for general use. */ +#define NR_GPIO_PINS 39 + +#endif diff --git a/wirish/boards/maple_RET6.cpp b/wirish/boards/maple_RET6.cpp new file mode 100644 index 0000000..ae31ce3 --- /dev/null +++ b/wirish/boards/maple_RET6.cpp @@ -0,0 +1,88 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple_RET6.cpp + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Maple RET6 Edition PIN_MAP and boardInit() + */ + +#include "maple_RET6.h" + +#ifdef BOARD_maple_RET6 + +void boardInit(void) { +} + +stm32_pin_info PIN_MAP[NR_GPIO_PINS] = { + {GPIOA, TIMER2, 3, 4, 3}, /* D0/PA3 */ + {GPIOA, TIMER2, 2, 3, 2}, /* D1/PA2 */ + {GPIOA, TIMER2, 0, 1, 0}, /* D2/PA0 */ + {GPIOA, TIMER2, 1, 2, 1}, /* D3/PA1 */ + {GPIOB, NULL, 5, 0, ADCx}, /* D4/PB5 */ + {GPIOB, TIMER4, 6, 1, ADCx}, /* D5/PB6 */ + {GPIOA, TIMER1, 8, 1, ADCx}, /* D6/PA8 */ + {GPIOA, TIMER1, 9, 2, ADCx}, /* D7/PA9 */ + {GPIOA, TIMER1, 10, 3, ADCx}, /* D8/PA10 */ + {GPIOB, TIMER4, 7, 2, ADCx}, /* D9/PB7 */ + {GPIOA, NULL, 4, 0, 4}, /* D10/PA4 */ + {GPIOA, TIMER3, 7, 2, 7}, /* D11/PA7 */ + {GPIOA, TIMER3, 6, 1, 6}, /* D12/PA6 */ + {GPIOA, NULL, 5, 0, 5}, /* D13/PA5 (LED) */ + {GPIOB, TIMER4, 8, 3, ADCx}, /* D14/PB8 */ + + /* Little header */ + + {GPIOC, NULL, 0, 0, 10}, /* D15/PC0 */ + {GPIOC, NULL, 1, 0, 11}, /* D16/PC1 */ + {GPIOC, NULL, 2, 0, 12}, /* D17/PC2 */ + {GPIOC, NULL, 3, 0, 13}, /* D18/PC3 */ + {GPIOC, NULL, 4, 0, 14}, /* D19/PC4 */ + {GPIOC, NULL, 5, 0, 15}, /* D20/PC5 */ + + /* External header */ + + {GPIOC, NULL, 13, 0, ADCx}, /* D21/PC13 */ + {GPIOC, NULL, 14, 0, ADCx}, /* D22/PC14 */ + {GPIOC, NULL, 15, 0, ADCx}, /* D23/PC15 */ + {GPIOB, TIMER4, 9, 4, ADCx}, /* D24/PB9 */ + {GPIOD, NULL, 2, 0, ADCx}, /* D25/PD2 */ + {GPIOC, NULL, 10, 0, ADCx}, /* D26/PC10 */ + {GPIOB, TIMER3, 0, 3, 8}, /* D27/PB0 */ + {GPIOB, TIMER3, 1, 4, 9}, /* D28/PB1 */ + {GPIOB, NULL, 10, 0, ADCx}, /* D29/PB10 */ + {GPIOB, NULL, 11, 0, ADCx}, /* D30/PB11 */ + {GPIOB, NULL, 12, 0, ADCx}, /* D31/PB12 */ + {GPIOB, NULL, 13, 0, ADCx}, /* D32/PB13 */ + {GPIOB, NULL, 14, 0, ADCx}, /* D33/PB14 */ + {GPIOB, NULL, 15, 0, ADCx}, /* D34/PB15 */ + {GPIOC, TIMER8, 6, 1, ADCx}, /* D35/PC6 */ + {GPIOC, TIMER8, 7, 2, ADCx}, /* D36/PC7 */ + {GPIOC, TIMER8, 8, 3, ADCx}, /* D37/PC8 */ + {GPIOC, TIMER8, 9, 4, ADCx} /* D38/PC9 (BUT) */ +}; + +#endif diff --git a/wirish/boards/maple_RET6.h b/wirish/boards/maple_RET6.h new file mode 100644 index 0000000..63510c0 --- /dev/null +++ b/wirish/boards/maple_RET6.h @@ -0,0 +1,61 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple_RET6.h + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Private include file for Maple RET6 Edition in boards.h + * + * See maple.h for more information on these definitions. + */ + +#include "gpio.h" +#include "timer.h" + +#include "wirish_types.h" + +#ifndef _BOARDS_MAPLE_RET6_H_ +#define _BOARDS_MAPLE_RET6_H_ + +#define CYCLES_PER_MICROSECOND 72 +#define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ + +#define BOARD_BUTTON_PIN 38 +#define BOARD_LED_PIN 13 + +/* Note: UART4 and UART5 have pins which aren't broken out :( */ +#define NR_USARTS 3 + +#define BOARD_USART1_TX_PIN 7 +#define BOARD_USART1_RX_PIN 8 +#define BOARD_USART2_TX_PIN 1 +#define BOARD_USART2_RX_PIN 0 +#define BOARD_USART3_TX_PIN 29 +#define BOARD_USART3_RX_PIN 30 + +#define NR_GPIO_PINS 39 + +#endif diff --git a/wirish/boards/maple_mini.cpp b/wirish/boards/maple_mini.cpp new file mode 100644 index 0000000..8c005cf --- /dev/null +++ b/wirish/boards/maple_mini.cpp @@ -0,0 +1,87 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple_mini.cpp + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Maple Mini PIN_MAP and boardInit(). + */ + +#include "maple_mini.h" +#include "gpio.h" + +#ifdef BOARD_maple_mini + +/* Since we want the Serial Wire/JTAG pins as GPIOs, disable both SW + * and JTAG debug support */ +void boardInit(void) { + afio_mapr_swj_config(AFIO_MAPR_SWJ_NO_JTAG_NO_SW); +} + +stm32_pin_info PIN_MAP[NR_GPIO_PINS] = { + + /* Top header */ + + {GPIOB, NULL, 11, 0, ADCx}, /* D0/PB11 */ + {GPIOB, NULL, 10, 0, ADCx}, /* D1/PB10 */ + {GPIOB, NULL, 2, 0, ADCx}, /* D2/PB2 */ + {GPIOB, TIMER3, 0, 3, 8}, /* D3/PB0 */ + {GPIOA, TIMER3, 7, 2, 7}, /* D4/PA7 */ + {GPIOA, TIMER3, 6, 1, 6}, /* D5/PA6 */ + {GPIOA, NULL, 5, 0, 5}, /* D6/PA5 */ + {GPIOA, NULL, 4, 0, 4}, /* D7/PA4 */ + {GPIOA, TIMER2, 3, 4, 3}, /* D8/PA3 */ + {GPIOA, TIMER2, 2, 3, 2}, /* D9/PA2 */ + {GPIOA, TIMER2, 1, 2, 1}, /* D10/PA1 */ + {GPIOA, TIMER2, 0, 1, 0}, /* D11/PA0 */ + {GPIOC, NULL, 15, 0, ADCx}, /* D12/PC15 */ + {GPIOC, NULL, 14, 0, ADCx}, /* D13/PC14 */ + {GPIOC, NULL, 13, 0, ADCx}, /* D14/PC13 */ + + /* Bottom header */ + + {GPIOB, TIMER4, 7, 2, ADCx}, /* D15/PB7 */ + {GPIOB, TIMER4, 6, 1, ADCx}, /* D16/PB6 */ + {GPIOB, NULL, 5, 0, ADCx}, /* D17/PB5 */ + {GPIOB, NULL, 4, 0, ADCx}, /* D18/PB4 */ + {GPIOB, NULL, 3, 0, ADCx}, /* D19/PB3 */ + {GPIOA, NULL, 15, 0, ADCx}, /* D20/PA15 */ + {GPIOA, NULL, 14, 0, ADCx}, /* D21/PA14 */ + {GPIOA, NULL, 13, 0, ADCx}, /* D22/PA13 */ + {GPIOA, NULL, 12, 0, ADCx}, /* D23/PA12 */ + {GPIOA, TIMER1, 11, 4, ADCx}, /* D24/PA11 */ + {GPIOA, TIMER1, 10, 3, ADCx}, /* D25/PA10 */ + {GPIOA, TIMER2, 9, 2, ADCx}, /* D26/PA9 */ + {GPIOA, TIMER1, 8, 1, ADCx}, /* D27/PA8 */ + {GPIOB, NULL, 15, 0, ADCx}, /* D28/PB15 */ + {GPIOB, NULL, 14, 0, ADCx}, /* D29/PB14 */ + {GPIOB, NULL, 13, 0, ADCx}, /* D30/PB13 */ + {GPIOB, NULL, 12, 0, ADCx}, /* D31/PB12 */ + {GPIOB, TIMER4, 8, 3, ADCx}, /* D32/PB8 */ + {GPIOB, TIMER3, 1, 4, 9}, /* D33/PB1 */ +}; + +#endif diff --git a/wirish/boards/maple_mini.h b/wirish/boards/maple_mini.h new file mode 100644 index 0000000..bfb92a5 --- /dev/null +++ b/wirish/boards/maple_mini.h @@ -0,0 +1,60 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple_mini.h + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Private include file for Maple Mini in boards.h + * + * See maple.h for more information on these definitions. + */ + +#include "gpio.h" +#include "timer.h" + +#include "wirish_types.h" + +#ifndef _BOARD_MAPLE_MINI_H_ +#define _BOARD_MAPLE_MINI_H_ + +#define CYCLES_PER_MICROSECOND 72 +#define SYSTICK_RELOAD_VAL 71999 /* takes a cycle to reload */ + +#define BOARD_BUTTON_PIN 32 +#define BOARD_LED_PIN 33 + +#define NR_USARTS 3 + +#define BOARD_USART1_TX_PIN 26 +#define BOARD_USART1_RX_PIN 25 +#define BOARD_USART2_TX_PIN 9 +#define BOARD_USART2_RX_PIN 8 +#define BOARD_USART3_TX_PIN 1 +#define BOARD_USART3_RX_PIN 0 + +#define NR_GPIO_PINS 34 + +#endif diff --git a/wirish/boards/maple_native.cpp b/wirish/boards/maple_native.cpp new file mode 100644 index 0000000..c04e98f --- /dev/null +++ b/wirish/boards/maple_native.cpp @@ -0,0 +1,155 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple_native.cpp + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Maple Native PIN_MAP and boardInit(). + */ + +#include "maple_native.h" +#include "native_sram.h" + +#ifdef BOARD_maple_native + +void boardInit(void) { + initNativeSRAM(); +} + +stm32_pin_info PIN_MAP[NR_GPIO_PINS] = { + + /* Top header */ + + {GPIOB, NULL, 10, 0, ADCx}, /* D0/PB10 */ + {GPIOB, NULL, 2, 0, ADCx}, /* D1/PB2 */ + {GPIOB, NULL, 12, 0, ADCx}, /* D2/PB12 */ + {GPIOB, NULL, 13, 0, ADCx}, /* D3/PB13 */ + {GPIOB, NULL, 14, 0, ADCx}, /* D4/PB14 */ + {GPIOB, NULL, 15, 0, ADCx}, /* D5/PB15 */ + {GPIOC, NULL, 0, 0, 10}, /* D6/PC0 */ + {GPIOC, NULL, 1, 0, 11}, /* D7/PC1 */ + {GPIOC, NULL, 2, 0, 12}, /* D8/PC2 */ + {GPIOC, NULL, 3, 0, 13}, /* D9/PC3 */ + {GPIOC, NULL, 4, 0, 14}, /* D10/PC4 */ + {GPIOC, NULL, 5, 0, 15}, /* D11/PC5 */ + {GPIOC, TIMER8, 6, 1, ADCx}, /* D12/PC6 */ + {GPIOC, TIMER8, 7, 2, ADCx}, /* D13/PC7 */ + {GPIOC, TIMER8, 8, 3, ADCx}, /* D14/PC8 */ + {GPIOC, TIMER8, 9, 4, ADCx}, /* D15/PC9 */ + {GPIOC, NULL, 10, 0, ADCx}, /* D16/PC10 */ + {GPIOC, NULL, 11, 0, ADCx}, /* D17/PC11 */ + {GPIOC, NULL, 12, 0, ADCx}, /* D18/PC12 */ + {GPIOC, NULL, 13, 0, ADCx}, /* D19/PC13 */ + {GPIOC, NULL, 14, 0, ADCx}, /* D20/PC14 */ + {GPIOC, NULL, 15, 0, ADCx}, /* D21/PC15 */ + {GPIOA, TIMER1, 8, 1, ADCx}, /* D22/PA8 */ + {GPIOA, TIMER1, 9, 2, ADCx}, /* D23/PA9 */ + {GPIOA, TIMER1, 10, 3, ADCx}, /* D24/PA10 */ + {GPIOB, TIMER4, 9, 4, ADCx}, /* D25/PB9 */ + + /* Bottom header */ + /* FIXME (?) What about D48--D50 also being TIMER2_CH[234]? */ + + {GPIOD, NULL, 2, 0, ADCx}, /* D26/PD2 */ + {GPIOD, NULL, 3, 0, ADCx}, /* D27/PD3 */ + {GPIOD, NULL, 6, 0, ADCx}, /* D28/PD6 */ + {GPIOG, NULL, 11, 0, ADCx}, /* D29/PG11 */ + {GPIOG, NULL, 12, 0, ADCx}, /* D30/PG12 */ + {GPIOG, NULL, 13, 0, ADCx}, /* D31/PG13 */ + {GPIOG, NULL, 14, 0, ADCx}, /* D32/PG14 */ + {GPIOG, NULL, 8, 0, ADCx}, /* D33/PG8 */ + {GPIOG, NULL, 7, 0, ADCx}, /* D34/PG7 */ + {GPIOG, NULL, 6, 0, ADCx}, /* D35/PG6 */ + {GPIOB, NULL, 5, 0, ADCx}, /* D36/PB5 */ + {GPIOB, TIMER4, 6, 1, ADCx}, /* D37/PB6 */ + {GPIOB, TIMER4, 7, 2, ADCx}, /* D38/PB7 */ + {GPIOF, NULL, 6, 0, 4}, /* D39/PF6 */ + {GPIOF, NULL, 7, 0, 5}, /* D40/PF7 */ + {GPIOF, NULL, 8, 0, 6}, /* D41/PF8 */ + {GPIOF, NULL, 9, 0, 7}, /* D42/PF9 */ + {GPIOF, NULL, 10, 0, 8}, /* D43/PF10 */ + {GPIOF, NULL, 11, 0, ADCx}, /* D44/PF11 */ + {GPIOB, TIMER3, 1, 4, 9}, /* D45/PB1 */ + {GPIOB, TIMER3, 0, 3, 8}, /* D46/PB0 */ + {GPIOA, TIMER5, 0, 1, 0}, /* D47/PA0 */ + {GPIOA, TIMER5, 1, 2, 1}, /* D48/PA1 */ + {GPIOA, TIMER5, 2, 3, 2}, /* D49/PA2 */ + {GPIOA, TIMER5, 3, 4, 3}, /* D50/PA3 */ + {GPIOA, NULL, 4, 0, 4}, /* D51/PA4 */ + {GPIOA, NULL, 5, 0, 5}, /* D52/PA5 */ + {GPIOA, TIMER3, 6, 1, 6}, /* D53/PA6 */ + {GPIOA, TIMER3, 7, 2, 7}, /* D54/PA7 */ + + /* Right (triple) header */ + + {GPIOF, NULL, 0, 0, ADCx}, /* D55/PF0 */ + {GPIOD, NULL, 11, 0, ADCx}, /* D56/PD11 */ + {GPIOD, NULL, 14, 0, ADCx}, /* D57/PD14 */ + {GPIOF, NULL, 1, 0, ADCx}, /* D58/PF1 */ + {GPIOD, NULL, 12, 0, ADCx}, /* D59/PD12 */ + {GPIOD, NULL, 15, 0, ADCx}, /* D60/PD15 */ + {GPIOF, NULL, 2, 0, ADCx}, /* D61/PF2 */ + {GPIOD, NULL, 13, 0, ADCx}, /* D62/PD13 */ + {GPIOD, NULL, 0, 0, ADCx}, /* D63/PD0 */ + {GPIOF, NULL, 3, 0, ADCx}, /* D64/PF3 */ + {GPIOE, NULL, 3, 0, ADCx}, /* D65/PE3 */ + {GPIOD, NULL, 1, 0, ADCx}, /* D66/PD1 */ + {GPIOF, NULL, 4, 0, ADCx}, /* D67/PF4 */ + {GPIOE, NULL, 4, 0, ADCx}, /* D68/PE4 */ + {GPIOE, NULL, 7, 0, ADCx}, /* D69/PE7 */ + {GPIOF, NULL, 5, 0, ADCx}, /* D70/PF5 */ + {GPIOE, NULL, 5, 0, ADCx}, /* D71/PE5 */ + {GPIOE, NULL, 8, 0, ADCx}, /* D72/PE8 */ + {GPIOF, NULL, 12, 0, ADCx}, /* D73/PF12 */ + {GPIOE, NULL, 6, 0, ADCx}, /* D74/PE6 */ + {GPIOE, NULL, 9, 0, ADCx}, /* D75/PE9 */ + {GPIOF, NULL, 13, 0, ADCx}, /* D76/PF13 */ + {GPIOE, NULL, 10, 0, ADCx}, /* D77/PE10 */ + {GPIOF, NULL, 14, 0, ADCx}, /* D78/PF14 */ + {GPIOG, NULL, 9, 0, ADCx}, /* D79/PG9 */ + {GPIOE, NULL, 11, 0, ADCx}, /* D80/PE11 */ + {GPIOF, NULL, 15, 0, ADCx}, /* D81/PF15 */ + {GPIOG, NULL, 10, 0, ADCx}, /* D82/PG10 */ + {GPIOE, NULL, 12, 0, ADCx}, /* D83/PE12 */ + {GPIOG, NULL, 0, 0, ADCx}, /* D84/PG0 */ + {GPIOD, NULL, 5, 0, ADCx}, /* D85/PD5 */ + {GPIOE, NULL, 13, 0, ADCx}, /* D86/PE13 */ + {GPIOG, NULL, 1, 0, ADCx}, /* D87/PG1 */ + {GPIOD, NULL, 4, 0, ADCx}, /* D88/PD4 */ + {GPIOE, NULL, 14, 0, ADCx}, /* D89/PE14 */ + {GPIOG, NULL, 2, 0, ADCx}, /* D90/PG2 */ + {GPIOE, NULL, 1, 0, ADCx}, /* D91/PE1 */ + {GPIOE, NULL, 15, 0, ADCx}, /* D92/PE15 */ + {GPIOG, NULL, 3, 0, ADCx}, /* D93/PG3 */ + {GPIOE, NULL, 0, 0, ADCx}, /* D94/PE0 */ + {GPIOD, NULL, 8, 0, ADCx}, /* D95/PD8 */ + {GPIOG, NULL, 4, 0, ADCx}, /* D96/PG4 */ + {GPIOD, NULL, 9, 0, ADCx}, /* D97/PD9 */ + {GPIOG, NULL, 5, 0, ADCx}, /* D98/PG5 */ + {GPIOD, NULL, 10, 0, ADCx} /* D99/PD10 */ +}; + +#endif diff --git a/wirish/boards/maple_native.h b/wirish/boards/maple_native.h new file mode 100644 index 0000000..21fc480 --- /dev/null +++ b/wirish/boards/maple_native.h @@ -0,0 +1,64 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file maple_native.h + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Private include file for Maple Native in boards.h + * + * See maple.h for more information on these definitions. + */ + +#include "gpio.h" +#include "timer.h" + +#include "wirish_types.h" + +#ifndef _BOARD_MAPLE_NATIVE_H_ +#define _BOARD_MAPLE_NATIVE_H_ + +#define CYCLES_PER_MICROSECOND 72 +#define SYSTICK_RELOAD_VAL 71999 + +#define BOARD_LED_PIN D21 +#define BOARD_BUTTON_PIN D18 + +#define NR_USARTS 5 + +#define BOARD_USART1_TX_PIN 25 +#define BOARD_USART1_RX_PIN 26 +#define BOARD_USART2_TX_PIN 51 +#define BOARD_USART2_RX_PIN 52 +#define BOARD_USART3_TX_PIN 0 +#define BOARD_USART3_RX_PIN 1 +#define BOARD_UART4_TX_PIN 18 +#define BOARD_UART4_RX_PIN 19 +#define BOARD_UART5_TX_PIN 20 +#define BOARD_UART5_RX_PIN 28 + +#define NR_GPIO_PINS 100 + +#endif diff --git a/wirish/ext_interrupts.cpp b/wirish/ext_interrupts.cpp index 5b32b05..060994f 100644 --- a/wirish/ext_interrupts.cpp +++ b/wirish/ext_interrupts.cpp @@ -49,8 +49,8 @@ void attachInterrupt(uint8 pin, voidFuncPtr handler, ExtIntTriggerMode mode) { exti_trigger_mode outMode = exti_out_mode(mode); - exti_attach_interrupt((afio_exti_num)(PIN_MAP[pin].pin), - PIN_MAP[pin].ext_port, + exti_attach_interrupt((afio_exti_num)(PIN_MAP[pin].gpio_pin), + gpio_exti_port(PIN_MAP[pin].gpio_device), handler, outMode); } @@ -64,7 +64,7 @@ void detachInterrupt(uint8 pin) { return; } - exti_detach_interrupt((afio_exti_num)(PIN_MAP[pin].pin)); + exti_detach_interrupt((afio_exti_num)(PIN_MAP[pin].gpio_pin)); } static inline exti_trigger_mode exti_out_mode(ExtIntTriggerMode mode) { diff --git a/wirish/rules.mk b/wirish/rules.mk index d250cb9..c1d59bc 100644 --- a/wirish/rules.mk +++ b/wirish/rules.mk @@ -4,8 +4,9 @@ dirstack_$(sp) := $(d) d := $(dir) BUILDDIRS += $(BUILD_PATH)/$(d) BUILDDIRS += $(BUILD_PATH)/$(d)/comm +BUILDDIRS += $(BUILD_PATH)/$(d)/boards -WIRISH_INCLUDES := -I$(d) -I$(d)/comm +WIRISH_INCLUDES := -I$(d) -I$(d)/comm -I$(d)/boards # Local flags CFLAGS_$(d) := $(WIRISH_INCLUDES) $(LIBMAPLE_INCLUDES) @@ -15,6 +16,10 @@ cSRCS_$(d) := cppSRCS_$(d) := wirish_math.cpp \ Print.cpp \ + boards/maple.cpp \ + boards/maple_mini.cpp \ + boards/maple_native.cpp \ + boards/maple_RET6.cpp \ comm/HardwareSerial.cpp \ comm/HardwareSPI.cpp \ usb_serial.cpp \ @@ -27,9 +32,8 @@ cppSRCS_$(d) := wirish_math.cpp \ ext_interrupts.cpp \ wirish_digital.cpp \ native_sram.cpp \ - boards.cpp -cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) +cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%) cppFILES_$(d) := $(cppSRCS_$(d):%=$(d)/%) OBJS_$(d) := $(cFILES_$(d):%.c=$(BUILD_PATH)/%.o) \ diff --git a/wirish/wirish.cpp b/wirish/wirish.cpp index 6dcb1b5..aeed089 100644 --- a/wirish/wirish.cpp +++ b/wirish/wirish.cpp @@ -59,8 +59,7 @@ void init(void) { setupADC(); setupTimers(); setupUSB(); - - BOARD_INIT; + boardInit(); } static void setupFlash(void) { diff --git a/wirish/wirish.h b/wirish/wirish.h index 319df97..13b14b6 100644 --- a/wirish/wirish.h +++ b/wirish/wirish.h @@ -33,6 +33,7 @@ #include "libmaple.h" +#include "wirish_types.h" #include "boards.h" #include "io.h" #include "bits.h" diff --git a/wirish/wirish_analog.cpp b/wirish/wirish_analog.cpp index a658184..9e99aa5 100644 --- a/wirish/wirish_analog.cpp +++ b/wirish/wirish_analog.cpp @@ -33,7 +33,7 @@ /* Assumes that the ADC has been initialized and that the pin is set * to ANALOG_INPUT */ uint32 analogRead(uint8 pin) { - if(PIN_MAP[pin].adc_channel == ADC_INVALID) { + if(PIN_MAP[pin].adc_channel == ADCx) { return 0; } diff --git a/wirish/wirish_digital.cpp b/wirish/wirish_digital.cpp index 4b68861..278cf10 100644 --- a/wirish/wirish_digital.cpp +++ b/wirish/wirish_digital.cpp @@ -70,7 +70,7 @@ void pinMode(uint8 pin, WiringPinMode mode) { return; } - gpio_set_mode(PIN_MAP[pin].gpio_device, PIN_MAP[pin].pin, outputMode); + gpio_set_mode(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_pin, outputMode); if (PIN_MAP[pin].timer_device != NULL) { /* enable/disable timer channels if we're switching into or @@ -93,7 +93,7 @@ uint32 digitalRead(uint8 pin) { return 0; } - return gpio_read_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].pin) ? + return gpio_read_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_pin) ? HIGH : LOW; } @@ -102,7 +102,7 @@ void digitalWrite(uint8 pin, uint8 val) { return; } - gpio_write_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].pin, val); + gpio_write_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_pin, val); } void togglePin(uint8 pin) { @@ -110,7 +110,7 @@ void togglePin(uint8 pin) { return; } - gpio_toggle_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].pin); + gpio_toggle_bit(PIN_MAP[pin].gpio_device, PIN_MAP[pin].gpio_pin); } uint8 isButtonPressed() { diff --git a/wirish/wirish_types.h b/wirish/wirish_types.h new file mode 100644 index 0000000..84591ea --- /dev/null +++ b/wirish/wirish_types.h @@ -0,0 +1,51 @@ +/****************************************************************************** + * The MIT License + * + * Copyright (c) 2011 LeafLabs, LLC. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + *****************************************************************************/ + +/** + * @file wirish_types.h + * @author Marti Bolivar <mbolivar@leaflabs.com> + * @brief Wirish library type definitions. + */ + +#include "gpio.h" +#include "timer.h" + +#ifndef _WIRISH_TYPES_H_ +#define _WIRISH_TYPES_H_ + +/** Stores STM32-specific information related to a given pin. */ +typedef struct stm32_pin_info { + gpio_dev *gpio_device; /**< Maple pin's GPIO device */ + timer_dev *timer_device; /**< Maple pin's timer device, or NULL if none. */ + uint8 gpio_pin; /**< GPIO pin */ + uint8 timer_chan; /**< Timer channel, or 0 if none. */ + uint8 adc_channel; /**< Pin ADC channel, or ADCx if none. */ +} stm32_pin_info; + +/** Invalid adc_channel value */ +#define ADCx 0xFF + +#endif |