Initial timer refactor.

Basic PWM works.  Had some problems in testing that might be due to
USART bugs.

HardwareTimer has been removed from the build for now; I will
re-implement it in terms of the new libmaple API, but consider it
deprecated.  Let's come up with something better.

Servo is implemented in terms of HardwareTimer, so it also has been
temporarily removed from the build.

pwmWrite() likely got a little bit less inefficient due to
indirection, but the PIN_MAPs shrank by a pointer per PinMapping.

10 files changed, 338 insertions, 507 deletions

diff --git a/wirish/boards.cpp b/wirish/boards.cpp
index 66f008f..d99b019 100644
--- a/wirish/boards.cpp
+++ b/wirish/boards.cpp
@@ -1,96 +1,56 @@
 #include "boards.h"
 
-// think of the poor column numbers
+// For concision
 #define ADCx ADC_INVALID
-#define TIMERx TIMER_INVALID
 
 #if defined(BOARD_maple)
 
 PinMapping PIN_MAP[NR_GPIO_PINS] = {
-    /* D0/PA3 */
-    {GPIOA,  3,    3, TIMER2_CH4_CCR, TIMER2,      4, AFIO_EXTI_PA},
-    /* D1/PA2 */
-    {GPIOA,  2,    2, TIMER2_CH3_CCR, TIMER2,      3, AFIO_EXTI_PA},
-    /* D2/PA0 */
-    {GPIOA,  0,    0, TIMER2_CH1_CCR, TIMER2,      1, AFIO_EXTI_PA},
-    /* D3/PA1 */
-    {GPIOA,  1,    1, TIMER2_CH2_CCR, TIMER2,      2, AFIO_EXTI_PA},
-    /* D4/PB5 */
-    {GPIOB,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D5/PB6 */
-    {GPIOB,  6, ADCx, TIMER4_CH1_CCR, TIMER4,      1, AFIO_EXTI_PB},
-    /* D6/PA8 */
-    {GPIOA,  8, ADCx, TIMER1_CH1_CCR, TIMER1,      1, AFIO_EXTI_PA},
-    /* D7/PA9 */
-    {GPIOA,  9, ADCx, TIMER1_CH2_CCR, TIMER1,      2, AFIO_EXTI_PA},
-    /* D8/PA10 */
-    {GPIOA, 10, ADCx, TIMER1_CH3_CCR, TIMER1,      3, AFIO_EXTI_PA},
-    /* D9/PB7 */
-    {GPIOB,  7, ADCx, TIMER4_CH2_CCR, TIMER4,      2, AFIO_EXTI_PB},
-    /* D10/PA4 */
-    {GPIOA,  4,    4,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D11/PA7 */
-    {GPIOA,  7,    7, TIMER3_CH2_CCR, TIMER3,      2, AFIO_EXTI_PA},
-    /* D12/PA6 */
-    {GPIOA,  6,    6, TIMER3_CH1_CCR, TIMER3,      1, AFIO_EXTI_PA},
-    /* D13/PA5 */
-    {GPIOA,  5,    5,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D14/PB8 */
-    {GPIOB,  8, ADCx, TIMER4_CH3_CCR, TIMER4,      3, AFIO_EXTI_PB},
+    {GPIOA,  3,    3, TIMER2, 4, AFIO_EXTI_PA}, /* D0/PA3 */
+    {GPIOA,  2,    2, TIMER2, 3, AFIO_EXTI_PA}, /* D1/PA2 */
+    {GPIOA,  0,    0, TIMER2, 1, AFIO_EXTI_PA}, /* D2/PA0 */
+    {GPIOA,  1,    1, TIMER2, 2, AFIO_EXTI_PA}, /* D3/PA1 */
+    {GPIOB,  5, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D4/PB5 */
+    {GPIOB,  6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D5/PB6 */
+    {GPIOA,  8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D6/PA8 */
+    {GPIOA,  9, ADCx, TIMER1, 2, AFIO_EXTI_PA}, /* D7/PA9 */
+    {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D8/PA10 */
+    {GPIOB,  7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D9/PB7 */
+    {GPIOA,  4,    4,   NULL, 0, AFIO_EXTI_PA}, /* D10/PA4 */
+    {GPIOA,  7,    7, TIMER3, 2, AFIO_EXTI_PA}, /* D11/PA7 */
+    {GPIOA,  6,    6, TIMER3, 1, AFIO_EXTI_PA}, /* D12/PA6 */
+    {GPIOA,  5,    5,   NULL, 0, AFIO_EXTI_PA}, /* D13/PA5 (LED) */
+    {GPIOB,  8, ADCx, TIMER4, 3, AFIO_EXTI_PB}, /* D14/PB8 */
 
     /* Little header */
 
-    /* D15/PC0 */
-    {GPIOC,  0,   10,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D16/PC1 */
-    {GPIOC,  1,   11,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D17/PC2 */
-    {GPIOC,  2,   12,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D18/PC3 */
-    {GPIOC,  3,   13,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D19/PC4 */
-    {GPIOC,  4,   14,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D20/PC5 */
-    {GPIOC,  5,   15,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
+    {GPIOC,  0,   10,   NULL, 0, AFIO_EXTI_PC}, /* D15/PC0 */
+    {GPIOC,  1,   11,   NULL, 0, AFIO_EXTI_PC}, /* D16/PC1 */
+    {GPIOC,  2,   12,   NULL, 0, AFIO_EXTI_PC}, /* D17/PC2 */
+    {GPIOC,  3,   13,   NULL, 0, AFIO_EXTI_PC}, /* D18/PC3 */
+    {GPIOC,  4,   14,   NULL, 0, AFIO_EXTI_PC}, /* D19/PC4 */
+    {GPIOC,  5,   15,   NULL, 0, AFIO_EXTI_PC}, /* D20/PC5 */
 
     /* External header */
 
-    /* D21/PC13 */
-    {GPIOC, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D22/PC14 */
-    {GPIOC, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D23/PC15 */
-    {GPIOC, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D24/PB9 */
-    {GPIOB,  9, ADCx, TIMER4_CH4_CCR, TIMER4,      4, AFIO_EXTI_PB},
-    /* D25/PD2 */
-    {GPIOD,  2, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D26/PC10 */
-    {GPIOC, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D27/PB0 */
-    {GPIOB,  0,    8, TIMER3_CH3_CCR, TIMER3,      3, AFIO_EXTI_PB},
-    /* D28/PB1 */
-    {GPIOB,  1,    9, TIMER3_CH4_CCR, TIMER3,      4, AFIO_EXTI_PB},
-    /* D29/PB10 */
-    {GPIOB, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D30/PB11 */
-    {GPIOB, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D31/PB12 */
-    {GPIOB, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D32/PB13 */
-    {GPIOB, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D33/PB14 */
-    {GPIOB, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D34/PB15 */
-    {GPIOB, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D35/PC6 */
-    {GPIOC,  6, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D36/PC7 */
-    {GPIOC,  7, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D37/PC8 */
-    {GPIOC,  8, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D38/PC9 (BUT) */
-    {GPIOC,  9, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC}
+    {GPIOC, 13, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D21/PC13 */
+    {GPIOC, 14, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D22/PC14 */
+    {GPIOC, 15, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D23/PC15 */
+    {GPIOB,  9, ADCx, TIMER4, 4, AFIO_EXTI_PB}, /* D24/PB9 */
+    {GPIOD,  2, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D25/PD2 */
+    {GPIOC, 10, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D26/PC10 */
+    {GPIOB,  0,    8, TIMER3, 3, AFIO_EXTI_PB}, /* D27/PB0 */
+    {GPIOB,  1,    9, TIMER3, 4, AFIO_EXTI_PB}, /* D28/PB1 */
+    {GPIOB, 10, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D29/PB10 */
+    {GPIOB, 11, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D30/PB11 */
+    {GPIOB, 12, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D31/PB12 */
+    {GPIOB, 13, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D32/PB13 */
+    {GPIOB, 14, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D33/PB14 */
+    {GPIOB, 15, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D34/PB15 */
+    {GPIOC,  6, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D35/PC6 */
+    {GPIOC,  7, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D36/PC7 */
+    {GPIOC,  8, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D37/PC8 */
+    {GPIOC,  9, ADCx,   NULL, 0, AFIO_EXTI_PC}  /* D38/PC9 (BUT) */
 };
 
 #elif defined(BOARD_maple_native)
@@ -98,375 +58,207 @@ PinMapping PIN_MAP[NR_GPIO_PINS] = {
 PinMapping PIN_MAP[NR_GPIO_PINS] = {
     /* Top header */
 
-    /* D0/PB10 */
-    {GPIOB, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D1/PB2 */
-    {GPIOB,  2, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D2/PB12 */
-    {GPIOB, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D3/PB13 */
-    {GPIOB, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D4/PB14 */
-    {GPIOB, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D5/PB15 */
-    {GPIOB, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D6/PC0 */
-    {GPIOC,  0,   10,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D7/PC1 */
-    {GPIOC,  1,   11,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D8/PC2 */
-    {GPIOC,  2,   12,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D9/PC3 */
-    {GPIOC,  3,   13,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D10/PC4 */
-    {GPIOC,  4,   14,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D11/PC5 */
-    {GPIOC,  5,   15,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D12/PC6 */
-    {GPIOC,  6, ADCx, TIMER8_CH1_CCR, TIMER8,      1, AFIO_EXTI_PC},
-    /* D13/PC7 */
-    {GPIOC,  7, ADCx, TIMER8_CH2_CCR, TIMER8,      2, AFIO_EXTI_PC},
-    /* D14/PC8 */
-    {GPIOC,  8, ADCx, TIMER8_CH3_CCR, TIMER8,      3, AFIO_EXTI_PC},
-    /* D15/PC9 */
-    {GPIOC,  9, ADCx, TIMER8_CH4_CCR, TIMER8,      4, AFIO_EXTI_PC},
-    /* D16/PC10 */
-    {GPIOC, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D17/PC11 */
-    {GPIOC, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D18/PC12 */
-    {GPIOC, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D19/PC13 */
-    {GPIOC, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D20/PC14 */
-    {GPIOC, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D21/PC15 */
-    {GPIOC, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D22/PA8 */
-    {GPIOA,  8, ADCx, TIMER1_CH1_CCR, TIMER1,      1, AFIO_EXTI_PA},
-    /* D23/PA9 */
-    {GPIOA,  9, ADCx, TIMER1_CH2_CCR, TIMER1,      2, AFIO_EXTI_PA},
-    /* D24/PA10 */
-    {GPIOA, 10, ADCx, TIMER1_CH3_CCR, TIMER1,      3, AFIO_EXTI_PA},
-    /* D25/PB9 */
-    {GPIOB,  9, ADCx, TIMER4_CH4_CCR, TIMER4,      4, AFIO_EXTI_PB},
+    {GPIOB, 10, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D0/PB10 */
+    {GPIOB,  2, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D1/PB2 */
+    {GPIOB, 12, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D2/PB12 */
+    {GPIOB, 13, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D3/PB13 */
+    {GPIOB, 14, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D4/PB14 */
+    {GPIOB, 15, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D5/PB15 */
+    {GPIOC,  0,   10,   NULL, 0, AFIO_EXTI_PC}, /* D6/PC0 */
+    {GPIOC,  1,   11,   NULL, 0, AFIO_EXTI_PC}, /* D7/PC1 */
+    {GPIOC,  2,   12,   NULL, 0, AFIO_EXTI_PC}, /* D8/PC2 */
+    {GPIOC,  3,   13,   NULL, 0, AFIO_EXTI_PC}, /* D9/PC3 */
+    {GPIOC,  4,   14,   NULL, 0, AFIO_EXTI_PC}, /* D10/PC4 */
+    {GPIOC,  5,   15,   NULL, 0, AFIO_EXTI_PC}, /* D11/PC5 */
+    {GPIOC,  6, ADCx, TIMER8, 1, AFIO_EXTI_PC}, /* D12/PC6 */
+    {GPIOC,  7, ADCx, TIMER8, 2, AFIO_EXTI_PC}, /* D13/PC7 */
+    {GPIOC,  8, ADCx, TIMER8, 3, AFIO_EXTI_PC}, /* D14/PC8 */
+    {GPIOC,  9, ADCx, TIMER8, 4, AFIO_EXTI_PC}, /* D15/PC9 */
+    {GPIOC, 10, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D16/PC10 */
+    {GPIOC, 11, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D17/PC11 */
+    {GPIOC, 12, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D18/PC12 */
+    {GPIOC, 13, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D19/PC13 */
+    {GPIOC, 14, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D20/PC14 */
+    {GPIOC, 15, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D21/PC15 */
+    {GPIOA,  8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D22/PA8 */
+    {GPIOA,  9, ADCx, TIMER1, 2, AFIO_EXTI_PA}, /* D23/PA9 */
+    {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D24/PA10 */
+    {GPIOB,  9, ADCx, TIMER4, 4, AFIO_EXTI_PB}, /* D25/PB9 */
 
     /* Bottom header */
+    /* FIXME (?) What about D48--D50 also being TIMER2_CH[234]? */
 
-    /* D26/PD2 */
-    {GPIOD,  2, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D27/PD3 */
-    {GPIOD,  3, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D28/PD6 */
-    {GPIOD,  6, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D29/PG11 */
-    {GPIOG, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D30/PG12 */
-    {GPIOG, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D31/PG13 */
-    {GPIOG, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D32/PG14 */
-    {GPIOG, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D33/PG8 */
-    {GPIOG,  8, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D34/PG7 */
-    {GPIOG,  7, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D35/PG6 */
-    {GPIOG,  6, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D36/PB5 */
-    {GPIOB,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D37/PB6 */
-    {GPIOB,  6, ADCx, TIMER4_CH1_CCR, TIMER4,      1, AFIO_EXTI_PB},
-    /* D38/PB7 */
-    {GPIOB,  7, ADCx, TIMER4_CH2_CCR, TIMER4,      2, AFIO_EXTI_PB},
-    /* D39/PF6 */
-    {GPIOF,  6,    4,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D40/PF7 */
-    {GPIOF,  7,    5,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D41/PF8 */
-    {GPIOF,  8,    6,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D42/PF9 */
-    {GPIOF,  9,    7,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D43/PF10 */
-    {GPIOF, 10,    8,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D44/PF11 */
-    {GPIOF, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D45/PB1 */
-    {GPIOB,  1,    9, TIMER3_CH4_CCR, TIMER3,      4, AFIO_EXTI_PB},
-    /* D46/PB0 */
-    {GPIOB,  0,    8, TIMER3_CH3_CCR, TIMER3,      3, AFIO_EXTI_PB},
-    /* D47/PA0 */
-    {GPIOA,  0,    0, TIMER5_CH1_CCR, TIMER5,      1, AFIO_EXTI_PA},
-    /* D48/PA1 */ /* FIXME (?)
-       What about D48--D50 also being TIMER2_CH[234]? */
-    {GPIOA,  1,    1, TIMER5_CH2_CCR, TIMER5,      2, AFIO_EXTI_PA},
-    /* D49/PA2 */
-    {GPIOA,  2,    2, TIMER5_CH3_CCR, TIMER5,      3, AFIO_EXTI_PA},
-    /* D50/PA3 */
-    {GPIOA,  3,    3, TIMER5_CH4_CCR, TIMER5,      4, AFIO_EXTI_PA},
-    /* D51/PA4 */
-    {GPIOA,  4,    4,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D52/PA5 */
-    {GPIOA,  5,    5,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D53/PA6 */
-    {GPIOA,  6,    6, TIMER3_CH1_CCR, TIMER3,      1, AFIO_EXTI_PA},
-    /* D54/PA7 */
-    {GPIOA,  7,    7, TIMER3_CH2_CCR, TIMER3,      2, AFIO_EXTI_PA},
+    {GPIOD,  2, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D26/PD2 */
+    {GPIOD,  3, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D27/PD3 */
+    {GPIOD,  6, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D28/PD6 */
+    {GPIOG, 11, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D29/PG11 */
+    {GPIOG, 12, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D30/PG12 */
+    {GPIOG, 13, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D31/PG13 */
+    {GPIOG, 14, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D32/PG14 */
+    {GPIOG,  8, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D33/PG8 */
+    {GPIOG,  7, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D34/PG7 */
+    {GPIOG,  6, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D35/PG6 */
+    {GPIOB,  5, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D36/PB5 */
+    {GPIOB,  6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D37/PB6 */
+    {GPIOB,  7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D38/PB7 */
+    {GPIOF,  6,    4,   NULL, 0, AFIO_EXTI_PF}, /* D39/PF6 */
+    {GPIOF,  7,    5,   NULL, 0, AFIO_EXTI_PF}, /* D40/PF7 */
+    {GPIOF,  8,    6,   NULL, 0, AFIO_EXTI_PF}, /* D41/PF8 */
+    {GPIOF,  9,    7,   NULL, 0, AFIO_EXTI_PF}, /* D42/PF9 */
+    {GPIOF, 10,    8,   NULL, 0, AFIO_EXTI_PF}, /* D43/PF10 */
+    {GPIOF, 11, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D44/PF11 */
+    {GPIOB,  1,    9, TIMER3, 4, AFIO_EXTI_PB}, /* D45/PB1 */
+    {GPIOB,  0,    8, TIMER3, 3, AFIO_EXTI_PB}, /* D46/PB0 */
+    {GPIOA,  0,    0, TIMER5, 1, AFIO_EXTI_PA}, /* D47/PA0 */
+    {GPIOA,  1,    1, TIMER5, 2, AFIO_EXTI_PA}, /* D48/PA1 */
+    {GPIOA,  2,    2, TIMER5, 3, AFIO_EXTI_PA}, /* D49/PA2 */
+    {GPIOA,  3,    3, TIMER5, 4, AFIO_EXTI_PA}, /* D50/PA3 */
+    {GPIOA,  4,    4,   NULL, 0, AFIO_EXTI_PA}, /* D51/PA4 */
+    {GPIOA,  5,    5,   NULL, 0, AFIO_EXTI_PA}, /* D52/PA5 */
+    {GPIOA,  6,    6, TIMER3, 1, AFIO_EXTI_PA}, /* D53/PA6 */
+    {GPIOA,  7,    7, TIMER3, 2, AFIO_EXTI_PA}, /* D54/PA7 */
 
     /* Right (triple) header */
 
-    /* D55/PF0 */
-    {GPIOF,  0, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D56/PD11 */
-    {GPIOD, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D57/PD14 */
-    {GPIOD, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D58/PF1 */
-    {GPIOF,  1, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D59/PD12 */
-    {GPIOD, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D60/PD15 */
-    {GPIOD, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D61/PF2 */
-    {GPIOF,  2, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D62/PD13 */
-    {GPIOD, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D63/PD0 */
-    {GPIOD,  0, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D64/PF3 */
-    {GPIOF,  3, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D65/PE3 */
-    {GPIOE,  3, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D66/PD1 */
-    {GPIOD,  1, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D67/PF4 */
-    {GPIOF,  4, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D68/PE4 */
-    {GPIOE,  4, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D69/PE7 */
-    {GPIOE,  7, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D70/PF5 */
-    {GPIOF,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D71/PE5 */
-    {GPIOE,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D72/PE8 */
-    {GPIOE,  8, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D73/PF12 */
-    {GPIOF, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D74/PE6 */
-    {GPIOE,  6, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D75/PE9 */
-    {GPIOE,  9, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D76/PF13 */
-    {GPIOF, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D77/PE10 */
-    {GPIOE, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D78/PF14 */
-    {GPIOF, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D79/PG9 */
-    {GPIOG,  9, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D80/PE11 */
-    {GPIOE, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D81/PF15 */
-    {GPIOF, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PF},
-    /* D82/PG10 */
-    {GPIOG, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D83/PE12 */
-    {GPIOE, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D84/PG0 */
-    {GPIOG,  0, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D85/PD5 */
-    {GPIOD,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D86/PE13 */
-    {GPIOE, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D87/PG1 */
-    {GPIOG,  1, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D88/PD4 */
-    {GPIOD,  4, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D89/PE14 */
-    {GPIOE, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D90/PG2 */
-    {GPIOG,  2, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D91/PE1 */
-    {GPIOE,  1, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D92/PE15 */
-    {GPIOE, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D93/PG3 */
-    {GPIOG,  3, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D94/PE0 */
-    {GPIOE,  0, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PE},
-    /* D95/PD8 */
-    {GPIOD,  8, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D96/PG4 */
-    {GPIOG,  4, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D97/PD9 */
-    {GPIOD,  9, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D98/PG5 */
-    {GPIOG,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PG},
-    /* D99/PD10 */
-    {GPIOD, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD}
+    {GPIOF,  0, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D55/PF0 */
+    {GPIOD, 11, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D56/PD11 */
+    {GPIOD, 14, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D57/PD14 */
+    {GPIOF,  1, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D58/PF1 */
+    {GPIOD, 12, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D59/PD12 */
+    {GPIOD, 15, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D60/PD15 */
+    {GPIOF,  2, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D61/PF2 */
+    {GPIOD, 13, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D62/PD13 */
+    {GPIOD,  0, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D63/PD0 */
+    {GPIOF,  3, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D64/PF3 */
+    {GPIOE,  3, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D65/PE3 */
+    {GPIOD,  1, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D66/PD1 */
+    {GPIOF,  4, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D67/PF4 */
+    {GPIOE,  4, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D68/PE4 */
+    {GPIOE,  7, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D69/PE7 */
+    {GPIOF,  5, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D70/PF5 */
+    {GPIOE,  5, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D71/PE5 */
+    {GPIOE,  8, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D72/PE8 */
+    {GPIOF, 12, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D73/PF12 */
+    {GPIOE,  6, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D74/PE6 */
+    {GPIOE,  9, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D75/PE9 */
+    {GPIOF, 13, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D76/PF13 */
+    {GPIOE, 10, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D77/PE10 */
+    {GPIOF, 14, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D78/PF14 */
+    {GPIOG,  9, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D79/PG9 */
+    {GPIOE, 11, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D80/PE11 */
+    {GPIOF, 15, ADCx,   NULL, 0, AFIO_EXTI_PF}, /* D81/PF15 */
+    {GPIOG, 10, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D82/PG10 */
+    {GPIOE, 12, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D83/PE12 */
+    {GPIOG,  0, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D84/PG0 */
+    {GPIOD,  5, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D85/PD5 */
+    {GPIOE, 13, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D86/PE13 */
+    {GPIOG,  1, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D87/PG1 */
+    {GPIOD,  4, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D88/PD4 */
+    {GPIOE, 14, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D89/PE14 */
+    {GPIOG,  2, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D90/PG2 */
+    {GPIOE,  1, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D91/PE1 */
+    {GPIOE, 15, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D92/PE15 */
+    {GPIOG,  3, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D93/PG3 */
+    {GPIOE,  0, ADCx,   NULL, 0, AFIO_EXTI_PE}, /* D94/PE0 */
+    {GPIOD,  8, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D95/PD8 */
+    {GPIOG,  4, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D96/PG4 */
+    {GPIOD,  9, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D97/PD9 */
+    {GPIOG,  5, ADCx,   NULL, 0, AFIO_EXTI_PG}, /* D98/PG5 */
+    {GPIOD, 10, ADCx,   NULL, 0, AFIO_EXTI_PD}  /* D99/PD10 */
 };
 
 #elif defined(BOARD_maple_mini)
 
 PinMapping PIN_MAP[NR_GPIO_PINS] = {
-    /* D0/PB11 */
-    {GPIOB, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D1/PB10 */
-    {GPIOB, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D2/PB2 */
-    {GPIOB,  2, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D3/PB0 */
-    {GPIOB,  0,    8, TIMER3_CH3_CCR, TIMER3,      3, AFIO_EXTI_PB},
-    /* D4/PA7 */
-    {GPIOA,  7,    7, TIMER3_CH2_CCR, TIMER3,      2, AFIO_EXTI_PA},
-    /* D5/PA6 */
-    {GPIOA,  6,    6, TIMER3_CH1_CCR, TIMER3,      1, AFIO_EXTI_PA},
-    /* D6/PA5 */
-    {GPIOA,  5,    5,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D7/PA4 */
-    {GPIOA,  4,    4,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D8/PA3 */
-    {GPIOA,  3,    3, TIMER2_CH4_CCR, TIMER2,      4, AFIO_EXTI_PA},
-    /* D9/PA2 */
-    {GPIOA,  2,    2, TIMER2_CH3_CCR, TIMER2,      3, AFIO_EXTI_PA},
-    /* D10/PA1 */
-    {GPIOA,  1,    1, TIMER2_CH2_CCR, TIMER2,      2, AFIO_EXTI_PA},
-    /* D11/PA0 */
-    {GPIOA,  0,    0, TIMER2_CH1_CCR, TIMER2,      1, AFIO_EXTI_PA},
-    /* D12/PC15 */
-    {GPIOC, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D13/PC14 */
-    {GPIOC, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D14/PC13 */
-    {GPIOC, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D15/PB7 */
-    {GPIOB,  7, ADCx, TIMER4_CH2_CCR, TIMER4,      2, AFIO_EXTI_PB},
-    /* D16/PB6 */
-    {GPIOB,  6, ADCx, TIMER4_CH1_CCR, TIMER4,      1, AFIO_EXTI_PB},
-    /* D17/PB5 */
-    {GPIOB,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D18/PB4 */
-    {GPIOB,  4, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D19/PB3 */
-    {GPIOB,  3, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D20/PA15 */
-    {GPIOA, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D21/PA14 */
-    {GPIOA, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D22/PA13 */
-    {GPIOA, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D23/PA12 */
-    {GPIOA, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D24/PA11 */
-    {GPIOA, 11, ADCx, TIMER1_CH4_CCR, TIMER1,      4, AFIO_EXTI_PA},
-    /* D25/PA10 */
-    {GPIOA, 10, ADCx, TIMER1_CH3_CCR, TIMER1,      3, AFIO_EXTI_PA},
-    /* D26/PA9 */
-    {GPIOA,  9, ADCx, TIMER1_CH2_CCR, TIMER2,      2, AFIO_EXTI_PA},
-    /* D27/PA8 */
-    {GPIOA,  8, ADCx, TIMER1_CH1_CCR, TIMER1,      1, AFIO_EXTI_PA},
-    /* D28/PB15 */
-    {GPIOB, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D29/PB14 */
-    {GPIOB, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D30/PB13 */
-    {GPIOB, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D31/PB12 */
-    {GPIOB, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D32/PB8 */
-    {GPIOB,  8, ADCx, TIMER4_CH3_CCR, TIMER4,      3, AFIO_EXTI_PB},
-    /* D33/PB1 */
-    {GPIOB,  1,    9, TIMER3_CH4_CCR, TIMER3,      4, AFIO_EXTI_PB},
+    /* Top header */
+
+    {GPIOB, 11, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D0/PB11 */
+    {GPIOB, 10, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D1/PB10 */
+    {GPIOB,  2, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D2/PB2 */
+    {GPIOB,  0,    8, TIMER3, 3, AFIO_EXTI_PB}, /* D3/PB0 */
+    {GPIOA,  7,    7, TIMER3, 2, AFIO_EXTI_PA}, /* D4/PA7 */
+    {GPIOA,  6,    6, TIMER3, 1, AFIO_EXTI_PA}, /* D5/PA6 */
+    {GPIOA,  5,    5,   NULL, 0, AFIO_EXTI_PA}, /* D6/PA5 */
+    {GPIOA,  4,    4,   NULL, 0, AFIO_EXTI_PA}, /* D7/PA4 */
+    {GPIOA,  3,    3, TIMER2, 4, AFIO_EXTI_PA}, /* D8/PA3 */
+    {GPIOA,  2,    2, TIMER2, 3, AFIO_EXTI_PA}, /* D9/PA2 */
+    {GPIOA,  1,    1, TIMER2, 2, AFIO_EXTI_PA}, /* D10/PA1 */
+    {GPIOA,  0,    0, TIMER2, 1, AFIO_EXTI_PA}, /* D11/PA0 */
+    {GPIOC, 15, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D12/PC15 */
+    {GPIOC, 14, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D13/PC14 */
+    {GPIOC, 13, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D14/PC13 */
+
+    /* Bottom header */
+
+    {GPIOB,  7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D15/PB7 */
+    {GPIOB,  6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D16/PB6 */
+    {GPIOB,  5, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D17/PB5 */
+    {GPIOB,  4, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D18/PB4 */
+    {GPIOB,  3, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D19/PB3 */
+    {GPIOA, 15, ADCx,   NULL, 0, AFIO_EXTI_PA}, /* D20/PA15 */
+    {GPIOA, 14, ADCx,   NULL, 0, AFIO_EXTI_PA}, /* D21/PA14 */
+    {GPIOA, 13, ADCx,   NULL, 0, AFIO_EXTI_PA}, /* D22/PA13 */
+    {GPIOA, 12, ADCx,   NULL, 0, AFIO_EXTI_PA}, /* D23/PA12 */
+    {GPIOA, 11, ADCx, TIMER1, 4, AFIO_EXTI_PA}, /* D24/PA11 */
+    {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D25/PA10 */
+    {GPIOA,  9, ADCx, TIMER2, 2, AFIO_EXTI_PA}, /* D26/PA9 */
+    {GPIOA,  8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D27/PA8 */
+    {GPIOB, 15, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D28/PB15 */
+    {GPIOB, 14, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D29/PB14 */
+    {GPIOB, 13, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D30/PB13 */
+    {GPIOB, 12, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D31/PB12 */
+    {GPIOB,  8, ADCx, TIMER4, 3, AFIO_EXTI_PB}, /* D32/PB8 */
+    {GPIOB,  1,    9, TIMER3, 4, AFIO_EXTI_PB}, /* D33/PB1 */
 };
 
 #elif defined(BOARD_maple_RET6)
 
 PinMapping PIN_MAP[NR_GPIO_PINS] = {
-    /* D0/PA3 */
-    {GPIOA,  3,    3, TIMER2_CH4_CCR, TIMER2,      4, AFIO_EXTI_PA},
-    /* D1/PA2 */
-    {GPIOA,  2,    2, TIMER2_CH3_CCR, TIMER2,      3, AFIO_EXTI_PA},
-    /* D2/PA0 */
-    {GPIOA,  0,    0, TIMER2_CH1_CCR, TIMER2,      1, AFIO_EXTI_PA},
-    /* D3/PA1 */
-    {GPIOA,  1,    1, TIMER2_CH2_CCR, TIMER2,      2, AFIO_EXTI_PA},
-    /* D4/PB5 */
-    {GPIOB,  5, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D5/PB6 */
-    {GPIOB,  6, ADCx, TIMER4_CH1_CCR, TIMER4,      1, AFIO_EXTI_PB},
-    /* D6/PA8 */
-    {GPIOA,  8, ADCx, TIMER1_CH1_CCR, TIMER1,      1, AFIO_EXTI_PA},
-    /* D7/PA9 */
-    {GPIOA,  9, ADCx, TIMER1_CH2_CCR, TIMER1,      2, AFIO_EXTI_PA},
-    /* D8/PA10 */
-    {GPIOA, 10, ADCx, TIMER1_CH3_CCR, TIMER1,      3, AFIO_EXTI_PA},
-    /* D9/PB7 */
-    {GPIOB,  7, ADCx, TIMER4_CH2_CCR, TIMER4,      2, AFIO_EXTI_PB},
-    /* D10/PA4 */
-    {GPIOA,  4,    4,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D11/PA7 */
-    {GPIOA,  7,    7, TIMER3_CH2_CCR, TIMER3,      2, AFIO_EXTI_PA},
-    /* D12/PA6 */
-    {GPIOA,  6,    6, TIMER3_CH1_CCR, TIMER3,      1, AFIO_EXTI_PA},
-    /* D13/PA5 */
-    {GPIOA,  5,    5,              0, TIMERx, TIMERx, AFIO_EXTI_PA},
-    /* D14/PB8 */
-    {GPIOB,  8, ADCx, TIMER4_CH3_CCR, TIMER4,      3, AFIO_EXTI_PB},
+    {GPIOA,  3,    3, TIMER2, 4, AFIO_EXTI_PA}, /* D0/PA3 */
+    {GPIOA,  2,    2, TIMER2, 3, AFIO_EXTI_PA}, /* D1/PA2 */
+    {GPIOA,  0,    0, TIMER2, 1, AFIO_EXTI_PA}, /* D2/PA0 */
+    {GPIOA,  1,    1, TIMER2, 2, AFIO_EXTI_PA}, /* D3/PA1 */
+    {GPIOB,  5, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D4/PB5 */
+    {GPIOB,  6, ADCx, TIMER4, 1, AFIO_EXTI_PB}, /* D5/PB6 */
+    {GPIOA,  8, ADCx, TIMER1, 1, AFIO_EXTI_PA}, /* D6/PA8 */
+    {GPIOA,  9, ADCx, TIMER1, 2, AFIO_EXTI_PA}, /* D7/PA9 */
+    {GPIOA, 10, ADCx, TIMER1, 3, AFIO_EXTI_PA}, /* D8/PA10 */
+    {GPIOB,  7, ADCx, TIMER4, 2, AFIO_EXTI_PB}, /* D9/PB7 */
+    {GPIOA,  4,    4,   NULL, 0, AFIO_EXTI_PA}, /* D10/PA4 */
+    {GPIOA,  7,    7, TIMER3, 2, AFIO_EXTI_PA}, /* D11/PA7 */
+    {GPIOA,  6,    6, TIMER3, 1, AFIO_EXTI_PA}, /* D12/PA6 */
+    {GPIOA,  5,    5,   NULL, 0, AFIO_EXTI_PA}, /* D13/PA5 (LED) */
+    {GPIOB,  8, ADCx, TIMER4, 3, AFIO_EXTI_PB}, /* D14/PB8 */
 
     /* Little header */
 
-    /* D15/PC0 */
-    {GPIOC,  0,   10,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D16/PC1 */
-    {GPIOC,  1,   11,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D17/PC2 */
-    {GPIOC,  2,   12,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D18/PC3 */
-    {GPIOC,  3,   13,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D19/PC4 */
-    {GPIOC,  4,   14,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D20/PC5 */
-    {GPIOC,  5,   15,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
+    {GPIOC,  0,   10,   NULL, 0, AFIO_EXTI_PC}, /* D15/PC0 */
+    {GPIOC,  1,   11,   NULL, 0, AFIO_EXTI_PC}, /* D16/PC1 */
+    {GPIOC,  2,   12,   NULL, 0, AFIO_EXTI_PC}, /* D17/PC2 */
+    {GPIOC,  3,   13,   NULL, 0, AFIO_EXTI_PC}, /* D18/PC3 */
+    {GPIOC,  4,   14,   NULL, 0, AFIO_EXTI_PC}, /* D19/PC4 */
+    {GPIOC,  5,   15,   NULL, 0, AFIO_EXTI_PC}, /* D20/PC5 */
 
     /* External header */
 
-    /* D21/PC13 */
-    {GPIOC, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D22/PC14 */
-    {GPIOC, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D23/PC15 */
-    {GPIOC, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D24/PB9 */
-    {GPIOB,  9, ADCx, TIMER4_CH4_CCR, TIMER4,      4, AFIO_EXTI_PB},
-    /* D25/PD2 */
-    {GPIOD,  2, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PD},
-    /* D26/PC10 */
-    {GPIOC, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PC},
-    /* D27/PB0 */
-    {GPIOB,  0,    8, TIMER3_CH3_CCR, TIMER3,      3, AFIO_EXTI_PB},
-    /* D28/PB1 */
-    {GPIOB,  1,    9, TIMER3_CH4_CCR, TIMER3,      4, AFIO_EXTI_PB},
-    /* D29/PB10 */
-    {GPIOB, 10, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D30/PB11 */
-    {GPIOB, 11, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D31/PB12 */
-    {GPIOB, 12, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D32/PB13 */
-    {GPIOB, 13, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D33/PB14 */
-    {GPIOB, 14, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D34/PB15 */
-    {GPIOB, 15, ADCx,              0, TIMERx, TIMERx, AFIO_EXTI_PB},
-    /* D35/PC6 */
-    {GPIOC,  6, ADCx, TIMER8_CH1_CCR, TIMER8,      1, AFIO_EXTI_PC},
-    /* D36/PC7 */
-    {GPIOC,  7, ADCx, TIMER8_CH1_CCR, TIMER8,      2, AFIO_EXTI_PC},
-    /* D37/PC8 */
-    {GPIOC,  8, ADCx, TIMER8_CH1_CCR, TIMER8,      3, AFIO_EXTI_PC},
-    /* D38/PC9 (BUT) */
-    {GPIOC,  9, ADCx, TIMER8_CH1_CCR, TIMER8,      4, AFIO_EXTI_PC}
+    {GPIOC, 13, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D21/PC13 */
+    {GPIOC, 14, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D22/PC14 */
+    {GPIOC, 15, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D23/PC15 */
+    {GPIOB,  9, ADCx, TIMER4, 4, AFIO_EXTI_PB}, /* D24/PB9 */
+    {GPIOD,  2, ADCx,   NULL, 0, AFIO_EXTI_PD}, /* D25/PD2 */
+    {GPIOC, 10, ADCx,   NULL, 0, AFIO_EXTI_PC}, /* D26/PC10 */
+    {GPIOB,  0,    8, TIMER3, 3, AFIO_EXTI_PB}, /* D27/PB0 */
+    {GPIOB,  1,    9, TIMER3, 4, AFIO_EXTI_PB}, /* D28/PB1 */
+    {GPIOB, 10, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D29/PB10 */
+    {GPIOB, 11, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D30/PB11 */
+    {GPIOB, 12, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D31/PB12 */
+    {GPIOB, 13, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D32/PB13 */
+    {GPIOB, 14, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D33/PB14 */
+    {GPIOB, 15, ADCx,   NULL, 0, AFIO_EXTI_PB}, /* D34/PB15 */
+    {GPIOC,  6, ADCx, TIMER8, 1, AFIO_EXTI_PC}, /* D35/PC6 */
+    {GPIOC,  7, ADCx, TIMER8, 2, AFIO_EXTI_PC}, /* D36/PC7 */
+    {GPIOC,  8, ADCx, TIMER8, 3, AFIO_EXTI_PC}, /* D37/PC8 */
+    {GPIOC,  9, ADCx, TIMER8, 4, AFIO_EXTI_PC}  /* D38/PC9 (BUT) */
 };
 
 #else
diff --git a/wirish/boards.h b/wirish/boards.h
index 94566fa..d186dc4 100644
--- a/wirish/boards.h
+++ b/wirish/boards.h
@@ -33,7 +33,8 @@
 
 #include "libmaple.h"
 #include "gpio.h"
-#include "timers.h"
+#include "timer.h"
+#include "native_sram.h"
 
 /* Set of all possible pin names; not all boards have all these (note
    that we use the Dx convention since all of the Maple's pins are
@@ -56,9 +57,8 @@ typedef struct PinMapping {
     gpio_dev *gpio_device;
     uint32 pin;
     uint32 adc_channel;
-    TimerCCR timer_ccr;
-    timer_dev_num timer_num;
-    uint32 timer_chan;
+    timer_dev* timer_device;
+    uint8 timer_chan;
     afio_exti_port ext_port;
 } PinMapping;
 
@@ -94,6 +94,7 @@ extern PinMapping PIN_MAP[];
     #define NR_GPIO_PINS            100
 
     #define BOARD_INIT do {                           \
+           initNativeSRAM();
         } while(0)
 
 #elif defined(BOARD_maple_mini)
diff --git a/wirish/comm/HardwareSPI.cpp b/wirish/comm/HardwareSPI.cpp
index 20090f5..aea7734 100644
--- a/wirish/comm/HardwareSPI.cpp
+++ b/wirish/comm/HardwareSPI.cpp
@@ -47,8 +47,10 @@
  * TODO: Do the complementary PWM outputs mess up SPI2?
  * */
 
-#include "wirish.h"
 #include "spi.h"
+#include "timer.h"
+
+#include "wirish.h"
 #include "HardwareSPI.h"
 
 static const uint32 prescaleFactors[MAX_SPI_FREQS] = {
diff --git a/wirish/comm/HardwareSerial.cpp b/wirish/comm/HardwareSerial.cpp
index 08252d8..97a5ec3 100644
--- a/wirish/comm/HardwareSerial.cpp
+++ b/wirish/comm/HardwareSerial.cpp
@@ -31,12 +31,10 @@
 #include "wirish.h"
 #include "HardwareSerial.h"
 #include "usart.h"
-#include "gpio.h"
-#include "timers.h"
 
-HardwareSerial Serial1(USART1, 4500000UL, GPIOA,  9,10, TIMER1, 2);
-HardwareSerial Serial2(USART2, 2250000UL, GPIOA,  2, 3, TIMER2, 3);
-HardwareSerial Serial3(USART3, 2250000UL, GPIOB, 10,11, TIMER_INVALID, 0);
+HardwareSerial Serial1(USART1, 4500000UL, GPIOA,  9, 10, TIMER1, 2);
+HardwareSerial Serial2(USART2, 2250000UL, GPIOA,  2,  3, TIMER2, 3);
+HardwareSerial Serial3(USART3, 2250000UL, GPIOB, 10, 11,   NULL, 0);
 // TODO: High density device ports
 
 HardwareSerial::HardwareSerial(uint8 usart_num,
@@ -44,15 +42,15 @@ HardwareSerial::HardwareSerial(uint8 usart_num,
                                gpio_dev *gpio_device,
                                uint8 tx_pin,
                                uint8 rx_pin,
-                               timer_dev_num timer_num,
-                               uint8 compare_num) {
+                               timer_dev *timer_device,
+                               uint8 channel_num) {
     this->usart_num = usart_num;
     this->max_baud = max_baud;
     this->gpio_device = gpio_device;
     this->tx_pin = tx_pin;
     this->rx_pin = rx_pin;
-    this->timer_num = timer_num;
-    this->compare_num = compare_num;
+    this->timer_device = timer_device;
+    this->channel_num = channel_num;
 }
 
 uint8 HardwareSerial::read(void) {
@@ -75,9 +73,9 @@ void HardwareSerial::begin(uint32 baud) {
     gpio_set_mode(gpio_device, tx_pin, GPIO_AF_OUTPUT_PP);
     gpio_set_mode(gpio_device, rx_pin, GPIO_INPUT_FLOATING);
 
-    if (timer_num != TIMER_INVALID) {
+    if (timer_device != NULL) {
         /* turn off any pwm if there's a conflict on this usart */
-        timer_set_mode(timer_num, compare_num, TIMER_DISABLED);
+        timer_set_mode(timer_device, channel_num, TIMER_DISABLED);
     }
 
     usart_init(usart_num, baud);
diff --git a/wirish/comm/HardwareSerial.h b/wirish/comm/HardwareSerial.h
index ef19a56..7852d51 100644
--- a/wirish/comm/HardwareSerial.h
+++ b/wirish/comm/HardwareSerial.h
@@ -31,7 +31,9 @@
 #ifndef _HARDWARESERIAL_H_
 #define _HARDWARESERIAL_H_
 
-#include "timers.h"
+#include "libmaple_types.h"
+#include "gpio.h"
+#include "timer.h"
 
 #include "Print.h"
 
@@ -49,16 +51,16 @@ class HardwareSerial : public Print {
     gpio_dev *gpio_device;
     uint8 tx_pin;
     uint8 rx_pin;
-    timer_dev_num timer_num;
-    uint8 compare_num;
+    timer_dev *timer_device;
+    uint8 channel_num;
  public:
     HardwareSerial(uint8 usart_num,
                    uint32 max_baud,
                    gpio_dev *gpio_device,
                    uint8 tx_pin,
                    uint8 rx_pin,
-                   timer_dev_num timer_num,
-                   uint8 compare_num);
+                   timer_dev *timer_device,
+                   uint8 channel_num);
     void begin(uint32 baud);
     void end(void);
     uint32 available(void);
diff --git a/wirish/pwm.cpp b/wirish/pwm.cpp
index 072e4cd..6b09cef 100644
--- a/wirish/pwm.cpp
+++ b/wirish/pwm.cpp
@@ -23,26 +23,20 @@
  *****************************************************************************/
 
 /**
- *  @brief Arduino-compatible PWM implementation.
+ *  @brief Arduino-style PWM implementation.
  */
 
-#include "wirish.h"
-#include "timers.h"
-#include "io.h"
+#include "libmaple_types.h"
+#include "timer.h"
+
+#include "boards.h"
 #include "pwm.h"
 
 void pwmWrite(uint8 pin, uint16 duty_cycle) {
-    TimerCCR ccr;
-
-    if (pin >= NR_GPIO_PINS) {
-        return;
-    }
-
-    ccr = PIN_MAP[pin].timer_ccr;
-
-    if (ccr == 0) {
+    timer_dev *dev = PIN_MAP[pin].timer_device;
+    if (pin >= NR_GPIO_PINS || dev == NULL || dev->type == TIMER_BASIC) {
         return;
     }
 
-    timer_pwm_write_ccr(ccr, duty_cycle);
+    timer_set_compare(dev, PIN_MAP[pin].timer_chan, duty_cycle);
 }
diff --git a/wirish/rules.mk b/wirish/rules.mk
index 3dd4b2d..d250cb9 100644
--- a/wirish/rules.mk
+++ b/wirish/rules.mk
@@ -18,7 +18,6 @@ cppSRCS_$(d) := wirish_math.cpp		 \
                 comm/HardwareSerial.cpp	 \
                 comm/HardwareSPI.cpp	 \
                 usb_serial.cpp		 \
-		HardwareTimer.cpp	 \
                 cxxabi-compat.cpp	 \
 		wirish.cpp		 \
 		wirish_shift.cpp	 \
diff --git a/wirish/wirish.cpp b/wirish/wirish.cpp
index 65d0262..6dcb1b5 100644
--- a/wirish/wirish.cpp
+++ b/wirish/wirish.cpp
@@ -23,61 +23,107 @@
  *****************************************************************************/
 
 /**
- * @brief generic maple board bring up:
+ * @brief Generic Maple board initialization.
  *
- * By default, we bring up all maple boards running on the stm32 to 72mhz,
- * clocked off the PLL, driven by the 8MHz external crystal.
- *
- * AHB and APB2 are clocked at 72MHz
- * APB1 is clocked at 36MHz
+ * By default, we bring up all Maple boards to 72MHz, clocked off the
+ * PLL, driven by the 8MHz external crystal. AHB and APB2 are clocked
+ * at 72MHz.  APB1 is clocked at 36MHz.
  */
 
 #include "wirish.h"
+
+#include "flash.h"
+#include "rcc.h"
+#include "nvic.h"
 #include "systick.h"
 #include "gpio.h"
-#include "nvic.h"
+#include "adc.h"
+#include "timer.h"
 #include "usb.h"
-#include "rcc.h"
-#include "fsmc.h"
-#include "dac.h"
-#include "flash.h"
-#include "native_sram.h"
 
+static void setupFlash(void);
+static void setupClocks(void);
+static void setupADC(void);
+static void setupTimers(void);
+
+/**
+ * Board-wide initialization function.  Called before main().
+ */
 void init(void) {
-    /* make sure the flash is ready before spinning the high speed clock up */
+    setupFlash();
+    setupClocks();
+    nvic_init();
+    systick_init(SYSTICK_RELOAD_VAL);
+    gpio_init_all();
+    afio_init();
+    setupADC();
+    setupTimers();
+    setupUSB();
+
+    BOARD_INIT;
+}
+
+static void setupFlash(void) {
     flash_enable_prefetch();
     flash_set_latency(FLASH_WAIT_STATE_2);
+}
 
-#ifdef BOARD_maple_native
-    initNativeSRAM();
-#endif
-
-    /* initialize clocks  */
+/*
+ * Clock setup.  Note that some of this only takes effect if we're
+ * running bare metal and the bootloader hasn't done it for us
+ * already.
+ *
+ * If you change this function, you MUST change the file-level Doxygen
+ * comment above.
+ */
+static void setupClocks() {
     rcc_clk_init(RCC_CLKSRC_PLL, RCC_PLLSRC_HSE, RCC_PLLMUL_9);
     rcc_set_prescaler(RCC_PRESCALER_AHB, RCC_AHB_SYSCLK_DIV_1);
     rcc_set_prescaler(RCC_PRESCALER_APB1, RCC_APB1_HCLK_DIV_2);
     rcc_set_prescaler(RCC_PRESCALER_APB2, RCC_APB2_HCLK_DIV_1);
+}
 
-    nvic_init();
-    systick_init(SYSTICK_RELOAD_VAL);
-    gpio_init_all();
-    afio_init();
-
-    /* Initialize the ADC for slow conversions, to allow for high
-       impedance inputs. */
+/* TODO initialize more ADCs on high density boards. */
+static void setupADC() {
     adc_init(ADC1, 0);
-    adc_set_sample_rate(ADC1, ADC_SMPR_55_5);
-
-    timer_init(TIMER1, 1);
-    timer_init(TIMER2, 1);
-    timer_init(TIMER3, 1);
-    timer_init(TIMER4, 1);
-#ifdef STM32_HIGH_DENSITY
-    timer_init(TIMER5, 1);
-    timer_init(TIMER8, 1);
-#endif
-    setupUSB();
+    adc_set_sample_rate(ADC1, ADC_SMPR_55_5); // for high impedance inputs
+}
 
-    /* include the board-specific init macro */
-    BOARD_INIT;
+static void timerDefaultConfig(timer_dev*);
+
+static void setupTimers() {
+    timer_foreach(timerDefaultConfig);
+}
+
+static void timerDefaultConfig(timer_dev *dev) {
+    timer_adv_reg_map *regs = (dev->regs).adv;
+    const uint16 full_overflow = 0xFFFF;
+    const uint16 half_duty = 0x8FFF;
+
+    timer_init(dev);
+    timer_pause(dev);
+
+    regs->CR1 = TIMER_CR1_ARPE;
+    regs->PSC = 1;
+    regs->SR = 0;
+    regs->DIER = 0;
+    regs->EGR = TIMER_EGR_UG;
+
+    switch (dev->type) {
+    case TIMER_ADVANCED:
+        regs->BDTR = TIMER_BDTR_MOE | TIMER_BDTR_LOCK_OFF;
+        // fall-through
+    case TIMER_GENERAL:
+        timer_set_reload(dev, full_overflow);
+
+        for (int channel = 1; channel <= 4; channel++) {
+            timer_set_compare(dev, channel, half_duty);
+            timer_oc_set_mode(dev, channel, TIMER_OC_MODE_PWM_1, TIMER_OC_PE);
+        }
+        // fall-through
+    case TIMER_BASIC:
+        break;
+    }
+
+    timer_resume(dev);
 }
diff --git a/wirish/wirish.h b/wirish/wirish.h
index 447b2b6..319df97 100644
--- a/wirish/wirish.h
+++ b/wirish/wirish.h
@@ -32,7 +32,6 @@
 #define _WIRISH_H_
 
 #include "libmaple.h"
-#include "timers.h"
 
 #include "boards.h"
 #include "io.h"
@@ -44,7 +43,6 @@
 #include "HardwareSPI.h"
 #include "HardwareSerial.h"
 #include "usb_serial.h"
-#include "HardwareTimer.h"
 
 /* Arduino wiring macros and bit defines  */
 #define HIGH 0x1
@@ -69,7 +67,6 @@ typedef uint8 boolean;
 typedef uint8 byte;
 
 void init(void);
-void shiftOut(uint8 dataPin, uint8 clockPin, uint8 bitOrder, byte val);
 
 #endif
 
diff --git a/wirish/wirish_digital.cpp b/wirish/wirish_digital.cpp
index 0c0bd85..4b68861 100644
--- a/wirish/wirish_digital.cpp
+++ b/wirish/wirish_digital.cpp
@@ -72,15 +72,15 @@ void pinMode(uint8 pin, WiringPinMode mode) {
 
     gpio_set_mode(PIN_MAP[pin].gpio_device, PIN_MAP[pin].pin, outputMode);
 
-    if (PIN_MAP[pin].timer_num != TIMER_INVALID) {
+    if (PIN_MAP[pin].timer_device != NULL) {
         /* enable/disable timer channels if we're switching into or
            out of pwm  */
         if (pwm) {
-            timer_set_mode(PIN_MAP[pin].timer_num,
+            timer_set_mode(PIN_MAP[pin].timer_device,
                            PIN_MAP[pin].timer_chan,
                            TIMER_PWM);
         } else {
-            timer_set_mode(PIN_MAP[pin].timer_num,
+            timer_set_mode(PIN_MAP[pin].timer_device,
                            PIN_MAP[pin].timer_chan,
                            TIMER_DISABLED);
         }