aboutsummaryrefslogtreecommitdiffstats
path: root/wirish/boards/maple_mini.cpp
diff options
context:
space:
mode:
authorMarti Bolivar <mbolivar@leaflabs.com>2011-03-24 17:27:38 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2011-03-24 17:31:47 -0400
commit63ea7464925b8cbeb8623d08a2bde0b1d2044047 (patch)
treec1e0291202084d8d8011b0b66715a711108cbef4 /wirish/boards/maple_mini.cpp
parentbc246609ccd44601a0564fea8da407cc500ad471 (diff)
downloadlibrambutan-63ea7464925b8cbeb8623d08a2bde0b1d2044047.tar.gz
librambutan-63ea7464925b8cbeb8623d08a2bde0b1d2044047.zip
Adding /wirish/boards/ for easier porting; shrank PIN_MAPs.
/wirish/boards/ contains xxx.h and xxx.cpp (for xxx=maple, maple_native, maple_mini, maple_RET6). The headers contain the board-specific #defines that used to live in boards.h (except BOARD_INIT, which was removed). The CPP files contain the PIN_MAP definitions that used to live in boards.cpp, and a proper boardInit() function to replace the old BOARD_INIT macro. This will make it easier to add new boards in the future. struct PinMapping was renamed struct stm32_pin_info, and was moved into a new wirish_types.h. Its external interrupt field was moved into struct gpio_dev, which saves memory by storing an afio_exti_port per port, rather than one per pin. Also rearranged the stm32_pin_info fields to improve packing. Maple's PIN_MAP is now down to below 500 bytes.
Diffstat (limited to 'wirish/boards/maple_mini.cpp')
-rw-r--r--wirish/boards/maple_mini.cpp87
1 files changed, 87 insertions, 0 deletions
diff --git a/wirish/boards/maple_mini.cpp b/wirish/boards/maple_mini.cpp
new file mode 100644
index 0000000..8c005cf
--- /dev/null
+++ b/wirish/boards/maple_mini.cpp
@@ -0,0 +1,87 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2011 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file maple_mini.cpp
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief Maple Mini PIN_MAP and boardInit().
+ */
+
+#include "maple_mini.h"
+#include "gpio.h"
+
+#ifdef BOARD_maple_mini
+
+/* Since we want the Serial Wire/JTAG pins as GPIOs, disable both SW
+ * and JTAG debug support */
+void boardInit(void) {
+ afio_mapr_swj_config(AFIO_MAPR_SWJ_NO_JTAG_NO_SW);
+}
+
+stm32_pin_info PIN_MAP[NR_GPIO_PINS] = {
+
+ /* Top header */
+
+ {GPIOB, NULL, 11, 0, ADCx}, /* D0/PB11 */
+ {GPIOB, NULL, 10, 0, ADCx}, /* D1/PB10 */
+ {GPIOB, NULL, 2, 0, ADCx}, /* D2/PB2 */
+ {GPIOB, TIMER3, 0, 3, 8}, /* D3/PB0 */
+ {GPIOA, TIMER3, 7, 2, 7}, /* D4/PA7 */
+ {GPIOA, TIMER3, 6, 1, 6}, /* D5/PA6 */
+ {GPIOA, NULL, 5, 0, 5}, /* D6/PA5 */
+ {GPIOA, NULL, 4, 0, 4}, /* D7/PA4 */
+ {GPIOA, TIMER2, 3, 4, 3}, /* D8/PA3 */
+ {GPIOA, TIMER2, 2, 3, 2}, /* D9/PA2 */
+ {GPIOA, TIMER2, 1, 2, 1}, /* D10/PA1 */
+ {GPIOA, TIMER2, 0, 1, 0}, /* D11/PA0 */
+ {GPIOC, NULL, 15, 0, ADCx}, /* D12/PC15 */
+ {GPIOC, NULL, 14, 0, ADCx}, /* D13/PC14 */
+ {GPIOC, NULL, 13, 0, ADCx}, /* D14/PC13 */
+
+ /* Bottom header */
+
+ {GPIOB, TIMER4, 7, 2, ADCx}, /* D15/PB7 */
+ {GPIOB, TIMER4, 6, 1, ADCx}, /* D16/PB6 */
+ {GPIOB, NULL, 5, 0, ADCx}, /* D17/PB5 */
+ {GPIOB, NULL, 4, 0, ADCx}, /* D18/PB4 */
+ {GPIOB, NULL, 3, 0, ADCx}, /* D19/PB3 */
+ {GPIOA, NULL, 15, 0, ADCx}, /* D20/PA15 */
+ {GPIOA, NULL, 14, 0, ADCx}, /* D21/PA14 */
+ {GPIOA, NULL, 13, 0, ADCx}, /* D22/PA13 */
+ {GPIOA, NULL, 12, 0, ADCx}, /* D23/PA12 */
+ {GPIOA, TIMER1, 11, 4, ADCx}, /* D24/PA11 */
+ {GPIOA, TIMER1, 10, 3, ADCx}, /* D25/PA10 */
+ {GPIOA, TIMER2, 9, 2, ADCx}, /* D26/PA9 */
+ {GPIOA, TIMER1, 8, 1, ADCx}, /* D27/PA8 */
+ {GPIOB, NULL, 15, 0, ADCx}, /* D28/PB15 */
+ {GPIOB, NULL, 14, 0, ADCx}, /* D29/PB14 */
+ {GPIOB, NULL, 13, 0, ADCx}, /* D30/PB13 */
+ {GPIOB, NULL, 12, 0, ADCx}, /* D31/PB12 */
+ {GPIOB, TIMER4, 8, 3, ADCx}, /* D32/PB8 */
+ {GPIOB, TIMER3, 1, 4, 9}, /* D33/PB1 */
+};
+
+#endif