Merge branch 'wip-family-support'

Merge the long-lived (too long; future changes like these will need to
proceed more incrementally) development branch of libmaple, containing
experimental STM32F2 and STM32F1 value line support, into master.

This required many changes to the structure of the library. The most
important structural reorganizations occurred in:

- 954f9e5: moves public headers to include directories
- 3efa313: uses "series" instead of "family"
- c0d60e3: adds board files to the build system, to make it easier to
  add new boards
- 096d86c: adds build logic for targeting different STM32 series
  (e.g. STM32F1, STM32F2)

This last commit in particular (096d86c) is the basis for the
repartitioning of libmaple into portable sections, which work on all
supported MCUs, and nonportable sections, which are segregated into
separate directories and contain all series-specific code. Moving
existing STM32F1-only code into libmaple/stm32f1 and wirish/stm32f1,
along with adding equivalents under .../stm32f2 directories, was the
principal project of this branch.

Important API changes occur in several places. Existing code is still
expected to work on STM32F1 targets, but there have been many
deprecations. A detailed changelog explaining the situation needs to
be prepared.

F2 and F1 value line support is not complete; the merge is proceeding
prematurely in this respect. We've been getting more libmaple patches
from the community lately, and I'm worried that the merge conflicts
with the old tree structure will become painful to manage.

Conflicts:
	Makefile

Resolved Makefile conflicts manually; this required propagating
-Xlinker usage into support/make/target-config.mk.

Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>

2 files changed, 204 insertions, 0 deletions

diff --git a/wirish/boards/maple_RET6/board.cpp b/wirish/boards/maple_RET6/board.cpp
new file mode 100644
index 0000000..2ef7de7
--- /dev/null
+++ b/wirish/boards/maple_RET6/board.cpp
@@ -0,0 +1,115 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2011 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file   wirish/boards/maple_RET6/board.cpp
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief  Maple RET6 Edition board file
+ */
+
+#include <board/board.h>
+
+#include <libmaple/gpio.h>
+#include <libmaple/timer.h>
+
+#include <wirish/wirish_types.h>
+
+void boardInit(void) {
+}
+
+extern const stm32_pin_info PIN_MAP[BOARD_NR_GPIO_PINS] = {
+
+    /* Top header */
+
+    {GPIOA, TIMER2, ADC1,  3, 4,    3}, /* D0/PA3 */
+    {GPIOA, TIMER2, ADC1,  2, 3,    2}, /* D1/PA2 */
+    {GPIOA, TIMER2, ADC1,  0, 1,    0}, /* D2/PA0 */
+    {GPIOA, TIMER2, ADC1,  1, 2,    1}, /* D3/PA1 */
+    {GPIOB,   NULL, NULL,  5, 0, ADCx}, /* D4/PB5 */
+    {GPIOB, TIMER4, NULL,  6, 1, ADCx}, /* D5/PB6 */
+    {GPIOA, TIMER1, NULL,  8, 1, ADCx}, /* D6/PA8 */
+    {GPIOA, TIMER1, NULL,  9, 2, ADCx}, /* D7/PA9 */
+    {GPIOA, TIMER1, NULL, 10, 3, ADCx}, /* D8/PA10 */
+    {GPIOB, TIMER4, NULL,  7, 2, ADCx}, /* D9/PB7 */
+    {GPIOA,   NULL, ADC1,  4, 0,    4}, /* D10/PA4 */
+    {GPIOA, TIMER3, ADC1,  7, 2,    7}, /* D11/PA7 */
+    {GPIOA, TIMER3, ADC1,  6, 1,    6}, /* D12/PA6 */
+    {GPIOA,   NULL, ADC1,  5, 0,    5}, /* D13/PA5 (LED) */
+    {GPIOB, TIMER4, NULL,  8, 3, ADCx}, /* D14/PB8 */
+
+    /* Little header */
+
+    {GPIOC,   NULL, ADC1,  0, 0,   10}, /* D15/PC0 */
+    {GPIOC,   NULL, ADC1,  1, 0,   11}, /* D16/PC1 */
+    {GPIOC,   NULL, ADC1,  2, 0,   12}, /* D17/PC2 */
+    {GPIOC,   NULL, ADC1,  3, 0,   13}, /* D18/PC3 */
+    {GPIOC,   NULL, ADC1,  4, 0,   14}, /* D19/PC4 */
+    {GPIOC,   NULL, ADC1,  5, 0,   15}, /* D20/PC5 */
+
+    /* External header */
+
+    {GPIOC,   NULL, NULL, 13, 0, ADCx}, /* D21/PC13 */
+    {GPIOC,   NULL, NULL, 14, 0, ADCx}, /* D22/PC14 */
+    {GPIOC,   NULL, NULL, 15, 0, ADCx}, /* D23/PC15 */
+    {GPIOB, TIMER4, NULL,  9, 4, ADCx}, /* D24/PB9 */
+    {GPIOD,   NULL, NULL,  2, 0, ADCx}, /* D25/PD2 */
+    {GPIOC,   NULL, NULL, 10, 0, ADCx}, /* D26/PC10 */
+    {GPIOB, TIMER3, ADC1,  0, 3,    8}, /* D27/PB0 */
+    {GPIOB, TIMER3, ADC1,  1, 4,    9}, /* D28/PB1 */
+    {GPIOB,   NULL, NULL, 10, 0, ADCx}, /* D29/PB10 */
+    {GPIOB,   NULL, NULL, 11, 0, ADCx}, /* D30/PB11 */
+    {GPIOB,   NULL, NULL, 12, 0, ADCx}, /* D31/PB12 */
+    {GPIOB,   NULL, NULL, 13, 0, ADCx}, /* D32/PB13 */
+    {GPIOB,   NULL, NULL, 14, 0, ADCx}, /* D33/PB14 */
+    {GPIOB,   NULL, NULL, 15, 0, ADCx}, /* D34/PB15 */
+    {GPIOC, TIMER8, NULL,  6, 1, ADCx}, /* D35/PC6 */
+    {GPIOC, TIMER8, NULL,  7, 2, ADCx}, /* D36/PC7 */
+    {GPIOC, TIMER8, NULL,  8, 3, ADCx}, /* D37/PC8 */
+    {GPIOC, TIMER8, NULL,  9, 4, ADCx}, /* D38/PC9 (BUT) */
+
+    /* JTAG header */
+
+    {GPIOA,   NULL, NULL, 13, 0, ADCx}, /* D39/PA13 */
+    {GPIOA,   NULL, NULL, 14, 0, ADCx}, /* D40/PA14 */
+    {GPIOA,   NULL, NULL, 15, 0, ADCx}, /* D41/PA15 */
+    {GPIOB,   NULL, NULL,  3, 0, ADCx}, /* D42/PB3  */
+    {GPIOB,   NULL, NULL,  4, 0, ADCx}, /* D43/PB4  */
+};
+
+/* Note: Do NOT include pin 38 (TIM8_CH4), as that's BOARD_BUTTON_PIN
+ * and thus not broken out to a header. */
+extern const uint8 boardPWMPins[BOARD_NR_PWM_PINS] __FLASH__ = {
+    0, 1, 2, 3, 5, 6, 7, 8, 9, 11, 12, 14, 24, 27, 28, 35, 36, 37
+};
+
+extern const uint8 boardADCPins[BOARD_NR_ADC_PINS] __FLASH__ = {
+    0, 1, 2, 3, 10, 11, 12, 15, 16, 17, 18, 19, 20, 27, 28
+};
+
+extern const uint8 boardUsedPins[BOARD_NR_USED_PINS] __FLASH__ = {
+    BOARD_LED_PIN, BOARD_BUTTON_PIN, BOARD_JTMS_SWDIO_PIN,
+    BOARD_JTCK_SWCLK_PIN, BOARD_JTDI_PIN, BOARD_JTDO_PIN, BOARD_NJTRST_PIN
+};
diff --git a/wirish/boards/maple_RET6/include/board/board.h b/wirish/boards/maple_RET6/include/board/board.h
new file mode 100644
index 0000000..05b9031
--- /dev/null
+++ b/wirish/boards/maple_RET6/include/board/board.h
@@ -0,0 +1,89 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2011 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file   wirish/boards/maple_RET6/include/board/board.h
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief  Maple RET6 Edition board header.
+ *
+ * See wirish/boards/maple/include/board/board.h for more information
+ * on these definitions.
+ */
+
+#ifndef _BOARDS_MAPLE_RET6_H_
+#define _BOARDS_MAPLE_RET6_H_
+
+#define CYCLES_PER_MICROSECOND  72
+#define SYSTICK_RELOAD_VAL      71999 /* takes a cycle to reload */
+
+#define BOARD_BUTTON_PIN        38
+#define BOARD_LED_PIN           13
+
+/* UART4 and UART5 have pins which aren't broken out :( */
+#define BOARD_NR_USARTS         3
+#define BOARD_USART1_TX_PIN     7
+#define BOARD_USART1_RX_PIN     8
+#define BOARD_USART2_TX_PIN     1
+#define BOARD_USART2_RX_PIN     0
+#define BOARD_USART3_TX_PIN     29
+#define BOARD_USART3_RX_PIN     30
+
+/* Note:
+ *
+ * SPI3 is unusable due to pin 43 (PB4) and NRST tie-together :(, but
+ * leave the definitions so as not to clutter things up.  This is only
+ * OK since RET6 Ed. is specifically advertised as a beta board. */
+#define BOARD_NR_SPI            2
+#define BOARD_SPI1_NSS_PIN      10
+#define BOARD_SPI1_MOSI_PIN     11
+#define BOARD_SPI1_MISO_PIN     12
+#define BOARD_SPI1_SCK_PIN      13
+#define BOARD_SPI2_NSS_PIN      31
+#define BOARD_SPI2_MOSI_PIN     34
+#define BOARD_SPI2_MISO_PIN     33
+#define BOARD_SPI2_SCK_PIN      32
+#define BOARD_SPI3_NSS_PIN      41
+#define BOARD_SPI3_MOSI_PIN     4
+#define BOARD_SPI3_MISO_PIN     43
+#define BOARD_SPI3_SCK_PIN      42
+
+#define BOARD_NR_GPIO_PINS      44
+/* Note: NOT 19. The missing one is D38 a.k.a. BOARD_BUTTON_PIN, which
+ * isn't broken out to a header and is thus unusable for PWM. */
+#define BOARD_NR_PWM_PINS       18
+#define BOARD_NR_ADC_PINS       15
+#define BOARD_NR_USED_PINS      7
+
+#define BOARD_JTMS_SWDIO_PIN    39
+#define BOARD_JTCK_SWCLK_PIN    40
+#define BOARD_JTDI_PIN          41
+#define BOARD_JTDO_PIN          42
+#define BOARD_NJTRST_PIN        43
+
+#define BOARD_USB_DISC_DEV      GPIOC
+#define BOARD_USB_DISC_BIT      12
+
+#endif