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author | Marti Bolivar <mbolivar@leaflabs.com> | 2011-07-20 13:48:30 -0400 |
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committer | Marti Bolivar <mbolivar@leaflabs.com> | 2011-07-20 14:02:30 -0400 |
commit | e65a05a9f556b96b9d061dc394c022ba21c1c7b4 (patch) | |
tree | ab24d8530d74fefaa543abd242418339fc488680 /support/stm32loader.py | |
parent | 87e774db58f9e4432fd5f8db0358f0432047a31c (diff) | |
download | librambutan-e65a05a9f556b96b9d061dc394c022ba21c1c7b4.tar.gz librambutan-e65a05a9f556b96b9d061dc394c022ba21c1c7b4.zip |
timer.c: Optimize IRQ dispatch routines.
Remove dispatch_irq() and dispatch_cc_irqs().
For IRQs which handle exactly one timer interrupt, add new
dispatch_single_irq(). The mere fact that the IRQ has been called
suffices to prove that its interrupt enable bit (in TIMx_DIER) and
interrupt flag (in TIMx_SR) are set. These facts are combined in
dispatch_single_irq(), which only needs to check if the timer_dev
handler is non-null before calling it and clearing the SR flag.
For IRQs which serve multiple timer interrupts, replace the
composition of calls to dispatch_irq() and dispatch_cc_irqs() with
individualized routines. These eliminate unnecessary timer register
reads/writes, and, in the case of capture/compare interrupts, have a
loop unrolling performed.
Diffstat (limited to 'support/stm32loader.py')
0 files changed, 0 insertions, 0 deletions