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authorMarti Bolivar <mbolivar@leaflabs.com>2011-05-09 16:43:27 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2011-05-09 16:49:08 -0400
commit19ea6ba4ea3f1ecb9830cf4d3e1366513f4f96e3 (patch)
treea43f7e0fb3650ca54f245b750a078a0e8c356504 /support/stm32loader.py
parent868fb1c273e562a1140abfa948022c9d4f55bccf (diff)
parent1e2e177f6dae62e040c674b617744c73be187062 (diff)
downloadlibrambutan-19ea6ba4ea3f1ecb9830cf4d3e1366513f4f96e3.tar.gz
librambutan-19ea6ba4ea3f1ecb9830cf4d3e1366513f4f96e3.zip
Merge branch 'refactor'
This merges the libmaple refactor work into master. The contents of libmaple proper (/libmaple/) are almost completely incompatible with previous APIs in master. See /docs/source/libmaple/overview.rst for more information on the new design. Wirish incompatibilities are limited to the HardwareTimer class; however, there are several new deprecations, most likely to be removed in 0.1.0.
Diffstat (limited to 'support/stm32loader.py')
-rwxr-xr-xsupport/stm32loader.py11
1 files changed, 5 insertions, 6 deletions
diff --git a/support/stm32loader.py b/support/stm32loader.py
index 874d278..b0df7c0 100755
--- a/support/stm32loader.py
+++ b/support/stm32loader.py
@@ -294,6 +294,10 @@ class CommandInterface:
def writeMemory(self, addr, data):
lng = len(data)
+
+ mdebug(5, "Writing %(lng)d bytes to start address 0x%(addr)X" %
+ { 'lng': lng, 'addr': addr})
+
if usepbar:
widgets = ['Writing: ', Percentage(),' ', ETA(), ' ', Bar()]
pbar = ProgressBar(widgets=widgets, maxval=lng, term_width=79).start()
@@ -316,12 +320,6 @@ class CommandInterface:
self.cmdWriteMemory(addr, data[offs:offs+lng] + ([0xFF] * (256-lng)) )
-
-
- def __init__(self) :
- pass
-
-
def usage():
print """Usage: %s [-hqVewvr] [-l length] [-p port] [-b baud] [-a addr] [file.bin]
-h This help
@@ -452,6 +450,7 @@ if __name__ == "__main__":
'baud':conf['baud']})
try:
if (conf['write'] or conf['verify']):
+ mdebug(5, "Reading data from %s" % args[0])
data = read(args[0])
try: