Initial commit of library code, moved from leaftest repo

git-svn-id: https://leaflabs.googlecode.com/svn/trunk/library@69 749a229e-a60e-11de-b98f-4500b42dc123

4 files changed, 296 insertions, 0 deletions

diff --git a/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-isrs.S b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-isrs.S
new file mode 100644
index 0000000..b68af59
--- /dev/null
+++ b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-isrs.S
@@ -0,0 +1,187 @@
+/* ISRs for STM32 (by Lanchon) */

+

+	.thumb

+

+#if defined (L_lanchon_stm32_isr_interrupt)

+

+	.globl	__STM32DefaultExceptionHandler

+	.type	__STM32DefaultExceptionHandler, %function

+

+__STM32DefaultExceptionHandler:

+	b .

+

+	.size	__STM32DefaultExceptionHandler, . - __STM32DefaultExceptionHandler

+

+	.weak	NMIException

+	.globl	NMIException

+	.set	NMIException, __STM32DefaultExceptionHandler

+	.weak	HardFaultException

+	.globl	HardFaultException

+	.set	HardFaultException, __STM32DefaultExceptionHandler

+	.weak	MemManageException

+	.globl	MemManageException

+	.set	MemManageException, __STM32DefaultExceptionHandler

+	.weak	BusFaultException

+	.globl	BusFaultException

+	.set	BusFaultException, __STM32DefaultExceptionHandler

+	.weak	UsageFaultException

+	.globl	UsageFaultException

+	.set	UsageFaultException, __STM32DefaultExceptionHandler

+	.weak	__STM32ReservedException7

+	.globl	__STM32ReservedException7

+	.set	__STM32ReservedException7, __STM32DefaultExceptionHandler

+	.weak	__STM32ReservedException8

+	.globl	__STM32ReservedException8

+	.set	__STM32ReservedException8, __STM32DefaultExceptionHandler

+	.weak	__STM32ReservedException9

+	.globl	__STM32ReservedException9

+	.set	__STM32ReservedException9, __STM32DefaultExceptionHandler

+	.weak	__STM32ReservedException10

+	.globl	__STM32ReservedException10

+	.set	__STM32ReservedException10, __STM32DefaultExceptionHandler

+	.weak	SVCHandler

+	.globl	SVCHandler

+	.set	SVCHandler, __STM32DefaultExceptionHandler

+	.weak	DebugMonitor

+	.globl	DebugMonitor

+	.set	DebugMonitor, __STM32DefaultExceptionHandler

+	.weak	__STM32ReservedException13

+	.globl	__STM32ReservedException13

+	.set	__STM32ReservedException13, __STM32DefaultExceptionHandler

+	.weak	PendSVC

+	.globl	PendSVC

+	.set	PendSVC, __STM32DefaultExceptionHandler

+	.weak	SysTickHandler

+	.globl	SysTickHandler

+	.set	SysTickHandler, __STM32DefaultExceptionHandler

+	.weak	WWDG_IRQHandler

+	.globl	WWDG_IRQHandler

+	.set	WWDG_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	PVD_IRQHandler

+	.globl	PVD_IRQHandler

+	.set	PVD_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TAMPER_IRQHandler

+	.globl	TAMPER_IRQHandler

+	.set	TAMPER_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	RTC_IRQHandler

+	.globl	RTC_IRQHandler

+	.set	RTC_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	FLASH_IRQHandler

+	.globl	FLASH_IRQHandler

+	.set	FLASH_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	RCC_IRQHandler

+	.globl	RCC_IRQHandler

+	.set	RCC_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	EXTI0_IRQHandler

+	.globl	EXTI0_IRQHandler

+	.set	EXTI0_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	EXTI1_IRQHandler

+	.globl	EXTI1_IRQHandler

+	.set	EXTI1_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	EXTI2_IRQHandler

+	.globl	EXTI2_IRQHandler

+	.set	EXTI2_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	EXTI3_IRQHandler

+	.globl	EXTI3_IRQHandler

+	.set	EXTI3_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	EXTI4_IRQHandler

+	.globl	EXTI4_IRQHandler

+	.set	EXTI4_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	DMAChannel1_IRQHandler

+	.globl	DMAChannel1_IRQHandler

+	.set	DMAChannel1_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	DMAChannel2_IRQHandler

+	.globl	DMAChannel2_IRQHandler

+	.set	DMAChannel2_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	DMAChannel3_IRQHandler

+	.globl	DMAChannel3_IRQHandler

+	.set	DMAChannel3_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	DMAChannel4_IRQHandler

+	.globl	DMAChannel4_IRQHandler

+	.set	DMAChannel4_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	DMAChannel5_IRQHandler

+	.globl	DMAChannel5_IRQHandler

+	.set	DMAChannel5_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	DMAChannel6_IRQHandler

+	.globl	DMAChannel6_IRQHandler

+	.set	DMAChannel6_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	DMAChannel7_IRQHandler

+	.globl	DMAChannel7_IRQHandler

+	.set	DMAChannel7_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	ADC_IRQHandler

+	.globl	ADC_IRQHandler

+	.set	ADC_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	USB_HP_CAN_TX_IRQHandler

+	.globl	USB_HP_CAN_TX_IRQHandler

+	.set	USB_HP_CAN_TX_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	USB_LP_CAN_RX0_IRQHandler

+	.globl	USB_LP_CAN_RX0_IRQHandler

+	.set	USB_LP_CAN_RX0_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	CAN_RX1_IRQHandler

+	.globl	CAN_RX1_IRQHandler

+	.set	CAN_RX1_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	CAN_SCE_IRQHandler

+	.globl	CAN_SCE_IRQHandler

+	.set	CAN_SCE_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	EXTI9_5_IRQHandler

+	.globl	EXTI9_5_IRQHandler

+	.set	EXTI9_5_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TIM1_BRK_IRQHandler

+	.globl	TIM1_BRK_IRQHandler

+	.set	TIM1_BRK_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TIM1_UP_IRQHandler

+	.globl	TIM1_UP_IRQHandler

+	.set	TIM1_UP_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TIM1_TRG_COM_IRQHandler

+	.globl	TIM1_TRG_COM_IRQHandler

+	.set	TIM1_TRG_COM_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TIM1_CC_IRQHandler

+	.globl	TIM1_CC_IRQHandler

+	.set	TIM1_CC_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TIM2_IRQHandler

+	.globl	TIM2_IRQHandler

+	.set	TIM2_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TIM3_IRQHandler

+	.globl	TIM3_IRQHandler

+	.set	TIM3_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	TIM4_IRQHandler

+	.globl	TIM4_IRQHandler

+	.set	TIM4_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	I2C1_EV_IRQHandler

+	.globl	I2C1_EV_IRQHandler

+	.set	I2C1_EV_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	I2C1_ER_IRQHandler

+	.globl	I2C1_ER_IRQHandler

+	.set	I2C1_ER_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	I2C2_EV_IRQHandler

+	.globl	I2C2_EV_IRQHandler

+	.set	I2C2_EV_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	I2C2_ER_IRQHandler

+	.globl	I2C2_ER_IRQHandler

+	.set	I2C2_ER_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	SPI1_IRQHandler

+	.globl	SPI1_IRQHandler

+	.set	SPI1_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	SPI2_IRQHandler

+	.globl	SPI2_IRQHandler

+	.set	SPI2_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	USART1_IRQHandler

+	.globl	USART1_IRQHandler

+	.set	USART1_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	USART2_IRQHandler

+	.globl	USART2_IRQHandler

+	.set	USART2_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	USART3_IRQHandler

+	.globl	USART3_IRQHandler

+	.set	USART3_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	EXTI15_10_IRQHandler

+	.globl	EXTI15_10_IRQHandler

+	.set	EXTI15_10_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	RTCAlarm_IRQHandler

+	.globl	RTCAlarm_IRQHandler

+	.set	RTCAlarm_IRQHandler, __STM32DefaultExceptionHandler

+	.weak	USBWakeUp_IRQHandler

+	.globl	USBWakeUp_IRQHandler

+	.set	USBWakeUp_IRQHandler, __STM32DefaultExceptionHandler

+

+#endif /* L_lanchon_stm32_isr_interrupt */

diff --git a/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-vector.S b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-vector.S
new file mode 100644
index 0000000..17a9c01
--- /dev/null
+++ b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon-stm32-vector.S
@@ -0,0 +1,69 @@
+/* Vector table for STM32 (by Lanchon) */

+

+	.section	".cs3.interrupt_vector"

+

+	.globl	__cs3_interrupt_vector_lanchon_stm32

+	.type	__cs3_interrupt_vector_lanchon_stm32, %object

+

+__cs3_interrupt_vector_lanchon_stm32:

+	.long	__cs3_stack

+	.long	__cs3_reset

+	.long	NMIException

+	.long	HardFaultException

+	.long	MemManageException

+	.long	BusFaultException

+	.long	UsageFaultException

+	.long	__STM32ReservedException7

+	.long	__STM32ReservedException8

+	.long	__STM32ReservedException9

+	.long	__STM32ReservedException10

+	.long	SVCHandler

+	.long	DebugMonitor

+	.long	__STM32ReservedException13

+	.long	PendSVC

+	.long	SysTickHandler

+	.long	WWDG_IRQHandler

+	.long	PVD_IRQHandler

+	.long	TAMPER_IRQHandler

+	.long	RTC_IRQHandler

+	.long	FLASH_IRQHandler

+	.long	RCC_IRQHandler

+	.long	EXTI0_IRQHandler

+	.long	EXTI1_IRQHandler

+	.long	EXTI2_IRQHandler

+	.long	EXTI3_IRQHandler

+	.long	EXTI4_IRQHandler

+	.long	DMAChannel1_IRQHandler

+	.long	DMAChannel2_IRQHandler

+	.long	DMAChannel3_IRQHandler

+	.long	DMAChannel4_IRQHandler

+	.long	DMAChannel5_IRQHandler

+	.long	DMAChannel6_IRQHandler

+	.long	DMAChannel7_IRQHandler

+	.long	ADC_IRQHandler

+	.long	USB_HP_CAN_TX_IRQHandler

+	.long	USB_LP_CAN_RX0_IRQHandler

+	.long	CAN_RX1_IRQHandler

+	.long	CAN_SCE_IRQHandler

+	.long	EXTI9_5_IRQHandler

+	.long	TIM1_BRK_IRQHandler

+	.long	TIM1_UP_IRQHandler

+	.long	TIM1_TRG_COM_IRQHandler

+	.long	TIM1_CC_IRQHandler

+	.long	TIM2_IRQHandler

+	.long	TIM3_IRQHandler

+	.long	TIM4_IRQHandler

+	.long	I2C1_EV_IRQHandler

+	.long	I2C1_ER_IRQHandler

+	.long	I2C2_EV_IRQHandler

+	.long	I2C2_ER_IRQHandler

+	.long	SPI1_IRQHandler

+	.long	SPI2_IRQHandler

+	.long	USART1_IRQHandler

+	.long	USART2_IRQHandler

+	.long	USART3_IRQHandler

+	.long	EXTI15_10_IRQHandler

+	.long	RTCAlarm_IRQHandler

+	.long	USBWakeUp_IRQHandler

+

+	.size	__cs3_interrupt_vector_lanchon_stm32, . - __cs3_interrupt_vector_lanchon_stm32

diff --git a/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon_stm32_isr_interrupt.S b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon_stm32_isr_interrupt.S
new file mode 100644
index 0000000..1f6c54a
--- /dev/null
+++ b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/lanchon_stm32_isr_interrupt.S
@@ -0,0 +1,4 @@
+/* ISRs for STM32 (by Lanchon) */

+

+#define L_lanchon_stm32_isr_interrupt 1

+#include "lanchon-stm32-isrs.S"

diff --git a/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/makefile b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/makefile
new file mode 100644
index 0000000..1c5eac1
--- /dev/null
+++ b/stm32conf/lanchon-stm32/src/libcs3-lanchon-stm32/makefile
@@ -0,0 +1,36 @@
+# setup environment

+

+TARGET_ARCH = -mcpu=cortex-m3 -mthumb

+

+CC = arm-none-eabi-gcc

+CFLAGS =

+

+AS = $(CC) -x assembler-with-cpp -c $(TARGET_ARCH)

+ASFLAGS =

+

+AR = arm-none-eabi-ar

+ARFLAGS = cr

+

+

+LIB_OUT = libcs3-lanchon-stm32.a

+

+LIB_OBJS = lanchon-stm32-vector.o lanchon_stm32_isr_interrupt.o

+

+

+# all

+

+.PHONY: all

+all: $(LIB_OUT)

+

+

+# lib

+

+$(LIB_OUT): $(LIB_OBJS)

+	$(AR) $(ARFLAGS) $@ $(LIB_OBJS)

+

+

+# clean

+

+.PHONY: clean

+clean:

+	-rm -f $(LIB_OBJS) $(LIB_OUT)