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authorPerry Hung <iperry@alum.mit.edu>2010-03-30 21:40:06 -0400
committerPerry Hung <iperry@alum.mit.edu>2010-03-30 21:40:06 -0400
commit23149e9706ff0a6a338e13804456dff4c655e34b (patch)
tree78e5040df7633b77cca990c8d7c9c3e5b5d6c513 /src/lib/adc.c
parentf2f32c52c3aa44f34448523c60520df1cad36351 (diff)
downloadlibrambutan-23149e9706ff0a6a338e13804456dff4c655e34b.tar.gz
librambutan-23149e9706ff0a6a338e13804456dff4c655e34b.zip
Re-enabled ADC1 without STM32 RCC library.
There shouldn't be any STM32 rcc code anymore.
Diffstat (limited to 'src/lib/adc.c')
-rw-r--r--src/lib/adc.c16
1 files changed, 5 insertions, 11 deletions
diff --git a/src/lib/adc.c b/src/lib/adc.c
index ee2b17a..d584dba 100644
--- a/src/lib/adc.c
+++ b/src/lib/adc.c
@@ -23,9 +23,9 @@
* @brief Analog to digital converter routines
*/
+#include "libmaple.h"
+#include "rcc.h"
#include "adc.h"
-#include <stdio.h>
-#include <inttypes.h>
/* The ADC input clock is generated from PCLK2/APB2 divided by a prescaler
* and it must not exceed 14MHz.
@@ -58,15 +58,9 @@
* At 55.5 cycles/sample, the external input impedance < 50kOhms*/
void adc_init(void) {
- /* PCLK2 is the APB2 clock */
-// RCC_ADCCLKConfig(RCC_PCLK2_Div6);
-
- /* Enable ADC1 clock so that we can talk to it */
-// RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE);
-
- /* Put everything back to power-on defaults */
-// RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, ENABLE);
-// RCC_APB2PeriphResetCmd(RCC_APB2Periph_ADC1, DISABLE);
+ rcc_set_adc_prescaler(PCLK2_DIV_2);
+ rcc_enable_clk_adc1();
+ rcc_reset_adc1();
ADC_CR1 = 0;
ADC_CR2 = CR2_EXTSEL_SWSTART | CR2_EXTTRIG; // Software triggers conversions