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| author | Marti Bolivar <mbolivar@leaflabs.com> | 2011-05-05 04:34:56 -0400 |
|---|---|---|
| committer | Marti Bolivar <mbolivar@leaflabs.com> | 2011-05-05 04:34:56 -0400 |
| commit | 8fc5225a70c55be4e62b3a4eb9ce92f61e7e843f (patch) | |
| tree | 537898640f6078712f60f21b9eeb6c9f8f665356 /libmaple | |
| parent | fc30aa62ecb544a43828cd5dceb1696518b77acf (diff) | |
| download | librambutan-8fc5225a70c55be4e62b3a4eb9ce92f61e7e843f.tar.gz librambutan-8fc5225a70c55be4e62b3a4eb9ce92f61e7e843f.zip | |
Doxygen syntax bugfixes.
Diffstat (limited to 'libmaple')
| -rw-r--r-- | libmaple/dma.c | 4 | ||||
| -rw-r--r-- | libmaple/nvic.c | 5 | ||||
| -rw-r--r-- | libmaple/spi.h | 2 |
3 files changed, 8 insertions, 3 deletions
diff --git a/libmaple/dma.c b/libmaple/dma.c index 6ddabcc..04cdcea 100644 --- a/libmaple/dma.c +++ b/libmaple/dma.c @@ -187,7 +187,7 @@ void dma_attach_interrupt(dma_dev *dev, * * @param dev DMA device * @param channel Channel whose handler to detach - * @sideffect Clears interrupt enable bits in the channel's CCR register. + * @sideeffect Clears interrupt enable bits in the channel's CCR register. * @see dma_attach_interrupt() */ void dma_detach_interrupt(dma_dev *dev, dma_channel channel) { @@ -281,6 +281,7 @@ void dma_disable(dma_dev *dev, dma_channel channel) { * * @param dev DMA Device * @param channel Channel whose base memory address to set. + * @param addr Memory base address to use. */ void dma_set_mem_addr(dma_dev *dev, dma_channel channel, __io void *addr) { dma_channel_reg_map *chan_regs; @@ -303,6 +304,7 @@ void dma_set_mem_addr(dma_dev *dev, dma_channel channel, __io void *addr) { * * @param dev DMA Device * @param channel Channel whose peripheral data register base address to set. + * @param addr Peripheral memory base address to use. */ void dma_set_per_addr(dma_dev *dev, dma_channel channel, __io void *addr) { dma_channel_reg_map *chan_regs; diff --git a/libmaple/nvic.c b/libmaple/nvic.c index 28db96a..a7a6d8e 100644 --- a/libmaple/nvic.c +++ b/libmaple/nvic.c @@ -52,7 +52,10 @@ void nvic_irq_set_priority(nvic_irq_num irqn, uint8 priority) { /** * @brief Initialize the NVIC - * @param vect_table_address Vector table base address. + * @param vector_table_address Vector table base address. + * @param offset Offset from vector_table_address. Some restrictions + * apply to the use of nonzero offsets; see ST RM0008 + * and the ARM Cortex M3 Technical Reference Manual. */ void nvic_init(uint32 vector_table_address, uint32 offset) { uint32 i; diff --git a/libmaple/spi.h b/libmaple/spi.h index 5c8728f..37ca6ef 100644 --- a/libmaple/spi.h +++ b/libmaple/spi.h @@ -313,7 +313,7 @@ void spi_rx_dma_disable(spi_dev *dev); /** * @brief Determine if a SPI peripheral is enabled. - * @parm dev SPI device + * @param dev SPI device * @return True, if and only if dev's peripheral is enabled. */ static inline uint8 spi_is_enabled(spi_dev *dev) { |