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author | Marti Bolivar <mbolivar@leaflabs.com> | 2011-04-29 12:28:30 -0400 |
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committer | Marti Bolivar <mbolivar@leaflabs.com> | 2011-05-04 13:29:55 -0400 |
commit | 7caa5711c3f2d03870cba71d175a057e573aff8d (patch) | |
tree | f57220239f1e499d78b7b8ffd1fb2ed9d9adb34a /libmaple | |
parent | 13faed75ea1366c14995aa6649b4262029822516 (diff) | |
download | librambutan-7caa5711c3f2d03870cba71d175a057e573aff8d.tar.gz librambutan-7caa5711c3f2d03870cba71d175a057e573aff8d.zip |
Native and FSMC cleanups.
Got rid of native_sram.h (and native_sram.cpp), and pushed their
functionality into maple_native.cpp. Fixed includes in maple_native.h.
Fixed includes in fsmc.h.
Diffstat (limited to 'libmaple')
-rw-r--r-- | libmaple/fsmc.c | 4 | ||||
-rw-r--r-- | libmaple/fsmc.h | 14 |
2 files changed, 9 insertions, 9 deletions
diff --git a/libmaple/fsmc.c b/libmaple/fsmc.c index 70d7e0d..356e1e5 100644 --- a/libmaple/fsmc.c +++ b/libmaple/fsmc.c @@ -26,10 +26,8 @@ * @brief */ -#include "libmaple.h" -#include "rcc.h" -#include "gpio.h" #include "fsmc.h" +#include "gpio.h" #ifdef STM32_HIGH_DENSITY diff --git a/libmaple/fsmc.h b/libmaple/fsmc.h index fccaf0b..8b6cac5 100644 --- a/libmaple/fsmc.h +++ b/libmaple/fsmc.h @@ -26,6 +26,8 @@ * See ../notes/fsmc.txt for more info */ +#include "libmaple_types.h" + /** * @file fsmc.h */ @@ -83,10 +85,10 @@ typedef struct fsmc_reg_map { __io uint32 BWTR4; /**< SRAM/NOR-Flash write timing register 4 */ } __attribute__((packed)) fsmc_reg_map; -#define __FSMC_B 0xA0000000 +#define __FSMCB 0xA0000000 /** FSMC register map base pointer */ -#define FSMC_BASE ((struct fsmc_reg_map*)__FSMC_B) +#define FSMC_BASE ((struct fsmc_reg_map*)__FSMCB) /** FSMC NOR/PSRAM register map type */ typedef struct fsmc_nor_psram_reg_map { @@ -97,16 +99,16 @@ typedef struct fsmc_nor_psram_reg_map { } fsmc_nor_psram_reg_map; /** FSMC NOR/PSRAM base pointer 1 */ -#define FSMC_NOR_PSRAM1_BASE ((struct fsmc_nor_psram_reg_map*)__FSMC_B) +#define FSMC_NOR_PSRAM1_BASE ((struct fsmc_nor_psram_reg_map*)__FSMCB) /** FSMC NOR/PSRAM base pointer 2 */ -#define FSMC_NOR_PSRAM2_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMC_B + 0x8)) +#define FSMC_NOR_PSRAM2_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x8)) /** FSMC NOR/PSRAM base pointer 3 */ -#define FSMC_NOR_PSRAM3_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMC_B+0x10)) +#define FSMC_NOR_PSRAM3_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x10)) /** FSMC NOR/PSRAM base pointer 4 */ -#define FSMC_NOR_PSRAM4_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMC_B+0x18)) +#define FSMC_NOR_PSRAM4_BASE ((struct fsmc_nor_psram_reg_map*)(__FSMCB + 0x18)) /* * Register bit definitions |