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authorMarti Bolivar <mbolivar@leaflabs.com>2012-05-11 12:12:56 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2012-05-31 17:24:17 -0400
commitcfdc0986c8c6617dd0762d72514d1c8f56329f59 (patch)
tree2b78022d39ff19dc7b7e9cbf3d4f49d4f6aa52f7 /libmaple
parentbc3090f787cd7d8bb052a79632275211b57fc23b (diff)
downloadlibrambutan-cfdc0986c8c6617dd0762d72514d1c8f56329f59.tar.gz
librambutan-cfdc0986c8c6617dd0762d72514d1c8f56329f59.zip
rcc.c: Fix typo.
Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>
Diffstat (limited to 'libmaple')
-rw-r--r--libmaple/rcc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/libmaple/rcc.c b/libmaple/rcc.c
index 91ce8e7..7b7be0d 100644
--- a/libmaple/rcc.c
+++ b/libmaple/rcc.c
@@ -90,7 +90,7 @@ void rcc_switch_sysclk(rcc_sysclk_src sysclk_src) {
* On all known STM32 series, this encoding has the property that
* adding one to the low byte also gives the bit to check to determine
* if the clock is ready. For example, on STM32F1, RCC_CR_HSERDY is
- * bit 17. If that's not the case on your ser ies, rcc_is_clk_ready()
+ * bit 17. If that's not the case on your series, rcc_is_clk_ready()
* won't work for you. */
/* Returns the RCC register which controls the clock source. */