aboutsummaryrefslogtreecommitdiffstats
path: root/libmaple/usb/usb_hardware.c
diff options
context:
space:
mode:
authorMarti Bolivar <mbolivar@leaflabs.com>2011-05-09 16:43:27 -0400
committerMarti Bolivar <mbolivar@leaflabs.com>2011-05-09 16:49:08 -0400
commit19ea6ba4ea3f1ecb9830cf4d3e1366513f4f96e3 (patch)
treea43f7e0fb3650ca54f245b750a078a0e8c356504 /libmaple/usb/usb_hardware.c
parent868fb1c273e562a1140abfa948022c9d4f55bccf (diff)
parent1e2e177f6dae62e040c674b617744c73be187062 (diff)
downloadlibrambutan-19ea6ba4ea3f1ecb9830cf4d3e1366513f4f96e3.tar.gz
librambutan-19ea6ba4ea3f1ecb9830cf4d3e1366513f4f96e3.zip
Merge branch 'refactor'
This merges the libmaple refactor work into master. The contents of libmaple proper (/libmaple/) are almost completely incompatible with previous APIs in master. See /docs/source/libmaple/overview.rst for more information on the new design. Wirish incompatibilities are limited to the HardwareTimer class; however, there are several new deprecations, most likely to be removed in 0.1.0.
Diffstat (limited to 'libmaple/usb/usb_hardware.c')
-rw-r--r--libmaple/usb/usb_hardware.c41
1 files changed, 0 insertions, 41 deletions
diff --git a/libmaple/usb/usb_hardware.c b/libmaple/usb/usb_hardware.c
index 505dcf1..9a7d12c 100644
--- a/libmaple/usb/usb_hardware.c
+++ b/libmaple/usb/usb_hardware.c
@@ -33,47 +33,6 @@
#include "usb_hardware.h"
-void setPin(u32 bank, u8 pin) {
- u32 pinMask = 0x1 << (pin);
- SET_REG(GPIO_BSRR(bank),pinMask);
-}
-
-void resetPin(u32 bank, u8 pin) {
- u32 pinMask = 0x1 << (16+pin);
- SET_REG(GPIO_BSRR(bank),pinMask);
-}
-
-void systemReset(void) {
- SET_REG(RCC_CR, GET_REG(RCC_CR) | 0x00000001);
- SET_REG(RCC_CFGR, GET_REG(RCC_CFGR) & 0xF8FF0000);
- SET_REG(RCC_CR, GET_REG(RCC_CR) & 0xFEF6FFFF);
- SET_REG(RCC_CR, GET_REG(RCC_CR) & 0xFFFBFFFF);
- SET_REG(RCC_CFGR, GET_REG(RCC_CFGR) & 0xFF80FFFF);
-
- SET_REG(RCC_CIR, 0x00000000); // disable all RCC interrupts
-}
-
-void setupCLK (void) {
- /* enable HSE */
- SET_REG(RCC_CR,GET_REG(RCC_CR) | 0x00010001);
- /* for it to come on */
- while ((GET_REG(RCC_CR) & 0x00020000) == 0);
-
- /* Configure PLL */
- /* pll=72Mhz,APB1=36Mhz,AHB=72Mhz */
- SET_REG(RCC_CFGR,GET_REG(RCC_CFGR) | 0x001D0400);
- /* enable the pll */
- SET_REG(RCC_CR,GET_REG(RCC_CR) | 0x01000000);
- /* wait for it to come on */
- while ((GET_REG(RCC_CR) & 0x03000000) == 0);
-
- /* Set SYSCLK as PLL */
- SET_REG(RCC_CFGR,GET_REG(RCC_CFGR) | 0x00000002);
- /* wait for it to come on */
- while ((GET_REG(RCC_CFGR) & 0x00000008) == 0);
-}
-
-
void nvicInit(NVIC_InitTypeDef* NVIC_InitStruct) {
u32 tmppriority = 0x00;
u32 tmpreg = 0x00;