[FIXME] Resurrected, shinier USART support.

FIXME:
- Test F1 support
- Solve problem of duplicated bytes being TXed unless delay is
  inserted after configuration but before first bytes are TXed.

Rip out nonportable bits from top-level interfaces. The USART register
maps are basically the same between F1 and F2, so leave these, but add
register bit definitions which had name changes to the libmaple header
to avoid needless repetition. There are also a few new bits in the F2
USART registers; add definitions for these in the F2 USART header. Add
Doxygen comments for all USART bit definitions.

Deprecate struct usart_dev's max_baud field. This is just bloat that
doesn't bring us much real benefit.

Add new series-specific USART files for F1 and F2:

- libmaple/stm32f[1,2]/usart.c
- libmaple/stm32f[1,2]/include/series/usart.h

These are standard series-specific files, providing register map base
pointers, defining devices, implementing nonportable routines, etc.

We need a portable way to configure the USART GPIOs. To this end, add
usart_async_gpio_cfg() to the top-level USART interface. This function
is implemented in new F1 and F2 USART backends to take the appropriate
action to configure the RX and TX pins for asynchronous full duplex
mode.

USART baud rate calculation is done differently on the different
series. Keep the usart_set_baud_rate() declaration in the top-level
USART header, but move the implementations into the series-specific
usart.c files.

In usart_set_baud_rate(), allow for deriving clock_speed automatically
by letting user tell us to figure out the peripheral clock speed by
mapping the device's rcc_clk_id onto an STM32_PCLK[1,2] value. This
preserves flexibility for users with non-default clock configurations,
but makes things easier on everyone else.

Add private USART files for portable private USART routines:

- libmaple/usart_private.h
- libmaple/usart_private.c

Signed-off-by: Marti Bolivar <mbolivar@leaflabs.com>

3 files changed, 302 insertions, 0 deletions

diff --git a/libmaple/stm32f2/include/series/usart.h b/libmaple/stm32f2/include/series/usart.h
new file mode 100644
index 0000000..9b18b9c
--- /dev/null
+++ b/libmaple/stm32f2/include/series/usart.h
@@ -0,0 +1,103 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2012 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file libmaple/stm32f2/usart.h
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief STM32F2 USART header.
+ */
+
+#ifndef _LIBMAPLE_STM32F2_USART_H_
+#define _LIBMAPLE_STM32F2_USART_H_
+
+#ifdef __cplusplus
+extern "C"{
+#endif
+
+/*
+ * Register map base pointers.
+ */
+
+struct usart_reg_map;
+
+/** USART1 register map base pointer */
+#define USART1_BASE                     ((struct usart_reg_map*)0x40011000)
+/** USART2 register map base pointer */
+#define USART2_BASE                     ((struct usart_reg_map*)0x40004400)
+/** USART3 register map base pointer */
+#define USART3_BASE                     ((struct usart_reg_map*)0x40004800)
+/** UART4 register map base pointer */
+#define UART4_BASE                      ((struct usart_reg_map*)0x40004C00)
+/** UART5 register map base pointer */
+#define UART5_BASE                      ((struct usart_reg_map*)0x40005000)
+/** USART6 register map base pointer */
+#define USART6_BASE                     ((struct usart_reg_map*)0x40011400)
+
+/*
+ * F2-only register bit definitions.
+ */
+
+/* Control register 1 */
+
+/**
+ * @brief Oversampling mode bit.
+ * Availability: STM32F2. */
+#define USART_CR1_OVER8_BIT             15
+
+/**
+ * @brief Oversampling mode.
+ * Availability: STM32F2. */
+#define USART_CR1_OVER8                 (1U << USART_CR1_OVER8_BIT)
+
+/* Control register 3 */
+
+/** One sample bit method enable bit. */
+#define USART_CR3_ONEBIT_BIT            11
+
+/** One bit sample method enable. */
+#define USART_CR3_ONEBIT                (1 << USART_CR3_ONEBIT_BIT)
+/** Sample method: Three sample bit method. */
+#define USART_CR3_ONEBIT_3SAMPLE        (0 << USART_CR3_ONEBIT_BIT)
+/** Sample method: One sample bit method. */
+#define USART_CR3_ONEBIT_1SAMPLE        (1 << USART_CR3_ONEBIT_BIT)
+
+/*
+ * Devices
+ */
+
+struct usart_dev;
+extern struct usart_dev *USART1;
+extern struct usart_dev *USART2;
+extern struct usart_dev *USART3;
+extern struct usart_dev *UART4;
+extern struct usart_dev *UART5;
+extern struct usart_dev *USART6;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/libmaple/stm32f2/rules.mk b/libmaple/stm32f2/rules.mk
index 83ab043..54fa068 100644
--- a/libmaple/stm32f2/rules.mk
+++ b/libmaple/stm32f2/rules.mk
@@ -11,6 +11,7 @@ CFLAGS_$(d) = -I$(d) $(LIBMAPLE_INCLUDES) $(LIBMAPLE_PRIVATE_INCLUDES) -Wall -We
 sSRCS_$(d) := isrs.S vector_table.S
 cSRCS_$(d) := rcc.c
 cSRCS_$(d) += gpio.c
+cSRCS_$(d) += usart.c
 
 sFILES_$(d) := $(sSRCS_$(d):%=$(d)/%)
 cFILES_$(d) := $(cSRCS_$(d):%=$(d)/%)
diff --git a/libmaple/stm32f2/usart.c b/libmaple/stm32f2/usart.c
new file mode 100644
index 0000000..364558c
--- /dev/null
+++ b/libmaple/stm32f2/usart.c
@@ -0,0 +1,198 @@
+/******************************************************************************
+ * The MIT License
+ *
+ * Copyright (c) 2012 LeafLabs, LLC.
+ *
+ * Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use, copy,
+ * modify, merge, publish, distribute, sublicense, and/or sell copies
+ * of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *****************************************************************************/
+
+/**
+ * @file libmaple/stm32f2/usart.c
+ * @author Marti Bolivar <mbolivar@leaflabs.com>
+ * @brief STM32F2 USART support.
+ */
+
+#include <libmaple/usart.h>
+#include <libmaple/gpio.h>
+#include "usart_private.h"
+
+/*
+ * Devices
+ */
+
+static ring_buffer usart1_rb;
+static usart_dev usart1 = {
+    .regs     = USART1_BASE,
+    .rb       = &usart1_rb,
+    .max_baud = 4500000UL,      /* FIXME */
+    .clk_id   = RCC_USART1,
+    .irq_num  = NVIC_USART1,
+};
+/** USART1 device */
+usart_dev *USART1 = &usart1;
+
+static ring_buffer usart2_rb;
+static usart_dev usart2 = {
+    .regs     = USART2_BASE,
+    .rb       = &usart2_rb,
+    .max_baud = 2250000UL,      /* FIXME */
+    .clk_id   = RCC_USART2,
+    .irq_num  = NVIC_USART2,
+};
+/** USART2 device */
+usart_dev *USART2 = &usart2;
+
+static ring_buffer usart3_rb;
+static usart_dev usart3 = {
+    .regs     = USART3_BASE,
+    .rb       = &usart3_rb,
+    .max_baud = 2250000UL,      /* FIXME */
+    .clk_id   = RCC_USART3,
+    .irq_num  = NVIC_USART3,
+};
+/** USART3 device */
+usart_dev *USART3 = &usart3;
+
+static ring_buffer uart4_rb;
+static usart_dev uart4 = {
+    .regs     = UART4_BASE,
+    .rb       = &uart4_rb,
+    .max_baud = 2250000UL,      /* FIXME */
+    .clk_id   = RCC_UART4,
+    .irq_num  = NVIC_UART4,
+};
+/** UART4 device */
+usart_dev *UART4 = &uart4;
+
+static ring_buffer uart5_rb;
+static usart_dev uart5 = {
+    .regs     = UART5_BASE,
+    .rb       = &uart5_rb,
+    .max_baud = 2250000UL,      /* FIXME */
+    .clk_id   = RCC_UART5,
+    .irq_num  = NVIC_UART5,
+};
+/** UART5 device */
+usart_dev *UART5 = &uart5;
+
+static ring_buffer usart6_rb;
+static usart_dev usart6 = {
+    .regs = USART6_BASE,
+    .rb = &usart6_rb,
+    .max_baud = 4500000UL,      /* FIXME */
+    .clk_id = RCC_USART6,
+    .irq_num = NVIC_USART6,
+};
+usart_dev *USART6 = &usart6;
+
+/*
+ * Routines
+ */
+
+void usart_async_gpio_cfg(usart_dev *udev,
+                          gpio_dev *rx_dev, uint8 rx,
+                          gpio_dev *tx_dev, uint8 tx,
+                          unsigned flags) {
+    gpio_af af;
+    switch (udev->clk_id) {
+    case RCC_USART1:
+    case RCC_USART2:
+    case RCC_USART3:
+        af = GPIO_AF_USART_1_2_3;
+        break;
+    case RCC_UART4:
+    case RCC_UART5:
+    case RCC_USART6:
+        af = GPIO_AF_USART_4_5_6;
+        break;
+    default:
+        ASSERT(0);
+        return;
+    }
+    gpio_set_modef(rx_dev, rx, GPIO_MODE_AF, 0);
+    gpio_set_modef(tx_dev, tx, GPIO_MODE_AF, 0);
+    gpio_set_af(rx_dev, rx, af);
+    gpio_set_af(tx_dev, tx, af);
+}
+
+void usart_set_baud_rate(usart_dev *dev, uint32 clock_speed, uint32 baud) {
+    uint32 integer_part;
+    uint32 fractional_part;
+    uint32 tmp;
+    uint32 over8 = !!(dev->regs->CR1 & USART_CR1_OVER8);
+
+    ASSERT(!over8); /* OVER8 is currently unsupported. */
+
+    /* Figure out the clock speed, if the user doesn't give one. */
+    if (clock_speed == 0) {
+        clock_speed = _usart_clock_freq(dev);
+    }
+    ASSERT(clock_speed);
+
+    /* Convert desired baud rate to baud rate register setting. */
+    integer_part = (25 * clock_speed) / (2 * (2 - over8) * baud);
+    tmp = (integer_part / 100) << 4;
+    fractional_part = integer_part - (100 * (tmp >> 4));
+    tmp |= ((fractional_part * 16 + 50) / 100) & (uint8)0x0F;
+
+    dev->regs->BRR = tmp;
+}
+
+/**
+ * @brief Call a function on each USART.
+ * @param fn Function to call.
+ */
+void usart_foreach(void (*fn)(usart_dev*)) {
+    fn(USART1);
+    fn(USART2);
+    fn(USART3);
+    fn(UART4);
+    fn(UART5);
+    fn(USART6);
+}
+
+/*
+ * Interrupt handlers.
+ */
+
+void __irq_usart1(void) {
+    usart_irq(&usart1_rb, USART1_BASE);
+}
+
+void __irq_usart2(void) {
+    usart_irq(&usart2_rb, USART2_BASE);
+}
+
+void __irq_usart3(void) {
+    usart_irq(&usart3_rb, USART3_BASE);
+}
+
+void __irq_uart4(void) {
+    usart_irq(&uart4_rb, UART4_BASE);
+}
+
+void __irq_uart5(void) {
+    usart_irq(&uart5_rb, UART5_BASE);
+}
+
+void __irq_usart6(void) {
+    usart_irq(&usart6_rb, USART6_BASE);
+}